fab2d1adf6
or not the OS has to wait for RX_RDY or TX_RDY to be set before the OS sets the control code in the control/status register. Looking at the interface design, it seems that RX_RDY and TX_RDY are probably there to protect access to the data register and have nothing to do with the control/status register. Nevertheless, try to take what I think is the more conservative approach and always wait for the appropriate [TR]X_RDY flag to be set before writing any of the WR_NEXT, WR_END, RD_START, or RD_NEXT control codes to the control/status register. |
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.. | ||
ipmi_acpi.c | ||
ipmi_isa.c | ||
ipmi_kcs.c | ||
ipmi_pci.c | ||
ipmi_smbios.c | ||
ipmi_smbus.c | ||
ipmi_smic.c | ||
ipmi_ssif.c | ||
ipmi.c | ||
ipmivars.h |