edbe9b8b99
doesn't mess us up. Noted by: Harti Brandt <brandt@fokus.gmd.de>
805 lines
17 KiB
C
805 lines
17 KiB
C
/*
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*
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* ===================================
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* HARP | Host ATM Research Platform
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* ===================================
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*
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*
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* This Host ATM Research Platform ("HARP") file (the "Software") is
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* made available by Network Computing Services, Inc. ("NetworkCS")
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* "AS IS". NetworkCS does not provide maintenance, improvements or
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* support of any kind.
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*
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* NETWORKCS MAKES NO WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED,
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* INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE, AS TO ANY ELEMENT OF THE
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* SOFTWARE OR ANY SUPPORT PROVIDED IN CONNECTION WITH THIS SOFTWARE.
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* In no event shall NetworkCS be responsible for any damages, including
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* but not limited to consequential damages, arising from or relating to
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* any use of the Software or related support.
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*
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* Copyright 1994-1998 Network Computing Services, Inc.
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*
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* Copies of this Software may be made, however, the above copyright
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* notice must be reproduced on all copies.
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*
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* @(#) $FreeBSD$
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*
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*/
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/*
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* FORE Systems 200-Series Adapter Support
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* ---------------------------------------
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*
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* Buffer Supply queue management
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*
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*/
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#include <sys/param.h>
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#include <sys/types.h>
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#include <sys/systm.h>
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#include <sys/time.h>
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#include <sys/socket.h>
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#include <sys/socketvar.h>
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#include <sys/syslog.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <net/if.h>
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#include <netatm/port.h>
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#include <netatm/queue.h>
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#include <netatm/atm.h>
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#include <netatm/atm_sys.h>
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#include <netatm/atm_sap.h>
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#include <netatm/atm_cm.h>
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#include <netatm/atm_if.h>
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#include <netatm/atm_stack.h>
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#include <netatm/atm_pcb.h>
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#include <netatm/atm_var.h>
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#include <pci/pcivar.h>
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#include <dev/hfa/fore.h>
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#include <dev/hfa/fore_aali.h>
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#include <dev/hfa/fore_slave.h>
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#include <dev/hfa/fore_stats.h>
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#include <dev/hfa/fore_var.h>
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#include <dev/hfa/fore_include.h>
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#ifndef lint
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__RCSID("@(#) $FreeBSD$");
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#endif
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/*
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* Local functions
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*/
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static void fore_buf_drain __P((Fore_unit *));
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static void fore_buf_supply_1s __P((Fore_unit *));
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static void fore_buf_supply_1l __P((Fore_unit *));
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/*
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* Allocate Buffer Supply Queues Data Structures
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*
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* Here we are allocating memory for both Strategy 1 Small and Large
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* structures contiguously.
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*
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* Arguments:
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* fup pointer to device unit structure
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*
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* Returns:
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* 0 allocations successful
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* else allocation failed
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*/
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int
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fore_buf_allocate(fup)
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Fore_unit *fup;
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{
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caddr_t memp;
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/*
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* Allocate non-cacheable memory for buffer supply status words
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*/
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memp = atm_dev_alloc(
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sizeof(Q_status) * (BUF1_SM_QUELEN + BUF1_LG_QUELEN),
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QSTAT_ALIGN, ATM_DEV_NONCACHE);
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if (memp == NULL) {
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return (1);
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}
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fup->fu_buf1s_stat = (Q_status *) memp;
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fup->fu_buf1l_stat = ((Q_status *) memp) + BUF1_SM_QUELEN;
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memp = DMA_GET_ADDR(fup->fu_buf1s_stat,
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sizeof(Q_status) * (BUF1_SM_QUELEN + BUF1_LG_QUELEN),
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QSTAT_ALIGN, ATM_DEV_NONCACHE);
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if (memp == NULL) {
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return (1);
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}
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fup->fu_buf1s_statd = (Q_status *) memp;
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fup->fu_buf1l_statd = ((Q_status *) memp) + BUF1_SM_QUELEN;
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/*
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* Allocate memory for buffer supply descriptors
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*/
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memp = atm_dev_alloc(sizeof(Buf_descr) *
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((BUF1_SM_QUELEN * BUF1_SM_ENTSIZE) +
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(BUF1_LG_QUELEN * BUF1_LG_ENTSIZE)),
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BUF_DESCR_ALIGN, 0);
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if (memp == NULL) {
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return (1);
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}
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fup->fu_buf1s_desc = (Buf_descr *) memp;
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fup->fu_buf1l_desc = ((Buf_descr *) memp) +
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(BUF1_SM_QUELEN * BUF1_SM_ENTSIZE);
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memp = DMA_GET_ADDR(fup->fu_buf1s_desc, sizeof(Buf_descr) *
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((BUF1_SM_QUELEN * BUF1_SM_ENTSIZE) +
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(BUF1_LG_QUELEN * BUF1_LG_ENTSIZE)),
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BUF_DESCR_ALIGN, 0);
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if (memp == NULL) {
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return (1);
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}
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fup->fu_buf1s_descd = (Buf_descr *) memp;
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fup->fu_buf1l_descd = ((Buf_descr *) memp) +
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(BUF1_SM_QUELEN * BUF1_SM_ENTSIZE);
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return (0);
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}
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/*
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* Buffer Supply Queues Initialization
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*
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* Allocate and initialize the host-resident buffer supply queue structures
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* and then initialize the CP-resident queue structures.
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*
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* Called at interrupt level.
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*
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* Arguments:
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* fup pointer to device unit structure
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*
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* Returns:
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* none
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*/
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void
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fore_buf_initialize(fup)
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Fore_unit *fup;
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{
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Aali *aap = fup->fu_aali;
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Buf_queue *cqp;
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H_buf_queue *hbp;
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Buf_descr *bdp;
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Buf_descr *bdp_dma;
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Q_status *qsp;
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Q_status *qsp_dma;
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int i;
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/*
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* Initialize Strategy 1 Small Queues
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*/
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/*
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* Point to CP-resident buffer supply queue
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*/
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cqp = (Buf_queue *)(fup->fu_ram + CP_READ(aap->aali_buf1s_q));
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/*
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* Point to host-resident buffer supply queue structures
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*/
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hbp = fup->fu_buf1s_q;
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qsp = fup->fu_buf1s_stat;
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qsp_dma = fup->fu_buf1s_statd;
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bdp = fup->fu_buf1s_desc;
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bdp_dma = fup->fu_buf1s_descd;
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/*
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* Loop thru all queue entries and do whatever needs doing
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*/
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for (i = 0; i < BUF1_SM_QUELEN; i++) {
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/*
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* Set queue status word to free
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*/
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*qsp = QSTAT_FREE;
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/*
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* Set up host queue entry and link into ring
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*/
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hbp->hbq_cpelem = cqp;
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hbp->hbq_status = qsp;
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hbp->hbq_descr = bdp;
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hbp->hbq_descr_dma = bdp_dma;
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if (i == (BUF1_SM_QUELEN - 1))
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hbp->hbq_next = fup->fu_buf1s_q;
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else
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hbp->hbq_next = hbp + 1;
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/*
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* Now let the CP into the game
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*/
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cqp->cq_status = (CP_dma) CP_WRITE(qsp_dma);
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/*
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* Bump all queue pointers
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*/
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hbp++;
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qsp++;
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qsp_dma++;
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bdp += BUF1_SM_ENTSIZE;
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bdp_dma += BUF1_SM_ENTSIZE;
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cqp++;
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}
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/*
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* Initialize queue pointers
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*/
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fup->fu_buf1s_head = fup->fu_buf1s_tail = fup->fu_buf1s_q;
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/*
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* Initialize Strategy 1 Large Queues
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*/
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/*
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* Point to CP-resident buffer supply queue
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*/
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cqp = (Buf_queue *)(fup->fu_ram + CP_READ(aap->aali_buf1l_q));
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/*
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* Point to host-resident buffer supply queue structures
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*/
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hbp = fup->fu_buf1l_q;
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qsp = fup->fu_buf1l_stat;
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qsp_dma = fup->fu_buf1l_statd;
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bdp = fup->fu_buf1l_desc;
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bdp_dma = fup->fu_buf1l_descd;
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/*
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* Loop thru all queue entries and do whatever needs doing
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*/
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for (i = 0; i < BUF1_LG_QUELEN; i++) {
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/*
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* Set queue status word to free
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*/
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*qsp = QSTAT_FREE;
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/*
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* Set up host queue entry and link into ring
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*/
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hbp->hbq_cpelem = cqp;
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hbp->hbq_status = qsp;
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hbp->hbq_descr = bdp;
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hbp->hbq_descr_dma = bdp_dma;
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if (i == (BUF1_LG_QUELEN - 1))
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hbp->hbq_next = fup->fu_buf1l_q;
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else
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hbp->hbq_next = hbp + 1;
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/*
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* Now let the CP into the game
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*/
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cqp->cq_status = (CP_dma) CP_WRITE(qsp_dma);
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/*
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* Bump all queue pointers
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*/
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hbp++;
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qsp++;
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qsp_dma++;
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bdp += BUF1_LG_ENTSIZE;
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bdp_dma += BUF1_LG_ENTSIZE;
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cqp++;
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}
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/*
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* Initialize queue pointers
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*/
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fup->fu_buf1l_head = fup->fu_buf1l_tail = fup->fu_buf1l_q;
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return;
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}
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/*
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* Supply Buffers to CP
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*
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* This function will resupply the CP with buffers to be used to
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* store incoming data.
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*
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* May be called in interrupt state.
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* Must be called with interrupts locked out.
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*
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* Arguments:
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* fup pointer to device unit structure
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*
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* Returns:
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* none
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*/
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void
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fore_buf_supply(fup)
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Fore_unit *fup;
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{
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/*
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* First, clean out the supply queues
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*/
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fore_buf_drain(fup);
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/*
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* Then, supply the buffers for each queue
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*/
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fore_buf_supply_1s(fup);
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fore_buf_supply_1l(fup);
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return;
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}
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/*
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* Supply Strategy 1 Small Buffers to CP
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*
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* May be called in interrupt state.
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* Must be called with interrupts locked out.
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*
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* Arguments:
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* fup pointer to device unit structure
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*
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* Returns:
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* none
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*/
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static void
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fore_buf_supply_1s(fup)
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Fore_unit *fup;
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{
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H_buf_queue *hbp;
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Buf_queue *cqp;
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Buf_descr *bdp;
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Buf_handle *bhp;
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KBuffer *m;
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int nvcc, nbuf, i;
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/*
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* Figure out how many buffers we should be giving to the CP.
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* We're basing this calculation on the current number of open
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* VCCs thru this device, with certain minimum and maximum values
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* enforced. This will then allow us to figure out how many more
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* buffers we need to supply to the CP. This will be rounded up
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* to fill a supply queue entry.
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*/
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nvcc = MAX(fup->fu_open_vcc, BUF_MIN_VCC);
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nbuf = nvcc * 4;
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nbuf = MIN(nbuf, BUF1_SM_CPPOOL);
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nbuf -= fup->fu_buf1s_cnt;
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nbuf = roundup(nbuf, BUF1_SM_ENTSIZE);
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/*
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* OK, now supply the buffers to the CP
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*/
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while (nbuf > 0) {
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/*
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* Acquire a supply queue entry
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*/
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hbp = fup->fu_buf1s_tail;
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if (!((*hbp->hbq_status) & QSTAT_FREE))
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break;
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bdp = hbp->hbq_descr;
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/*
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* Get a buffer for each descriptor in the queue entry
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*/
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for (i = 0; i < BUF1_SM_ENTSIZE; i++, bdp++) {
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caddr_t cp;
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/*
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* Get a small buffer
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*/
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KB_ALLOCPKT(m, BUF1_SM_SIZE, KB_F_NOWAIT, KB_T_DATA);
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if (m == 0) {
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break;
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}
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KB_HEADSET(m, BUF1_SM_DOFF);
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/*
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* Point to buffer handle structure
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*/
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bhp = (Buf_handle *)((caddr_t)m + BUF1_SM_HOFF);
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bhp->bh_type = BHT_S1_SMALL;
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/*
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* Setup buffer descriptor
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*/
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bdp->bsd_handle = bhp;
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KB_DATASTART(m, cp, caddr_t);
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bhp->bh_dma = bdp->bsd_buffer = (H_dma) DMA_GET_ADDR(
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cp, BUF1_SM_SIZE, BUF_DATA_ALIGN, 0);
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if (bdp->bsd_buffer == NULL) {
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/*
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* Unable to assign dma address - free up
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* this descriptor's buffer
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*/
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fup->fu_stats->st_drv.drv_bf_segdma++;
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KB_FREEALL(m);
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break;
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}
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/*
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* All set, so queue buffer (handle)
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*/
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ENQUEUE(bhp, Buf_handle, bh_qelem, fup->fu_buf1s_bq);
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}
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/*
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* If we we're not able to fill all the descriptors for
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* an entry, free up what's been partially built
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*/
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if (i != BUF1_SM_ENTSIZE) {
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caddr_t cp;
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/*
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* Clean up each used descriptor
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*/
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for (bdp = hbp->hbq_descr; i; i--, bdp++) {
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bhp = bdp->bsd_handle;
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DEQUEUE(bhp, Buf_handle, bh_qelem,
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fup->fu_buf1s_bq);
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m = (KBuffer *)
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((caddr_t)bhp - BUF1_SM_HOFF);
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KB_DATASTART(m, cp, caddr_t);
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DMA_FREE_ADDR(cp, bhp->bh_dma, BUF1_SM_SIZE, 0);
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KB_FREEALL(m);
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}
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break;
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}
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/*
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* Finally, we've got an entry ready for the CP.
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* So claim the host queue entry and setup the CP-resident
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* queue entry. The CP will (potentially) grab the supplied
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* buffers when the descriptor pointer is set.
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*/
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fup->fu_buf1s_tail = hbp->hbq_next;
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(*hbp->hbq_status) = QSTAT_PENDING;
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cqp = hbp->hbq_cpelem;
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cqp->cq_descr = (CP_dma) CP_WRITE((u_long)hbp->hbq_descr_dma);
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/*
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* Update counters, etc for supplied buffers
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*/
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fup->fu_buf1s_cnt += BUF1_SM_ENTSIZE;
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nbuf -= BUF1_SM_ENTSIZE;
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}
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return;
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}
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/*
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* Supply Strategy 1 Large Buffers to CP
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*
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* May be called in interrupt state.
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* Must be called with interrupts locked out.
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*
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* Arguments:
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* fup pointer to device unit structure
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*
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* Returns:
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* none
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*/
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static void
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fore_buf_supply_1l(fup)
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Fore_unit *fup;
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{
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H_buf_queue *hbp;
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Buf_queue *cqp;
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Buf_descr *bdp;
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Buf_handle *bhp;
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KBuffer *m;
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int nvcc, nbuf, i;
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/*
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* Figure out how many buffers we should be giving to the CP.
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* We're basing this calculation on the current number of open
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* VCCs thru this device, with certain minimum and maximum values
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* enforced. This will then allow us to figure out how many more
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* buffers we need to supply to the CP. This will be rounded up
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* to fill a supply queue entry.
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*/
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nvcc = MAX(fup->fu_open_vcc, BUF_MIN_VCC);
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nbuf = nvcc * 4 * RECV_MAX_SEGS;
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nbuf = MIN(nbuf, BUF1_LG_CPPOOL);
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nbuf -= fup->fu_buf1l_cnt;
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nbuf = roundup(nbuf, BUF1_LG_ENTSIZE);
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/*
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* OK, now supply the buffers to the CP
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*/
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while (nbuf > 0) {
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/*
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* Acquire a supply queue entry
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*/
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hbp = fup->fu_buf1l_tail;
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if (!((*hbp->hbq_status) & QSTAT_FREE))
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break;
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bdp = hbp->hbq_descr;
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/*
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* Get a buffer for each descriptor in the queue entry
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*/
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for (i = 0; i < BUF1_LG_ENTSIZE; i++, bdp++) {
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caddr_t cp;
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/*
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* Get a cluster buffer
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*/
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KB_ALLOCEXT(m, BUF1_LG_SIZE, KB_F_NOWAIT, KB_T_DATA);
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if (m == 0) {
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break;
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}
|
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KB_HEADSET(m, BUF1_LG_DOFF);
|
|
|
|
/*
|
|
* Point to buffer handle structure
|
|
*/
|
|
bhp = (Buf_handle *)((caddr_t)m + BUF1_LG_HOFF);
|
|
bhp->bh_type = BHT_S1_LARGE;
|
|
|
|
/*
|
|
* Setup buffer descriptor
|
|
*/
|
|
bdp->bsd_handle = bhp;
|
|
KB_DATASTART(m, cp, caddr_t);
|
|
bhp->bh_dma = bdp->bsd_buffer = (H_dma) DMA_GET_ADDR(
|
|
cp, BUF1_LG_SIZE, BUF_DATA_ALIGN, 0);
|
|
if (bdp->bsd_buffer == NULL) {
|
|
/*
|
|
* Unable to assign dma address - free up
|
|
* this descriptor's buffer
|
|
*/
|
|
fup->fu_stats->st_drv.drv_bf_segdma++;
|
|
KB_FREEALL(m);
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* All set, so queue buffer (handle)
|
|
*/
|
|
ENQUEUE(bhp, Buf_handle, bh_qelem, fup->fu_buf1l_bq);
|
|
}
|
|
|
|
/*
|
|
* If we we're not able to fill all the descriptors for
|
|
* an entry, free up what's been partially built
|
|
*/
|
|
if (i != BUF1_LG_ENTSIZE) {
|
|
caddr_t cp;
|
|
|
|
/*
|
|
* Clean up each used descriptor
|
|
*/
|
|
for (bdp = hbp->hbq_descr; i; i--, bdp++) {
|
|
bhp = bdp->bsd_handle;
|
|
|
|
DEQUEUE(bhp, Buf_handle, bh_qelem,
|
|
fup->fu_buf1l_bq);
|
|
|
|
m = (KBuffer *)
|
|
((caddr_t)bhp - BUF1_LG_HOFF);
|
|
KB_DATASTART(m, cp, caddr_t);
|
|
DMA_FREE_ADDR(cp, bhp->bh_dma, BUF1_LG_SIZE, 0);
|
|
KB_FREEALL(m);
|
|
}
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* Finally, we've got an entry ready for the CP.
|
|
* So claim the host queue entry and setup the CP-resident
|
|
* queue entry. The CP will (potentially) grab the supplied
|
|
* buffers when the descriptor pointer is set.
|
|
*/
|
|
fup->fu_buf1l_tail = hbp->hbq_next;
|
|
(*hbp->hbq_status) = QSTAT_PENDING;
|
|
cqp = hbp->hbq_cpelem;
|
|
cqp->cq_descr = (CP_dma) CP_WRITE((u_long)hbp->hbq_descr_dma);
|
|
|
|
/*
|
|
* Update counters, etc for supplied buffers
|
|
*/
|
|
fup->fu_buf1l_cnt += BUF1_LG_ENTSIZE;
|
|
nbuf -= BUF1_LG_ENTSIZE;
|
|
}
|
|
|
|
return;
|
|
}
|
|
|
|
|
|
/*
|
|
* Drain Buffer Supply Queues
|
|
*
|
|
* This function will free all completed entries at the head of each
|
|
* buffer supply queue. Since we consider the CP to "own" the buffers
|
|
* once we put them on a supply queue and since a completed supply queue
|
|
* entry is only telling us that the CP has accepted the buffers that we
|
|
* gave to it, there's not much to do here.
|
|
*
|
|
* May be called in interrupt state.
|
|
* Must be called with interrupts locked out.
|
|
*
|
|
* Arguments:
|
|
* fup pointer to device unit structure
|
|
*
|
|
* Returns:
|
|
* none
|
|
*/
|
|
static void
|
|
fore_buf_drain(fup)
|
|
Fore_unit *fup;
|
|
{
|
|
H_buf_queue *hbp;
|
|
|
|
/*
|
|
* Drain Strategy 1 Small Queue
|
|
*/
|
|
|
|
/*
|
|
* Process each completed entry
|
|
*/
|
|
while (*fup->fu_buf1s_head->hbq_status & QSTAT_COMPLETED) {
|
|
|
|
hbp = fup->fu_buf1s_head;
|
|
|
|
if (*hbp->hbq_status & QSTAT_ERROR) {
|
|
/*
|
|
* XXX - what does this mean???
|
|
*/
|
|
log(LOG_ERR, "fore_buf_drain: buf1s queue error\n");
|
|
}
|
|
|
|
/*
|
|
* Mark this entry free for use and bump head pointer
|
|
* to the next entry in the queue
|
|
*/
|
|
*hbp->hbq_status = QSTAT_FREE;
|
|
fup->fu_buf1s_head = hbp->hbq_next;
|
|
}
|
|
|
|
|
|
/*
|
|
* Drain Strategy 1 Large Queue
|
|
*/
|
|
|
|
/*
|
|
* Process each completed entry
|
|
*/
|
|
while (*fup->fu_buf1l_head->hbq_status & QSTAT_COMPLETED) {
|
|
|
|
hbp = fup->fu_buf1l_head;
|
|
|
|
if (*hbp->hbq_status & QSTAT_ERROR) {
|
|
/*
|
|
* XXX - what does this mean???
|
|
*/
|
|
log(LOG_ERR, "fore_buf_drain: buf1l queue error\n");
|
|
}
|
|
|
|
/*
|
|
* Mark this entry free for use and bump head pointer
|
|
* to the next entry in the queue
|
|
*/
|
|
*hbp->hbq_status = QSTAT_FREE;
|
|
fup->fu_buf1l_head = hbp->hbq_next;
|
|
}
|
|
|
|
return;
|
|
}
|
|
|
|
|
|
/*
|
|
* Free Buffer Supply Queue Data Structures
|
|
*
|
|
* Arguments:
|
|
* fup pointer to device unit structure
|
|
*
|
|
* Returns:
|
|
* none
|
|
*/
|
|
void
|
|
fore_buf_free(fup)
|
|
Fore_unit *fup;
|
|
{
|
|
Buf_handle *bhp;
|
|
KBuffer *m;
|
|
|
|
/*
|
|
* Free any previously supplied and not returned buffers
|
|
*/
|
|
if (fup->fu_flags & CUF_INITED) {
|
|
|
|
/*
|
|
* Run through Strategy 1 Small queue
|
|
*/
|
|
while ((bhp = Q_HEAD(fup->fu_buf1s_bq, Buf_handle)) != NULL) {
|
|
caddr_t cp;
|
|
|
|
/*
|
|
* Back off to buffer
|
|
*/
|
|
m = (KBuffer *)((caddr_t)bhp - BUF1_SM_HOFF);
|
|
|
|
/*
|
|
* Dequeue handle and free buffer
|
|
*/
|
|
DEQUEUE(bhp, Buf_handle, bh_qelem, fup->fu_buf1s_bq);
|
|
|
|
KB_DATASTART(m, cp, caddr_t);
|
|
DMA_FREE_ADDR(cp, bhp->bh_dma, BUF1_SM_SIZE, 0);
|
|
|
|
KB_FREEALL(m);
|
|
}
|
|
|
|
/*
|
|
* Run through Strategy 1 Large queue
|
|
*/
|
|
while ((bhp = Q_HEAD(fup->fu_buf1l_bq, Buf_handle)) != NULL) {
|
|
caddr_t cp;
|
|
|
|
/*
|
|
* Back off to buffer
|
|
*/
|
|
m = (KBuffer *)((caddr_t)bhp - BUF1_LG_HOFF);
|
|
|
|
/*
|
|
* Dequeue handle and free buffer
|
|
*/
|
|
DEQUEUE(bhp, Buf_handle, bh_qelem, fup->fu_buf1l_bq);
|
|
|
|
KB_DATASTART(m, cp, caddr_t);
|
|
DMA_FREE_ADDR(cp, bhp->bh_dma, BUF1_LG_SIZE, 0);
|
|
|
|
KB_FREEALL(m);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Free the status words
|
|
*/
|
|
if (fup->fu_buf1s_stat) {
|
|
if (fup->fu_buf1s_statd) {
|
|
DMA_FREE_ADDR(fup->fu_buf1s_stat, fup->fu_buf1s_statd,
|
|
sizeof(Q_status) *
|
|
(BUF1_SM_QUELEN + BUF1_LG_QUELEN),
|
|
ATM_DEV_NONCACHE);
|
|
}
|
|
atm_dev_free((volatile void *)fup->fu_buf1s_stat);
|
|
fup->fu_buf1s_stat = NULL;
|
|
fup->fu_buf1s_statd = NULL;
|
|
fup->fu_buf1l_stat = NULL;
|
|
fup->fu_buf1l_statd = NULL;
|
|
}
|
|
|
|
/*
|
|
* Free the transmit descriptors
|
|
*/
|
|
if (fup->fu_buf1s_desc) {
|
|
if (fup->fu_buf1s_descd) {
|
|
DMA_FREE_ADDR(fup->fu_buf1s_desc, fup->fu_buf1s_descd,
|
|
sizeof(Buf_descr) *
|
|
((BUF1_SM_QUELEN * BUF1_SM_ENTSIZE) +
|
|
(BUF1_LG_QUELEN * BUF1_LG_ENTSIZE)),
|
|
0);
|
|
}
|
|
atm_dev_free(fup->fu_buf1s_desc);
|
|
fup->fu_buf1s_desc = NULL;
|
|
fup->fu_buf1s_descd = NULL;
|
|
fup->fu_buf1l_desc = NULL;
|
|
fup->fu_buf1l_descd = NULL;
|
|
}
|
|
|
|
return;
|
|
}
|
|
|