9cac79b378
only release, no new features have been added. Please note that this version requires C++11 support to build; see UPDATING for more information. Release notes for llvm and clang can be found here: <http://llvm.org/releases/3.5.1/docs/ReleaseNotes.html> <http://llvm.org/releases/3.5.1/tools/clang/docs/ReleaseNotes.html> MFC after: 1 month X-MFC-With: 276479
80 lines
2.7 KiB
Diff
80 lines
2.7 KiB
Diff
Pull in r223147, r223255 and r223390 from upstream llvm trunk (by Roman
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Divacky):
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Introduce CPUStringIsValid() into MCSubtargetInfo and use it for ARM
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.cpu parsing.
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Previously .cpu directive in ARM assembler didnt switch to the new
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CPU and therefore acted as a nop. This implemented real action for
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.cpu and eg. allows to assembler FreeBSD kernel with -integrated-as.
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Change the name to be in style.
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Add a FIXME as requested by Renato Golin.
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Introduced here: http://svnweb.freebsd.org/changeset/base/275654
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Index: include/llvm/MC/MCSubtargetInfo.h
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===================================================================
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--- include/llvm/MC/MCSubtargetInfo.h
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+++ include/llvm/MC/MCSubtargetInfo.h
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@@ -132,6 +132,15 @@ class MCSubtargetInfo {
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/// Initialize an InstrItineraryData instance.
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void initInstrItins(InstrItineraryData &InstrItins) const;
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+
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+ /// Check whether the CPU string is valid.
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+ bool isCPUStringValid(StringRef CPU) {
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+ auto Found = std::find_if(ProcDesc.begin(), ProcDesc.end(),
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+ [=](const SubtargetFeatureKV &KV) {
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+ return CPU == KV.Key;
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+ });
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+ return Found != ProcDesc.end();
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+ }
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};
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} // End llvm namespace
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Index: lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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===================================================================
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--- lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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+++ lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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@@ -8618,6 +8618,20 @@ bool ARMAsmParser::parseDirectiveEabiAttr(SMLoc L)
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bool ARMAsmParser::parseDirectiveCPU(SMLoc L) {
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StringRef CPU = getParser().parseStringToEndOfStatement().trim();
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getTargetStreamer().emitTextAttribute(ARMBuildAttrs::CPU_name, CPU);
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+
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+ if (!STI.isCPUStringValid(CPU)) {
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+ Error(L, "Unknown CPU name");
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+ return false;
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+ }
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+
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+ // FIXME: This switches the CPU features globally, therefore it might
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+ // happen that code you would not expect to assemble will. For details
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+ // see: http://llvm.org/bugs/show_bug.cgi?id=20757
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+ STI.InitMCProcessorInfo(CPU, "");
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+ STI.InitCPUSchedModel(CPU);
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+ unsigned FB = ComputeAvailableFeatures(STI.getFeatureBits());
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+ setAvailableFeatures(FB);
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+
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return false;
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}
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Index: test/MC/ARM/cpu-test.s
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===================================================================
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--- test/MC/ARM/cpu-test.s
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+++ test/MC/ARM/cpu-test.s
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@@ -0,0 +1,13 @@
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+// RUN: not llvm-mc -o - -triple arm-gnueabi-freebsd11.0 < %s > %t 2> %t2
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+// RUN: FileCheck %s < %t
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+// RUN: FileCheck %s --check-prefix=CHECK-ERROR < %t2
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+
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+// CHECK: .cpu cortex-a8
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+.cpu cortex-a8
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+// CHECK: dsb sy
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+dsb
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+.cpu arm9
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+// CHECK-ERROR: error: instruction requires: data-barriers
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+dsb
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+// CHECK-ERROR: error: Unknown CPU name
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+.cpu foobar
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