d3c11f40a5
Rework the guest register fetch code to allow the RIP to be extracted from the VMCS while the kernel decoder is functioning. Hit by the OpenBSD local-apic code. Submitted by: neel Reviewed by: grehan Obtained from: NetApp
562 lines
13 KiB
C
562 lines
13 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_ddb.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/pcpu.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/segments.h>
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#include <machine/pmap.h>
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#include <machine/vmm.h>
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#include "vmm_host.h"
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#include "vmcs.h"
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#include "vmx_cpufunc.h"
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#include "ept.h"
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#include "vmx.h"
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#ifdef DDB
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#include <ddb/ddb.h>
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#endif
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static uint64_t
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vmcs_fix_regval(uint32_t encoding, uint64_t val)
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{
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switch (encoding) {
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case VMCS_GUEST_CR0:
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val = vmx_fix_cr0(val);
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break;
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case VMCS_GUEST_CR4:
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val = vmx_fix_cr4(val);
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break;
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default:
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break;
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}
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return (val);
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}
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static uint32_t
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vmcs_field_encoding(int ident)
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{
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switch (ident) {
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case VM_REG_GUEST_CR0:
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return (VMCS_GUEST_CR0);
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case VM_REG_GUEST_CR3:
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return (VMCS_GUEST_CR3);
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case VM_REG_GUEST_CR4:
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return (VMCS_GUEST_CR4);
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case VM_REG_GUEST_DR7:
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return (VMCS_GUEST_DR7);
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case VM_REG_GUEST_RSP:
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return (VMCS_GUEST_RSP);
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case VM_REG_GUEST_RIP:
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return (VMCS_GUEST_RIP);
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case VM_REG_GUEST_RFLAGS:
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return (VMCS_GUEST_RFLAGS);
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case VM_REG_GUEST_ES:
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return (VMCS_GUEST_ES_SELECTOR);
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case VM_REG_GUEST_CS:
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return (VMCS_GUEST_CS_SELECTOR);
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case VM_REG_GUEST_SS:
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return (VMCS_GUEST_SS_SELECTOR);
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case VM_REG_GUEST_DS:
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return (VMCS_GUEST_DS_SELECTOR);
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case VM_REG_GUEST_FS:
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return (VMCS_GUEST_FS_SELECTOR);
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case VM_REG_GUEST_GS:
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return (VMCS_GUEST_GS_SELECTOR);
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case VM_REG_GUEST_TR:
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return (VMCS_GUEST_TR_SELECTOR);
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case VM_REG_GUEST_LDTR:
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return (VMCS_GUEST_LDTR_SELECTOR);
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case VM_REG_GUEST_EFER:
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return (VMCS_GUEST_IA32_EFER);
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default:
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return (-1);
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}
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}
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static int
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vmcs_seg_desc_encoding(int seg, uint32_t *base, uint32_t *lim, uint32_t *acc)
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{
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switch (seg) {
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case VM_REG_GUEST_ES:
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*base = VMCS_GUEST_ES_BASE;
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*lim = VMCS_GUEST_ES_LIMIT;
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*acc = VMCS_GUEST_ES_ACCESS_RIGHTS;
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break;
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case VM_REG_GUEST_CS:
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*base = VMCS_GUEST_CS_BASE;
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*lim = VMCS_GUEST_CS_LIMIT;
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*acc = VMCS_GUEST_CS_ACCESS_RIGHTS;
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break;
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case VM_REG_GUEST_SS:
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*base = VMCS_GUEST_SS_BASE;
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*lim = VMCS_GUEST_SS_LIMIT;
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*acc = VMCS_GUEST_SS_ACCESS_RIGHTS;
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break;
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case VM_REG_GUEST_DS:
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*base = VMCS_GUEST_DS_BASE;
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*lim = VMCS_GUEST_DS_LIMIT;
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*acc = VMCS_GUEST_DS_ACCESS_RIGHTS;
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break;
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case VM_REG_GUEST_FS:
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*base = VMCS_GUEST_FS_BASE;
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*lim = VMCS_GUEST_FS_LIMIT;
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*acc = VMCS_GUEST_FS_ACCESS_RIGHTS;
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break;
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case VM_REG_GUEST_GS:
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*base = VMCS_GUEST_GS_BASE;
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*lim = VMCS_GUEST_GS_LIMIT;
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*acc = VMCS_GUEST_GS_ACCESS_RIGHTS;
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break;
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case VM_REG_GUEST_TR:
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*base = VMCS_GUEST_TR_BASE;
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*lim = VMCS_GUEST_TR_LIMIT;
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*acc = VMCS_GUEST_TR_ACCESS_RIGHTS;
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break;
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case VM_REG_GUEST_LDTR:
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*base = VMCS_GUEST_LDTR_BASE;
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*lim = VMCS_GUEST_LDTR_LIMIT;
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*acc = VMCS_GUEST_LDTR_ACCESS_RIGHTS;
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break;
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case VM_REG_GUEST_IDTR:
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*base = VMCS_GUEST_IDTR_BASE;
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*lim = VMCS_GUEST_IDTR_LIMIT;
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*acc = VMCS_INVALID_ENCODING;
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break;
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case VM_REG_GUEST_GDTR:
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*base = VMCS_GUEST_GDTR_BASE;
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*lim = VMCS_GUEST_GDTR_LIMIT;
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*acc = VMCS_INVALID_ENCODING;
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break;
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default:
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return (EINVAL);
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}
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return (0);
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}
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int
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vmcs_getreg(struct vmcs *vmcs, int running, int ident, uint64_t *retval)
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{
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int error;
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uint32_t encoding;
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/*
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* If we need to get at vmx-specific state in the VMCS we can bypass
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* the translation of 'ident' to 'encoding' by simply setting the
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* sign bit. As it so happens the upper 16 bits are reserved (i.e
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* set to 0) in the encodings for the VMCS so we are free to use the
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* sign bit.
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*/
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if (ident < 0)
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encoding = ident & 0x7fffffff;
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else
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encoding = vmcs_field_encoding(ident);
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if (encoding == (uint32_t)-1)
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return (EINVAL);
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if (!running)
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VMPTRLD(vmcs);
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error = vmread(encoding, retval);
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if (!running)
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VMCLEAR(vmcs);
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return (error);
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}
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int
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vmcs_setreg(struct vmcs *vmcs, int running, int ident, uint64_t val)
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{
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int error;
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uint32_t encoding;
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if (ident < 0)
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encoding = ident & 0x7fffffff;
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else
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encoding = vmcs_field_encoding(ident);
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if (encoding == (uint32_t)-1)
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return (EINVAL);
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val = vmcs_fix_regval(encoding, val);
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if (!running)
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VMPTRLD(vmcs);
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error = vmwrite(encoding, val);
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if (!running)
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VMCLEAR(vmcs);
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return (error);
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}
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int
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vmcs_setdesc(struct vmcs *vmcs, int seg, struct seg_desc *desc)
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{
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int error;
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uint32_t base, limit, access;
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error = vmcs_seg_desc_encoding(seg, &base, &limit, &access);
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if (error != 0)
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panic("vmcs_setdesc: invalid segment register %d", seg);
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VMPTRLD(vmcs);
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if ((error = vmwrite(base, desc->base)) != 0)
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goto done;
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if ((error = vmwrite(limit, desc->limit)) != 0)
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goto done;
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if (access != VMCS_INVALID_ENCODING) {
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if ((error = vmwrite(access, desc->access)) != 0)
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goto done;
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}
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done:
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VMCLEAR(vmcs);
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return (error);
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}
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int
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vmcs_getdesc(struct vmcs *vmcs, int seg, struct seg_desc *desc)
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{
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int error;
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uint32_t base, limit, access;
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uint64_t u64;
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error = vmcs_seg_desc_encoding(seg, &base, &limit, &access);
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if (error != 0)
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panic("vmcs_getdesc: invalid segment register %d", seg);
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VMPTRLD(vmcs);
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if ((error = vmread(base, &u64)) != 0)
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goto done;
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desc->base = u64;
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if ((error = vmread(limit, &u64)) != 0)
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goto done;
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desc->limit = u64;
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if (access != VMCS_INVALID_ENCODING) {
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if ((error = vmread(access, &u64)) != 0)
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goto done;
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desc->access = u64;
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}
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done:
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VMCLEAR(vmcs);
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return (error);
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}
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int
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vmcs_set_msr_save(struct vmcs *vmcs, u_long g_area, u_int g_count)
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{
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int error;
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VMPTRLD(vmcs);
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/*
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* Guest MSRs are saved in the VM-exit MSR-store area.
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* Guest MSRs are loaded from the VM-entry MSR-load area.
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* Both areas point to the same location in memory.
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*/
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if ((error = vmwrite(VMCS_EXIT_MSR_STORE, g_area)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_EXIT_MSR_STORE_COUNT, g_count)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_ENTRY_MSR_LOAD, g_area)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_ENTRY_MSR_LOAD_COUNT, g_count)) != 0)
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goto done;
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error = 0;
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done:
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VMCLEAR(vmcs);
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return (error);
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}
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int
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vmcs_set_defaults(struct vmcs *vmcs,
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u_long host_rip, u_long host_rsp, u_long ept_pml4,
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uint32_t pinbased_ctls, uint32_t procbased_ctls,
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uint32_t procbased_ctls2, uint32_t exit_ctls,
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uint32_t entry_ctls, u_long msr_bitmap, uint16_t vpid)
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{
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int error, codesel, datasel, tsssel;
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u_long cr0, cr4, efer;
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uint64_t eptp, pat, fsbase, idtrbase;
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uint32_t exc_bitmap;
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codesel = vmm_get_host_codesel();
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datasel = vmm_get_host_datasel();
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tsssel = vmm_get_host_tsssel();
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/*
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* Make sure we have a "current" VMCS to work with.
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*/
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VMPTRLD(vmcs);
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/*
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* Load the VMX controls
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*/
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if ((error = vmwrite(VMCS_PIN_BASED_CTLS, pinbased_ctls)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_PRI_PROC_BASED_CTLS, procbased_ctls)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_SEC_PROC_BASED_CTLS, procbased_ctls2)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_EXIT_CTLS, exit_ctls)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_ENTRY_CTLS, entry_ctls)) != 0)
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goto done;
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/* Guest state */
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/* Initialize guest IA32_PAT MSR with the default value */
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pat = PAT_VALUE(0, PAT_WRITE_BACK) |
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PAT_VALUE(1, PAT_WRITE_THROUGH) |
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PAT_VALUE(2, PAT_UNCACHED) |
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PAT_VALUE(3, PAT_UNCACHEABLE) |
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PAT_VALUE(4, PAT_WRITE_BACK) |
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PAT_VALUE(5, PAT_WRITE_THROUGH) |
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PAT_VALUE(6, PAT_UNCACHED) |
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PAT_VALUE(7, PAT_UNCACHEABLE);
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if ((error = vmwrite(VMCS_GUEST_IA32_PAT, pat)) != 0)
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goto done;
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/* Host state */
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/* Initialize host IA32_PAT MSR */
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pat = vmm_get_host_pat();
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if ((error = vmwrite(VMCS_HOST_IA32_PAT, pat)) != 0)
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goto done;
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/* Load the IA32_EFER MSR */
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efer = vmm_get_host_efer();
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if ((error = vmwrite(VMCS_HOST_IA32_EFER, efer)) != 0)
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goto done;
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/* Load the control registers */
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cr0 = vmm_get_host_cr0();
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if ((error = vmwrite(VMCS_HOST_CR0, cr0)) != 0)
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goto done;
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cr4 = vmm_get_host_cr4() | CR4_VMXE;
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if ((error = vmwrite(VMCS_HOST_CR4, cr4)) != 0)
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goto done;
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/* Load the segment selectors */
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if ((error = vmwrite(VMCS_HOST_ES_SELECTOR, datasel)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_HOST_CS_SELECTOR, codesel)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_HOST_SS_SELECTOR, datasel)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_HOST_DS_SELECTOR, datasel)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_HOST_FS_SELECTOR, datasel)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_HOST_GS_SELECTOR, datasel)) != 0)
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goto done;
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if ((error = vmwrite(VMCS_HOST_TR_SELECTOR, tsssel)) != 0)
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goto done;
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/*
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* Load the Base-Address for %fs and idtr.
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*
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* Note that we exclude %gs, tss and gdtr here because their base
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* address is pcpu specific.
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*/
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fsbase = vmm_get_host_fsbase();
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if ((error = vmwrite(VMCS_HOST_FS_BASE, fsbase)) != 0)
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goto done;
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idtrbase = vmm_get_host_idtrbase();
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if ((error = vmwrite(VMCS_HOST_IDTR_BASE, idtrbase)) != 0)
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goto done;
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/* instruction pointer */
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if ((error = vmwrite(VMCS_HOST_RIP, host_rip)) != 0)
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goto done;
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/* stack pointer */
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if ((error = vmwrite(VMCS_HOST_RSP, host_rsp)) != 0)
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goto done;
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/* eptp */
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eptp = EPTP(ept_pml4);
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if ((error = vmwrite(VMCS_EPTP, eptp)) != 0)
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goto done;
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/* vpid */
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if ((error = vmwrite(VMCS_VPID, vpid)) != 0)
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goto done;
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/* msr bitmap */
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if ((error = vmwrite(VMCS_MSR_BITMAP, msr_bitmap)) != 0)
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goto done;
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/* exception bitmap */
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exc_bitmap = 1 << IDT_MC;
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if ((error = vmwrite(VMCS_EXCEPTION_BITMAP, exc_bitmap)) != 0)
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goto done;
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/* link pointer */
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if ((error = vmwrite(VMCS_LINK_POINTER, ~0)) != 0)
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goto done;
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done:
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VMCLEAR(vmcs);
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return (error);
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}
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uint64_t
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vmcs_read(uint32_t encoding)
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{
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int error;
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uint64_t val;
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error = vmread(encoding, &val);
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if (error != 0)
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panic("vmcs_read(%u) error %d", encoding, error);
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return (val);
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}
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#ifdef DDB
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extern int vmxon_enabled[];
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DB_SHOW_COMMAND(vmcs, db_show_vmcs)
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{
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uint64_t cur_vmcs, val;
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uint32_t exit;
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if (!vmxon_enabled[curcpu]) {
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db_printf("VMX not enabled\n");
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return;
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}
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if (have_addr) {
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db_printf("Only current VMCS supported\n");
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return;
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}
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vmptrst(&cur_vmcs);
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if (cur_vmcs == VMCS_INITIAL) {
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db_printf("No current VM context\n");
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return;
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}
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db_printf("VMCS: %jx\n", cur_vmcs);
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db_printf("VPID: %lu\n", vmcs_read(VMCS_VPID));
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db_printf("Activity: ");
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val = vmcs_read(VMCS_GUEST_ACTIVITY);
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switch (val) {
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case 0:
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db_printf("Active");
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break;
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case 1:
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db_printf("HLT");
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break;
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case 2:
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db_printf("Shutdown");
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break;
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case 3:
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db_printf("Wait for SIPI");
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break;
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default:
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db_printf("Unknown: %#lx", val);
|
|
}
|
|
db_printf("\n");
|
|
exit = vmcs_read(VMCS_EXIT_REASON);
|
|
if (exit & 0x80000000)
|
|
db_printf("Entry Failure Reason: %u\n", exit & 0xffff);
|
|
else
|
|
db_printf("Exit Reason: %u\n", exit & 0xffff);
|
|
db_printf("Qualification: %#lx\n", vmcs_exit_qualification());
|
|
db_printf("Guest Linear Address: %#lx\n",
|
|
vmcs_read(VMCS_GUEST_LINEAR_ADDRESS));
|
|
switch (exit & 0x8000ffff) {
|
|
case EXIT_REASON_EXCEPTION:
|
|
case EXIT_REASON_EXT_INTR:
|
|
val = vmcs_read(VMCS_EXIT_INTERRUPTION_INFO);
|
|
db_printf("Interrupt Type: ");
|
|
switch (val >> 8 & 0x7) {
|
|
case 0:
|
|
db_printf("external");
|
|
break;
|
|
case 2:
|
|
db_printf("NMI");
|
|
break;
|
|
case 3:
|
|
db_printf("HW exception");
|
|
break;
|
|
case 4:
|
|
db_printf("SW exception");
|
|
break;
|
|
default:
|
|
db_printf("?? %lu", val >> 8 & 0x7);
|
|
break;
|
|
}
|
|
db_printf(" Vector: %lu", val & 0xff);
|
|
if (val & 0x800)
|
|
db_printf(" Error Code: %lx",
|
|
vmcs_read(VMCS_EXIT_INTERRUPTION_ERROR));
|
|
db_printf("\n");
|
|
break;
|
|
case EXIT_REASON_EPT_FAULT:
|
|
case EXIT_REASON_EPT_MISCONFIG:
|
|
db_printf("Guest Physical Address: %#lx\n",
|
|
vmcs_read(VMCS_GUEST_PHYSICAL_ADDRESS));
|
|
break;
|
|
}
|
|
db_printf("VM-instruction error: %#lx\n", vmcs_instruction_error());
|
|
}
|
|
#endif
|