e706f7f0c7
- Simplify the amount of work that has be done for each architecture by pushing more of the truly MI code down into the PCI bus driver. - Don't bind MSI-X indicies to IRQs so that we can allow a driver to map multiple MSI-X messages into a single IRQ when handling a message shortage. The changes include: - Add a new pcib_if method: PCIB_MAP_MSI() which is called by the PCI bus to calculate the address and data values for a given MSI/MSI-X IRQ. The x86 nexus drivers map this into a call to a new 'msi_map()' function in msi.c that does the mapping. - Retire the pcib_if method PCIB_REMAP_MSIX() and remove the 'index' parameter from PCIB_ALLOC_MSIX(). MD code no longer has any knowledge of the MSI-X index for a given MSI-X IRQ. - The PCI bus driver now stores more MSI-X state in a child's ivars. Specifically, it now stores an array of IRQs (called "message vectors" in the code) that have associated address and data values, and a small virtual version of the MSI-X table that specifies the message vector that a given MSI-X table entry uses. Sparse mappings are permitted in the virtual table. - The PCI bus driver now configures the MSI and MSI-X address/data registers directly via custom bus_setup_intr() and bus_teardown_intr() methods. pci_setup_intr() invokes PCIB_MAP_MSI() to determine the address and data values for a given message as needed. The MD code no longer has to call back down into the PCI bus code to set these values from the nexus' bus_setup_intr() handler. - The PCI bus code provides a callout (pci_remap_msi_irq()) that the MD code can call to force the PCI bus to re-invoke PCIB_MAP_MSI() to get new values of the address and data fields for a given IRQ. The x86 MSI code uses this when an MSI IRQ is moved to a different CPU, requiring a new value of the 'address' field. - The x86 MSI psuedo-driver loses a lot of code, and in fact the separate MSI/MSI-X pseudo-PICs are collapsed down into a single MSI PIC driver since the only remaining diff between the two is a substring in a bootverbose printf. - The PCI bus driver will now restore MSI-X state (including programming entries in the MSI-X table) on device resume. - The interface for pci_remap_msix() has changed. Instead of accepting indices for the allocated vectors, it accepts a mini-virtual table (with a new length parameter). This table is an array of u_ints, where each value specifies which allocated message vector to use for the corresponding MSI-X message. A vector of 0 forces a message to not have an associated IRQ. The device may choose to only use some of the IRQs assigned, in which case the unused IRQs must be at the "end" and will be released back to the system. This allows a driver to use the same remap table for different shortage values. For example, if a driver wants 4 messages, it can use the same remap table (which only uses the first two messages) for the cases when it only gets 2 or 3 messages and in the latter case the PCI bus will release the 3rd IRQ back to the system. MFC after: 1 month
369 lines
12 KiB
C
369 lines
12 KiB
C
/*-
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* Copyright (c) 2000 Michael Smith
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* Copyright (c) 2000 BSDi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_acpi.h"
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/sysctl.h>
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#include <contrib/dev/acpica/acpi.h>
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#include <dev/acpica/acpivar.h>
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#include <machine/pci_cfgreg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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#include "pcib_if.h"
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#include <dev/acpica/acpi_pcibvar.h>
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/* Hooks for the ACPI CA debugging infrastructure. */
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#define _COMPONENT ACPI_BUS
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ACPI_MODULE_NAME("PCI_ACPI")
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struct acpi_hpcib_softc {
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device_t ap_dev;
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ACPI_HANDLE ap_handle;
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int ap_flags;
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int ap_segment; /* analagous to Alpha 'hose' */
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int ap_bus; /* bios-assigned bus number */
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ACPI_BUFFER ap_prt; /* interrupt routing table */
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};
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static int acpi_pcib_acpi_probe(device_t bus);
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static int acpi_pcib_acpi_attach(device_t bus);
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static int acpi_pcib_acpi_resume(device_t bus);
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static int acpi_pcib_read_ivar(device_t dev, device_t child,
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int which, uintptr_t *result);
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static int acpi_pcib_write_ivar(device_t dev, device_t child,
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int which, uintptr_t value);
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static uint32_t acpi_pcib_read_config(device_t dev, int bus, int slot,
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int func, int reg, int bytes);
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static void acpi_pcib_write_config(device_t dev, int bus, int slot,
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int func, int reg, uint32_t data, int bytes);
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static int acpi_pcib_acpi_route_interrupt(device_t pcib,
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device_t dev, int pin);
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static int acpi_pcib_alloc_msi(device_t pcib, device_t dev,
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int count, int maxcount, int *irqs);
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static int acpi_pcib_map_msi(device_t pcib, device_t dev,
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int irq, uint64_t *addr, uint32_t *data);
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static int acpi_pcib_alloc_msix(device_t pcib, device_t dev,
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int *irq);
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static struct resource *acpi_pcib_acpi_alloc_resource(device_t dev,
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device_t child, int type, int *rid,
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u_long start, u_long end, u_long count,
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u_int flags);
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static device_method_t acpi_pcib_acpi_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, acpi_pcib_acpi_probe),
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DEVMETHOD(device_attach, acpi_pcib_acpi_attach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, acpi_pcib_acpi_resume),
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/* Bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_read_ivar, acpi_pcib_read_ivar),
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DEVMETHOD(bus_write_ivar, acpi_pcib_write_ivar),
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DEVMETHOD(bus_alloc_resource, acpi_pcib_acpi_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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/* pcib interface */
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DEVMETHOD(pcib_maxslots, pcib_maxslots),
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DEVMETHOD(pcib_read_config, acpi_pcib_read_config),
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DEVMETHOD(pcib_write_config, acpi_pcib_write_config),
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DEVMETHOD(pcib_route_interrupt, acpi_pcib_acpi_route_interrupt),
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DEVMETHOD(pcib_alloc_msi, acpi_pcib_alloc_msi),
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DEVMETHOD(pcib_release_msi, pcib_release_msi),
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DEVMETHOD(pcib_alloc_msix, acpi_pcib_alloc_msix),
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DEVMETHOD(pcib_release_msix, pcib_release_msix),
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DEVMETHOD(pcib_map_msi, acpi_pcib_map_msi),
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{0, 0}
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};
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static devclass_t pcib_devclass;
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DEFINE_CLASS_0(pcib, acpi_pcib_acpi_driver, acpi_pcib_acpi_methods,
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sizeof(struct acpi_hpcib_softc));
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DRIVER_MODULE(acpi_pcib, acpi, acpi_pcib_acpi_driver, pcib_devclass, 0, 0);
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MODULE_DEPEND(acpi_pcib, acpi, 1, 1, 1);
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static int
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acpi_pcib_acpi_probe(device_t dev)
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{
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static char *pcib_ids[] = { "PNP0A03", NULL };
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if (acpi_disabled("pcib") ||
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ACPI_ID_PROBE(device_get_parent(dev), dev, pcib_ids) == NULL)
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return (ENXIO);
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if (pci_cfgregopen() == 0)
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return (ENXIO);
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device_set_desc(dev, "ACPI Host-PCI bridge");
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return (0);
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}
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static int
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acpi_pcib_acpi_attach(device_t dev)
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{
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struct acpi_hpcib_softc *sc;
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ACPI_STATUS status;
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u_int addr, slot, func, busok;
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uint8_t busno;
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ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
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sc = device_get_softc(dev);
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sc->ap_dev = dev;
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sc->ap_handle = acpi_get_handle(dev);
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/*
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* Get our base bus number by evaluating _BBN.
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* If this doesn't work, we assume we're bus number 0.
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*
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* XXX note that it may also not exist in the case where we are
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* meant to use a private configuration space mechanism for this bus,
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* so we should dig out our resources and check to see if we have
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* anything like that. How do we do this?
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* XXX If we have the requisite information, and if we don't think the
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* default PCI configuration space handlers can deal with this bus,
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* we should attach our own handler.
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* XXX invoke _REG on this for the PCI config space address space?
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* XXX It seems many BIOS's with multiple Host-PCI bridges do not set
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* _BBN correctly. They set _BBN to zero for all bridges. Thus,
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* if _BBN is zero and pcib0 already exists, we try to read our
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* bus number from the configuration registers at address _ADR.
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*/
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status = acpi_GetInteger(sc->ap_handle, "_BBN", &sc->ap_bus);
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if (ACPI_FAILURE(status)) {
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if (status != AE_NOT_FOUND) {
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device_printf(dev, "could not evaluate _BBN - %s\n",
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AcpiFormatException(status));
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return_VALUE (ENXIO);
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} else {
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/* If it's not found, assume 0. */
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sc->ap_bus = 0;
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}
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}
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/*
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* If the bus is zero and pcib0 already exists, read the bus number
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* via PCI config space.
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*/
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busok = 1;
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if (sc->ap_bus == 0 && devclass_get_device(pcib_devclass, 0) != dev) {
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busok = 0;
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status = acpi_GetInteger(sc->ap_handle, "_ADR", &addr);
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if (ACPI_FAILURE(status)) {
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if (status != AE_NOT_FOUND) {
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device_printf(dev, "could not evaluate _ADR - %s\n",
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AcpiFormatException(status));
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return_VALUE (ENXIO);
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} else
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device_printf(dev, "couldn't find _ADR\n");
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} else {
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/* XXX: We assume bus 0. */
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slot = ACPI_ADR_PCI_SLOT(addr);
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func = ACPI_ADR_PCI_FUNC(addr);
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if (bootverbose)
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device_printf(dev, "reading config registers from 0:%d:%d\n",
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slot, func);
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if (host_pcib_get_busno(pci_cfgregread, 0, slot, func, &busno) == 0)
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device_printf(dev, "couldn't read bus number from cfg space\n");
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else {
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sc->ap_bus = busno;
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busok = 1;
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}
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}
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}
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/*
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* If nothing else worked, hope that ACPI at least lays out the
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* host-PCI bridges in order and that as a result our unit number
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* is actually our bus number. There are several reasons this
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* might not be true.
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*/
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if (busok == 0) {
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sc->ap_bus = device_get_unit(dev);
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device_printf(dev, "trying bus number %d\n", sc->ap_bus);
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}
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/*
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* Get our segment number by evaluating _SEG
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* It's OK for this to not exist.
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*/
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status = acpi_GetInteger(sc->ap_handle, "_SEG", &sc->ap_segment);
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if (ACPI_FAILURE(status)) {
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if (status != AE_NOT_FOUND) {
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device_printf(dev, "could not evaluate _SEG - %s\n",
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AcpiFormatException(status));
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return_VALUE (ENXIO);
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}
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/* If it's not found, assume 0. */
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sc->ap_segment = 0;
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}
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return (acpi_pcib_attach(dev, &sc->ap_prt, sc->ap_bus));
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}
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static int
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acpi_pcib_acpi_resume(device_t dev)
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{
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return (acpi_pcib_resume(dev));
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}
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/*
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* Support for standard PCI bridge ivars.
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*/
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static int
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acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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{
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struct acpi_hpcib_softc *sc = device_get_softc(dev);
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switch (which) {
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case PCIB_IVAR_BUS:
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*result = sc->ap_bus;
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return (0);
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case ACPI_IVAR_HANDLE:
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*result = (uintptr_t)sc->ap_handle;
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return (0);
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case ACPI_IVAR_FLAGS:
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*result = (uintptr_t)sc->ap_flags;
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return (0);
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}
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return (ENOENT);
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}
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static int
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acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
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{
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struct acpi_hpcib_softc *sc = device_get_softc(dev);
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switch (which) {
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case PCIB_IVAR_BUS:
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sc->ap_bus = value;
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return (0);
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case ACPI_IVAR_HANDLE:
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sc->ap_handle = (ACPI_HANDLE)value;
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return (0);
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case ACPI_IVAR_FLAGS:
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sc->ap_flags = (int)value;
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return (0);
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}
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return (ENOENT);
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}
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static uint32_t
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acpi_pcib_read_config(device_t dev, int bus, int slot, int func, int reg,
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int bytes)
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{
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return (pci_cfgregread(bus, slot, func, reg, bytes));
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}
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static void
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acpi_pcib_write_config(device_t dev, int bus, int slot, int func, int reg,
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uint32_t data, int bytes)
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{
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pci_cfgregwrite(bus, slot, func, reg, data, bytes);
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}
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static int
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acpi_pcib_acpi_route_interrupt(device_t pcib, device_t dev, int pin)
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{
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struct acpi_hpcib_softc *sc = device_get_softc(pcib);
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return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt));
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}
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static int
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acpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
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int *irqs)
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{
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device_t bus;
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bus = device_get_parent(pcib);
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return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
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irqs));
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}
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static int
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acpi_pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
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{
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device_t bus;
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bus = device_get_parent(pcib);
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return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
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}
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static int
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acpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
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uint32_t *data)
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{
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device_t bus;
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bus = device_get_parent(pcib);
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return (PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data));
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}
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static u_long acpi_host_mem_start = 0x80000000;
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TUNABLE_ULONG("hw.acpi.host_mem_start", &acpi_host_mem_start);
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struct resource *
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acpi_pcib_acpi_alloc_resource(device_t dev, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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/*
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* If no memory preference is given, use upper 32MB slot most
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* bioses use for their memory window. Typically other bridges
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* before us get in the way to assert their preferences on memory.
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* Hardcoding like this sucks, so a more MD/MI way needs to be
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* found to do it. This is typically only used on older laptops
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* that don't have pci busses behind pci bridge, so assuming > 32MB
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* is liekly OK.
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*/
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if (type == SYS_RES_MEMORY && start == 0UL && end == ~0UL)
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start = acpi_host_mem_start;
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if (type == SYS_RES_IOPORT && start == 0UL && end == ~0UL)
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start = 0x1000;
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return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
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count, flags));
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}
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