d9cbee0c7d
Tested and Requested by: Andy Brook MFC after: 3 days
979 lines
23 KiB
C
979 lines
23 KiB
C
/*-
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* Copyright (c) 1994 Herb Peyerl <hpeyerl@novatel.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Herb Peyerl.
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* 4. The name of Herb Peyerl may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Modified from the FreeBSD 1.1.5.1 version by:
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* Andres Vega Garcia
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* INRIA - Sophia Antipolis, France
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* avega@sophia.inria.fr
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*/
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/*
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* Promiscuous mode added and interrupt logic slightly changed
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* to reduce the number of adapter failures. Transceiver select
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* logic changed to use value from EEPROM. Autoconfiguration
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* features added.
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* Done by:
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* Serge Babkin
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* Chelindbank (Chelyabinsk, Russia)
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* babkin@hq.icb.chel.su
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*/
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/*
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* Pccard support for 3C589 by:
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* HAMADA Naoki
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* nao@tom-yam.or.jp
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*/
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/*
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* MAINTAINER: Matthew N. Dodd <winter@jurai.net>
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* <mdodd@FreeBSD.org>
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <net/ethernet.h>
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#include <net/bpf.h>
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#include <dev/ep/if_epreg.h>
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#include <dev/ep/if_epvar.h>
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/* Exported variables */
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devclass_t ep_devclass;
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static int ep_media2if_media[] =
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{IFM_10_T, IFM_10_5, IFM_NONE, IFM_10_2, IFM_NONE};
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/* if functions */
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static void epinit(void *);
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static int epioctl(struct ifnet *, u_long, caddr_t);
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static void epstart(struct ifnet *);
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static void epwatchdog(struct ifnet *);
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static void epstart_locked(struct ifnet *);
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static void epinit_locked(struct ep_softc *);
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/* if_media functions */
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static int ep_ifmedia_upd(struct ifnet *);
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static void ep_ifmedia_sts(struct ifnet *, struct ifmediareq *);
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static void epstop(struct ep_softc *);
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static void epread(struct ep_softc *);
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static int eeprom_rdy(struct ep_softc *);
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#define EP_FTST(sc, f) (sc->stat & (f))
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#define EP_FSET(sc, f) (sc->stat |= (f))
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#define EP_FRST(sc, f) (sc->stat &= ~(f))
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static int
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eeprom_rdy(struct ep_softc *sc)
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{
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int i;
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for (i = 0; is_eeprom_busy(sc) && i < MAX_EEPROMBUSY; i++)
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DELAY(100);
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if (i >= MAX_EEPROMBUSY) {
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device_printf(sc->dev, "eeprom failed to come ready.\n");
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return (ENXIO);
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}
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return (0);
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}
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/*
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* get_e: gets a 16 bits word from the EEPROM. we must have set the window
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* before
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*/
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int
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ep_get_e(struct ep_softc *sc, uint16_t offset, uint16_t *result)
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{
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if (eeprom_rdy(sc))
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return (ENXIO);
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CSR_WRITE_2(sc, EP_W0_EEPROM_COMMAND,
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(EEPROM_CMD_RD << sc->epb.cmd_off) | offset);
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if (eeprom_rdy(sc))
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return (ENXIO);
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(*result) = CSR_READ_2(sc, EP_W0_EEPROM_DATA);
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return (0);
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}
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static int
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ep_get_macaddr(struct ep_softc *sc, u_char *addr)
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{
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int i;
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uint16_t result;
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int error;
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uint16_t *macaddr;
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macaddr = (uint16_t *) addr;
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GO_WINDOW(sc, 0);
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for (i = EEPROM_NODE_ADDR_0; i <= EEPROM_NODE_ADDR_2; i++) {
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error = ep_get_e(sc, i, &result);
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if (error)
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return (error);
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macaddr[i] = htons(result);
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}
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return (0);
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}
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int
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ep_alloc(device_t dev)
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{
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struct ep_softc *sc = device_get_softc(dev);
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int rid;
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int error = 0;
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uint16_t result;
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rid = 0;
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sc->iobase = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
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RF_ACTIVE);
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if (!sc->iobase) {
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device_printf(dev, "No I/O space?!\n");
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error = ENXIO;
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goto bad;
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}
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rid = 0;
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sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
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if (!sc->irq) {
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device_printf(dev, "No irq?!\n");
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error = ENXIO;
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goto bad;
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}
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sc->dev = dev;
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sc->stat = 0; /* 16 bit access */
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sc->bst = rman_get_bustag(sc->iobase);
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sc->bsh = rman_get_bushandle(sc->iobase);
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sc->ep_connectors = 0;
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sc->ep_connector = 0;
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GO_WINDOW(sc, 0);
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error = ep_get_e(sc, EEPROM_PROD_ID, &result);
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if (error)
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goto bad;
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sc->epb.prod_id = result;
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error = ep_get_e(sc, EEPROM_RESOURCE_CFG, &result);
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if (error)
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goto bad;
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sc->epb.res_cfg = result;
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bad:
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if (error != 0)
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ep_free(dev);
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return (error);
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}
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void
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ep_get_media(struct ep_softc *sc)
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{
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uint16_t config;
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GO_WINDOW(sc, 0);
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config = CSR_READ_2(sc, EP_W0_CONFIG_CTRL);
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if (config & IS_AUI)
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sc->ep_connectors |= AUI;
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if (config & IS_BNC)
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sc->ep_connectors |= BNC;
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if (config & IS_UTP)
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sc->ep_connectors |= UTP;
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if (!(sc->ep_connectors & 7))
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if (bootverbose)
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device_printf(sc->dev, "no connectors!\n");
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/*
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* This works for most of the cards so we'll do it here.
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* The cards that require something different can override
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* this later on.
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*/
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sc->ep_connector = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) >> ACF_CONNECTOR_BITS;
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}
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void
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ep_free(device_t dev)
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{
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struct ep_softc *sc = device_get_softc(dev);
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if (sc->ep_intrhand)
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bus_teardown_intr(dev, sc->irq, sc->ep_intrhand);
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if (sc->iobase)
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bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->iobase);
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if (sc->irq)
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
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sc->ep_intrhand = 0;
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sc->iobase = 0;
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sc->irq = 0;
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}
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static void
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ep_setup_station(struct ep_softc *sc, u_char *enaddr)
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{
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int i;
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/*
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* Setup the station address
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*/
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GO_WINDOW(sc, 2);
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for (i = 0; i < ETHER_ADDR_LEN; i++)
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CSR_WRITE_1(sc, EP_W2_ADDR_0 + i, enaddr[i]);
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}
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int
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ep_attach(struct ep_softc *sc)
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{
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struct ifnet *ifp = NULL;
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struct ifmedia *ifm = NULL;
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int error;
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sc->gone = 0;
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EP_LOCK_INIT(sc);
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if (! (sc->stat & F_ENADDR_SKIP)) {
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error = ep_get_macaddr(sc, sc->eaddr);
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if (error) {
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device_printf(sc->dev, "Unable to get MAC address!\n");
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EP_LOCK_DESTROY(sc);
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return (ENXIO);
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}
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}
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ep_setup_station(sc, sc->eaddr);
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ifp = sc->ifp = if_alloc(IFT_ETHER);
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if (ifp == NULL) {
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device_printf(sc->dev, "if_alloc() failed\n");
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EP_LOCK_DESTROY(sc);
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return (ENOSPC);
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}
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ifp->if_softc = sc;
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if_initname(ifp, device_get_name(sc->dev), device_get_unit(sc->dev));
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ifp->if_mtu = ETHERMTU;
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ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
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ifp->if_start = epstart;
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ifp->if_ioctl = epioctl;
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ifp->if_watchdog = epwatchdog;
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ifp->if_init = epinit;
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IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
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ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
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IFQ_SET_READY(&ifp->if_snd);
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if (!sc->epb.mii_trans) {
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ifmedia_init(&sc->ifmedia, 0, ep_ifmedia_upd, ep_ifmedia_sts);
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if (sc->ep_connectors & AUI)
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ifmedia_add(&sc->ifmedia,
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IFM_ETHER | IFM_10_5, 0, NULL);
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if (sc->ep_connectors & UTP)
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ifmedia_add(&sc->ifmedia,
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IFM_ETHER | IFM_10_T, 0, NULL);
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if (sc->ep_connectors & BNC)
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ifmedia_add(&sc->ifmedia,
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IFM_ETHER | IFM_10_2, 0, NULL);
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if (!sc->ep_connectors)
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ifmedia_add(&sc->ifmedia,
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IFM_ETHER | IFM_NONE, 0, NULL);
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ifmedia_set(&sc->ifmedia,
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IFM_ETHER | ep_media2if_media[sc->ep_connector]);
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ifm = &sc->ifmedia;
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ifm->ifm_media = ifm->ifm_cur->ifm_media;
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ep_ifmedia_upd(ifp);
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}
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ether_ifattach(ifp, sc->eaddr);
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#ifdef EP_LOCAL_STATS
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sc->rx_no_first = sc->rx_no_mbuf = sc->rx_bpf_disc =
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sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
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#endif
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EP_FSET(sc, F_RX_FIRST);
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sc->top = sc->mcur = 0;
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epstop(sc);
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return (0);
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}
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int
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ep_detach(device_t dev)
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{
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struct ep_softc *sc;
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struct ifnet *ifp;
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sc = device_get_softc(dev);
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ifp = sc->ifp;
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EP_ASSERT_UNLOCKED(sc);
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EP_LOCK(sc);
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if (bus_child_present(dev))
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epstop(sc);
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sc->gone = 1;
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ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
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EP_UNLOCK(sc);
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ether_ifdetach(ifp);
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ep_free(dev);
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if_free(ifp);
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EP_LOCK_DESTROY(sc);
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return (0);
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}
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static void
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epinit(void *xsc)
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{
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struct ep_softc *sc = xsc;
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EP_LOCK(sc);
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epinit_locked(sc);
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EP_UNLOCK(sc);
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}
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|
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/*
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* The order in here seems important. Otherwise we may not receive
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* interrupts. ?!
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*/
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static void
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epinit_locked(struct ep_softc *sc)
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{
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struct ifnet *ifp = sc->ifp;
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int i;
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if (sc->gone)
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return;
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EP_ASSERT_LOCKED(sc);
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EP_BUSY_WAIT(sc);
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GO_WINDOW(sc, 0);
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CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
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GO_WINDOW(sc, 4);
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CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
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GO_WINDOW(sc, 0);
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|
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/* Disable the card */
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CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, 0);
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|
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/* Enable the card */
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CSR_WRITE_2(sc, EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ);
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GO_WINDOW(sc, 2);
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/* Reload the ether_addr. */
|
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ep_setup_station(sc, IF_LLADDR(sc->ifp));
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|
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CSR_WRITE_2(sc, EP_COMMAND, RX_RESET);
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CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
|
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EP_BUSY_WAIT(sc);
|
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|
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/* Window 1 is operating window */
|
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GO_WINDOW(sc, 1);
|
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for (i = 0; i < 31; i++)
|
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CSR_READ_1(sc, EP_W1_TX_STATUS);
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|
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/* get rid of stray intr's */
|
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CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | 0xff);
|
|
|
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CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK | S_5_INTS);
|
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CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
|
|
|
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if (ifp->if_flags & IFF_PROMISC)
|
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CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
|
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FIL_MULTICAST | FIL_BRDCST | FIL_PROMISC);
|
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else
|
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CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER | FIL_INDIVIDUAL |
|
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FIL_MULTICAST | FIL_BRDCST);
|
|
|
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if (!sc->epb.mii_trans)
|
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ep_ifmedia_upd(ifp);
|
|
|
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CSR_WRITE_2(sc, EP_COMMAND, RX_ENABLE);
|
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CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
|
|
|
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ifp->if_drv_flags |= IFF_DRV_RUNNING;
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; /* just in case */
|
|
|
|
#ifdef EP_LOCAL_STATS
|
|
sc->rx_no_first = sc->rx_no_mbuf =
|
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sc->rx_overrunf = sc->rx_overrunl = sc->tx_underrun = 0;
|
|
#endif
|
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EP_FSET(sc, F_RX_FIRST);
|
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if (sc->top) {
|
|
m_freem(sc->top);
|
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sc->top = sc->mcur = 0;
|
|
}
|
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CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
|
|
CSR_WRITE_2(sc, EP_COMMAND, SET_TX_START_THRESH | 16);
|
|
|
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GO_WINDOW(sc, 1);
|
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epstart_locked(ifp);
|
|
}
|
|
|
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static void
|
|
epstart(struct ifnet *ifp)
|
|
{
|
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struct ep_softc *sc;
|
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sc = ifp->if_softc;
|
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EP_LOCK(sc);
|
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epstart_locked(ifp);
|
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EP_UNLOCK(sc);
|
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}
|
|
|
|
static void
|
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epstart_locked(struct ifnet *ifp)
|
|
{
|
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struct ep_softc *sc;
|
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u_int len;
|
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struct mbuf *m, *m0;
|
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int pad;
|
|
|
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sc = ifp->if_softc;
|
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if (sc->gone)
|
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return;
|
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EP_ASSERT_LOCKED(sc);
|
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EP_BUSY_WAIT(sc);
|
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if (ifp->if_drv_flags & IFF_DRV_OACTIVE)
|
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return;
|
|
startagain:
|
|
/* Sneak a peek at the next packet */
|
|
IFQ_DRV_DEQUEUE(&ifp->if_snd, m0);
|
|
if (m0 == NULL)
|
|
return;
|
|
for (len = 0, m = m0; m != NULL; m = m->m_next)
|
|
len += m->m_len;
|
|
|
|
pad = (4 - len) & 3;
|
|
|
|
/*
|
|
* The 3c509 automatically pads short packets to minimum
|
|
* ethernet length, but we drop packets that are too large.
|
|
* Perhaps we should truncate them instead?
|
|
*/
|
|
if (len + pad > ETHER_MAX_LEN) {
|
|
/* packet is obviously too large: toss it */
|
|
ifp->if_oerrors++;
|
|
m_freem(m0);
|
|
goto readcheck;
|
|
}
|
|
if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
|
|
/* no room in FIFO */
|
|
CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | (len + pad + 4));
|
|
/* make sure */
|
|
if (CSR_READ_2(sc, EP_W1_FREE_TX) < len + pad + 4) {
|
|
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
|
|
IFQ_DRV_PREPEND(&ifp->if_snd, m0);
|
|
goto done;
|
|
}
|
|
} else
|
|
CSR_WRITE_2(sc, EP_COMMAND,
|
|
SET_TX_AVAIL_THRESH | EP_THRESH_DISABLE);
|
|
|
|
/* XXX 4.x and earlier would splhigh here */
|
|
|
|
CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, len);
|
|
/* Second dword meaningless */
|
|
CSR_WRITE_2(sc, EP_W1_TX_PIO_WR_1, 0x0);
|
|
|
|
if (EP_FTST(sc, F_ACCESS_32_BITS)) {
|
|
for (m = m0; m != NULL; m = m->m_next) {
|
|
if (m->m_len > 3)
|
|
CSR_WRITE_MULTI_4(sc, EP_W1_TX_PIO_WR_1,
|
|
mtod(m, uint32_t *), m->m_len / 4);
|
|
if (m->m_len & 3)
|
|
CSR_WRITE_MULTI_1(sc, EP_W1_TX_PIO_WR_1,
|
|
mtod(m, uint8_t *)+(m->m_len & (~3)),
|
|
m->m_len & 3);
|
|
}
|
|
} else {
|
|
for (m = m0; m != NULL; m = m->m_next) {
|
|
if (m->m_len > 1)
|
|
CSR_WRITE_MULTI_2(sc, EP_W1_TX_PIO_WR_1,
|
|
mtod(m, uint16_t *), m->m_len / 2);
|
|
if (m->m_len & 1)
|
|
CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1,
|
|
*(mtod(m, uint8_t *)+m->m_len - 1));
|
|
}
|
|
}
|
|
|
|
while (pad--)
|
|
CSR_WRITE_1(sc, EP_W1_TX_PIO_WR_1, 0); /* Padding */
|
|
|
|
/* XXX and drop splhigh here */
|
|
|
|
BPF_MTAP(ifp, m0);
|
|
|
|
ifp->if_timer = 2;
|
|
ifp->if_opackets++;
|
|
m_freem(m0);
|
|
|
|
/*
|
|
* Is another packet coming in? We don't want to overflow
|
|
* the tiny RX fifo.
|
|
*/
|
|
readcheck:
|
|
if (CSR_READ_2(sc, EP_W1_RX_STATUS) & RX_BYTES_MASK) {
|
|
/*
|
|
* we check if we have packets left, in that case
|
|
* we prepare to come back later
|
|
*/
|
|
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
|
|
CSR_WRITE_2(sc, EP_COMMAND, SET_TX_AVAIL_THRESH | 8);
|
|
goto done;
|
|
}
|
|
goto startagain;
|
|
done:;
|
|
return;
|
|
}
|
|
|
|
void
|
|
ep_intr(void *arg)
|
|
{
|
|
struct ep_softc *sc;
|
|
int status;
|
|
struct ifnet *ifp;
|
|
|
|
sc = (struct ep_softc *) arg;
|
|
EP_LOCK(sc);
|
|
/* XXX 4.x splbio'd here to reduce interruptability */
|
|
|
|
/*
|
|
* quick fix: Try to detect an interrupt when the card goes away.
|
|
*/
|
|
if (sc->gone || CSR_READ_2(sc, EP_STATUS) == 0xffff) {
|
|
EP_UNLOCK(sc);
|
|
return;
|
|
}
|
|
ifp = sc->ifp;
|
|
|
|
CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK); /* disable all Ints */
|
|
|
|
rescan:
|
|
|
|
while ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS) {
|
|
|
|
/* first acknowledge all interrupt sources */
|
|
CSR_WRITE_2(sc, EP_COMMAND, ACK_INTR | (status & S_MASK));
|
|
|
|
if (status & (S_RX_COMPLETE | S_RX_EARLY))
|
|
epread(sc);
|
|
if (status & S_TX_AVAIL) {
|
|
/* we need ACK */
|
|
ifp->if_timer = 0;
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
|
GO_WINDOW(sc, 1);
|
|
CSR_READ_2(sc, EP_W1_FREE_TX);
|
|
epstart_locked(ifp);
|
|
}
|
|
if (status & S_CARD_FAILURE) {
|
|
ifp->if_timer = 0;
|
|
#ifdef EP_LOCAL_STATS
|
|
device_printf(sc->dev, "\n\tStatus: %x\n", status);
|
|
GO_WINDOW(sc, 4);
|
|
printf("\tFIFO Diagnostic: %x\n",
|
|
CSR_READ_2(sc, EP_W4_FIFO_DIAG));
|
|
printf("\tStat: %x\n", sc->stat);
|
|
printf("\tIpackets=%d, Opackets=%d\n",
|
|
ifp->if_ipackets, ifp->if_opackets);
|
|
printf("\tNOF=%d, NOMB=%d, RXOF=%d, RXOL=%d, TXU=%d\n",
|
|
sc->rx_no_first, sc->rx_no_mbuf, sc->rx_overrunf,
|
|
sc->rx_overrunl, sc->tx_underrun);
|
|
#else
|
|
|
|
#ifdef DIAGNOSTIC
|
|
device_printf(sc->dev,
|
|
"Status: %x (input buffer overflow)\n", status);
|
|
#else
|
|
++ifp->if_ierrors;
|
|
#endif
|
|
|
|
#endif
|
|
epinit_locked(sc);
|
|
EP_UNLOCK(sc);
|
|
return;
|
|
}
|
|
if (status & S_TX_COMPLETE) {
|
|
ifp->if_timer = 0;
|
|
/*
|
|
* We need ACK. We do it at the end.
|
|
*
|
|
* We need to read TX_STATUS until we get a
|
|
* 0 status in order to turn off the interrupt flag.
|
|
*/
|
|
while ((status = CSR_READ_1(sc, EP_W1_TX_STATUS)) &
|
|
TXS_COMPLETE) {
|
|
if (status & TXS_SUCCES_INTR_REQ)
|
|
; /* nothing */
|
|
else if (status &
|
|
(TXS_UNDERRUN | TXS_JABBER |
|
|
TXS_MAX_COLLISION)) {
|
|
CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
|
|
if (status & TXS_UNDERRUN) {
|
|
#ifdef EP_LOCAL_STATS
|
|
sc->tx_underrun++;
|
|
#endif
|
|
} else {
|
|
if (status & TXS_JABBER);
|
|
else
|
|
++ifp->if_collisions;
|
|
/* TXS_MAX_COLLISION
|
|
* we shouldn't get
|
|
* here
|
|
*/
|
|
}
|
|
++ifp->if_oerrors;
|
|
CSR_WRITE_2(sc, EP_COMMAND, TX_ENABLE);
|
|
/*
|
|
* To have a tx_avail_int but giving
|
|
* the chance to the Reception
|
|
*/
|
|
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
|
|
CSR_WRITE_2(sc, EP_COMMAND,
|
|
SET_TX_AVAIL_THRESH | 8);
|
|
}
|
|
/* pops up the next status */
|
|
CSR_WRITE_1(sc, EP_W1_TX_STATUS, 0x0);
|
|
} /* while */
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
|
GO_WINDOW(sc, 1);
|
|
CSR_READ_2(sc, EP_W1_FREE_TX);
|
|
epstart_locked(ifp);
|
|
} /* end TX_COMPLETE */
|
|
}
|
|
|
|
CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH); /* ACK int Latch */
|
|
|
|
if ((status = CSR_READ_2(sc, EP_STATUS)) & S_5_INTS)
|
|
goto rescan;
|
|
|
|
/* re-enable Ints */
|
|
CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK | S_5_INTS);
|
|
EP_UNLOCK(sc);
|
|
}
|
|
|
|
static void
|
|
epread(struct ep_softc *sc)
|
|
{
|
|
struct mbuf *top, *mcur, *m;
|
|
struct ifnet *ifp;
|
|
int lenthisone;
|
|
short rx_fifo2, status;
|
|
short rx_fifo;
|
|
|
|
/* XXX Must be called with sc locked */
|
|
|
|
ifp = sc->ifp;
|
|
status = CSR_READ_2(sc, EP_W1_RX_STATUS);
|
|
|
|
read_again:
|
|
|
|
if (status & ERR_RX) {
|
|
++ifp->if_ierrors;
|
|
if (status & ERR_RX_OVERRUN) {
|
|
/*
|
|
* We can think the rx latency is actually
|
|
* greather than we expect
|
|
*/
|
|
#ifdef EP_LOCAL_STATS
|
|
if (EP_FTST(sc, F_RX_FIRST))
|
|
sc->rx_overrunf++;
|
|
else
|
|
sc->rx_overrunl++;
|
|
#endif
|
|
}
|
|
goto out;
|
|
}
|
|
rx_fifo = rx_fifo2 = status & RX_BYTES_MASK;
|
|
|
|
if (EP_FTST(sc, F_RX_FIRST)) {
|
|
MGETHDR(m, M_DONTWAIT, MT_DATA);
|
|
if (!m)
|
|
goto out;
|
|
if (rx_fifo >= MINCLSIZE)
|
|
MCLGET(m, M_DONTWAIT);
|
|
sc->top = sc->mcur = top = m;
|
|
#define EROUND ((sizeof(struct ether_header) + 3) & ~3)
|
|
#define EOFF (EROUND - sizeof(struct ether_header))
|
|
top->m_data += EOFF;
|
|
|
|
/* Read what should be the header. */
|
|
CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
|
|
mtod(top, uint16_t *), sizeof(struct ether_header) / 2);
|
|
top->m_len = sizeof(struct ether_header);
|
|
rx_fifo -= sizeof(struct ether_header);
|
|
sc->cur_len = rx_fifo2;
|
|
} else {
|
|
/* come here if we didn't have a complete packet last time */
|
|
top = sc->top;
|
|
m = sc->mcur;
|
|
sc->cur_len += rx_fifo2;
|
|
}
|
|
|
|
/* Reads what is left in the RX FIFO */
|
|
while (rx_fifo > 0) {
|
|
lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
|
|
if (lenthisone == 0) { /* no room in this one */
|
|
mcur = m;
|
|
MGET(m, M_DONTWAIT, MT_DATA);
|
|
if (!m)
|
|
goto out;
|
|
if (rx_fifo >= MINCLSIZE)
|
|
MCLGET(m, M_DONTWAIT);
|
|
m->m_len = 0;
|
|
mcur->m_next = m;
|
|
lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
|
|
}
|
|
if (EP_FTST(sc, F_ACCESS_32_BITS)) {
|
|
/* default for EISA configured cards */
|
|
CSR_READ_MULTI_4(sc, EP_W1_RX_PIO_RD_1,
|
|
(uint32_t *)(mtod(m, caddr_t)+m->m_len),
|
|
lenthisone / 4);
|
|
m->m_len += (lenthisone & ~3);
|
|
if (lenthisone & 3)
|
|
CSR_READ_MULTI_1(sc, EP_W1_RX_PIO_RD_1,
|
|
mtod(m, caddr_t)+m->m_len, lenthisone & 3);
|
|
m->m_len += (lenthisone & 3);
|
|
} else {
|
|
CSR_READ_MULTI_2(sc, EP_W1_RX_PIO_RD_1,
|
|
(uint16_t *)(mtod(m, caddr_t)+m->m_len),
|
|
lenthisone / 2);
|
|
m->m_len += lenthisone;
|
|
if (lenthisone & 1)
|
|
*(mtod(m, caddr_t)+m->m_len - 1) =
|
|
CSR_READ_1(sc, EP_W1_RX_PIO_RD_1);
|
|
}
|
|
rx_fifo -= lenthisone;
|
|
}
|
|
|
|
if (status & ERR_RX_INCOMPLETE) {
|
|
/* we haven't received the complete packet */
|
|
sc->mcur = m;
|
|
#ifdef EP_LOCAL_STATS
|
|
/* to know how often we come here */
|
|
sc->rx_no_first++;
|
|
#endif
|
|
EP_FRST(sc, F_RX_FIRST);
|
|
status = CSR_READ_2(sc, EP_W1_RX_STATUS);
|
|
if (!status & ERR_RX_INCOMPLETE) {
|
|
/*
|
|
* We see if by now, the packet has completly
|
|
* arrived
|
|
*/
|
|
goto read_again;
|
|
}
|
|
CSR_WRITE_2(sc, EP_COMMAND,
|
|
SET_RX_EARLY_THRESH | RX_NEXT_EARLY_THRESH);
|
|
return;
|
|
}
|
|
CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
|
|
++ifp->if_ipackets;
|
|
EP_FSET(sc, F_RX_FIRST);
|
|
top->m_pkthdr.rcvif = sc->ifp;
|
|
top->m_pkthdr.len = sc->cur_len;
|
|
|
|
/*
|
|
* Drop locks before calling if_input() since it may re-enter
|
|
* ep_start() in the netisr case. This would result in a
|
|
* lock reversal. Better performance might be obtained by
|
|
* chaining all packets received, dropping the lock, and then
|
|
* calling if_input() on each one.
|
|
*/
|
|
EP_UNLOCK(sc);
|
|
(*ifp->if_input) (ifp, top);
|
|
EP_LOCK(sc);
|
|
sc->top = 0;
|
|
EP_BUSY_WAIT(sc);
|
|
CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
|
|
return;
|
|
|
|
out:
|
|
CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
|
|
if (sc->top) {
|
|
m_freem(sc->top);
|
|
sc->top = 0;
|
|
#ifdef EP_LOCAL_STATS
|
|
sc->rx_no_mbuf++;
|
|
#endif
|
|
}
|
|
EP_FSET(sc, F_RX_FIRST);
|
|
EP_BUSY_WAIT(sc);
|
|
CSR_WRITE_2(sc, EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
|
|
}
|
|
|
|
static int
|
|
ep_ifmedia_upd(struct ifnet *ifp)
|
|
{
|
|
struct ep_softc *sc = ifp->if_softc;
|
|
int i = 0, j;
|
|
|
|
GO_WINDOW(sc, 0);
|
|
CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
|
|
GO_WINDOW(sc, 4);
|
|
CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, DISABLE_UTP);
|
|
GO_WINDOW(sc, 0);
|
|
|
|
switch (IFM_SUBTYPE(sc->ifmedia.ifm_media)) {
|
|
case IFM_10_T:
|
|
if (sc->ep_connectors & UTP) {
|
|
i = ACF_CONNECTOR_UTP;
|
|
GO_WINDOW(sc, 4);
|
|
CSR_WRITE_2(sc, EP_W4_MEDIA_TYPE, ENABLE_UTP);
|
|
}
|
|
break;
|
|
case IFM_10_2:
|
|
if (sc->ep_connectors & BNC) {
|
|
i = ACF_CONNECTOR_BNC;
|
|
CSR_WRITE_2(sc, EP_COMMAND, START_TRANSCEIVER);
|
|
DELAY(DELAY_MULTIPLE * 1000);
|
|
}
|
|
break;
|
|
case IFM_10_5:
|
|
if (sc->ep_connectors & AUI)
|
|
i = ACF_CONNECTOR_AUI;
|
|
break;
|
|
default:
|
|
i = sc->ep_connector;
|
|
device_printf(sc->dev,
|
|
"strange connector type in EEPROM: assuming AUI\n");
|
|
}
|
|
|
|
GO_WINDOW(sc, 0);
|
|
j = CSR_READ_2(sc, EP_W0_ADDRESS_CFG) & 0x3fff;
|
|
CSR_WRITE_2(sc, EP_W0_ADDRESS_CFG, j | (i << ACF_CONNECTOR_BITS));
|
|
|
|
return (0);
|
|
}
|
|
|
|
static void
|
|
ep_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
|
|
{
|
|
struct ep_softc *sc = ifp->if_softc;
|
|
|
|
ifmr->ifm_active = sc->ifmedia.ifm_media;
|
|
}
|
|
|
|
static int
|
|
epioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
|
|
{
|
|
struct ep_softc *sc = ifp->if_softc;
|
|
struct ifreq *ifr = (struct ifreq *) data;
|
|
int error = 0;
|
|
|
|
switch (cmd) {
|
|
case SIOCSIFFLAGS:
|
|
EP_LOCK(sc);
|
|
if (((ifp->if_flags & IFF_UP) == 0) &&
|
|
(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
|
|
ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
|
|
epstop(sc);
|
|
} else
|
|
/* reinitialize card on any parameter change */
|
|
epinit_locked(sc);
|
|
EP_UNLOCK(sc);
|
|
break;
|
|
case SIOCADDMULTI:
|
|
case SIOCDELMULTI:
|
|
/*
|
|
* The Etherlink III has no programmable multicast
|
|
* filter. We always initialize the card to be
|
|
* promiscuous to multicast, since we're always a
|
|
* member of the ALL-SYSTEMS group, so there's no
|
|
* need to process SIOC*MULTI requests.
|
|
*/
|
|
error = 0;
|
|
break;
|
|
case SIOCSIFMEDIA:
|
|
case SIOCGIFMEDIA:
|
|
if (!sc->epb.mii_trans)
|
|
error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, cmd);
|
|
else
|
|
error = EINVAL;
|
|
break;
|
|
default:
|
|
error = ether_ioctl(ifp, cmd, data);
|
|
break;
|
|
}
|
|
return (error);
|
|
}
|
|
|
|
static void
|
|
epwatchdog(struct ifnet *ifp)
|
|
{
|
|
struct ep_softc *sc = ifp->if_softc;
|
|
|
|
if (sc->gone)
|
|
return;
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
|
epstart(ifp);
|
|
ep_intr(ifp->if_softc);
|
|
}
|
|
|
|
static void
|
|
epstop(struct ep_softc *sc)
|
|
{
|
|
CSR_WRITE_2(sc, EP_COMMAND, RX_DISABLE);
|
|
CSR_WRITE_2(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
|
|
EP_BUSY_WAIT(sc);
|
|
|
|
CSR_WRITE_2(sc, EP_COMMAND, TX_DISABLE);
|
|
CSR_WRITE_2(sc, EP_COMMAND, STOP_TRANSCEIVER);
|
|
DELAY(800);
|
|
|
|
CSR_WRITE_2(sc, EP_COMMAND, RX_RESET);
|
|
EP_BUSY_WAIT(sc);
|
|
CSR_WRITE_2(sc, EP_COMMAND, TX_RESET);
|
|
EP_BUSY_WAIT(sc);
|
|
|
|
CSR_WRITE_2(sc, EP_COMMAND, C_INTR_LATCH);
|
|
CSR_WRITE_2(sc, EP_COMMAND, SET_RD_0_MASK);
|
|
CSR_WRITE_2(sc, EP_COMMAND, SET_INTR_MASK);
|
|
CSR_WRITE_2(sc, EP_COMMAND, SET_RX_FILTER);
|
|
}
|