329 lines
9.7 KiB
C
329 lines
9.7 KiB
C
/*******************************************************************************
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Copyright (c) 2006-2007, Myricom Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Neither the name of the Myricom Inc, nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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$FreeBSD$
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***************************************************************************/
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#ifndef _myri10ge_mcp_h
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#define _myri10ge_mcp_h
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#define MXGEFW_VERSION_MAJOR 1
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#define MXGEFW_VERSION_MINOR 4
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#ifdef MXGEFW
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typedef signed char int8_t;
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typedef signed short int16_t;
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typedef signed int int32_t;
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typedef signed long long int64_t;
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typedef unsigned char uint8_t;
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typedef unsigned short uint16_t;
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typedef unsigned int uint32_t;
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typedef unsigned long long uint64_t;
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#endif
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/* 8 Bytes */
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struct mcp_dma_addr {
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uint32_t high;
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uint32_t low;
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};
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typedef struct mcp_dma_addr mcp_dma_addr_t;
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/* 4 Bytes */
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struct mcp_slot {
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uint16_t checksum;
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uint16_t length;
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};
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typedef struct mcp_slot mcp_slot_t;
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/* 64 Bytes */
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struct mcp_cmd {
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uint32_t cmd;
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uint32_t data0; /* will be low portion if data > 32 bits */
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/* 8 */
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uint32_t data1; /* will be high portion if data > 32 bits */
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uint32_t data2; /* currently unused.. */
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/* 16 */
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struct mcp_dma_addr response_addr;
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/* 24 */
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uint8_t pad[40];
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};
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typedef struct mcp_cmd mcp_cmd_t;
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/* 8 Bytes */
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struct mcp_cmd_response {
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uint32_t data;
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uint32_t result;
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};
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typedef struct mcp_cmd_response mcp_cmd_response_t;
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/*
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flags used in mcp_kreq_ether_send_t:
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The SMALL flag is only needed in the first segment. It is raised
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for packets that are total less or equal 512 bytes.
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The CKSUM flag must be set in all segments.
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The PADDED flags is set if the packet needs to be padded, and it
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must be set for all segments.
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The MXGEFW_FLAGS_ALIGN_ODD must be set if the cumulative
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length of all previous segments was odd.
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*/
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#define MXGEFW_FLAGS_SMALL 0x1
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#define MXGEFW_FLAGS_TSO_HDR 0x1
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#define MXGEFW_FLAGS_FIRST 0x2
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#define MXGEFW_FLAGS_ALIGN_ODD 0x4
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#define MXGEFW_FLAGS_CKSUM 0x8
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#define MXGEFW_FLAGS_TSO_LAST 0x8
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#define MXGEFW_FLAGS_NO_TSO 0x10
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#define MXGEFW_FLAGS_TSO_CHOP 0x10
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#define MXGEFW_FLAGS_TSO_PLD 0x20
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#define MXGEFW_SEND_SMALL_SIZE 1520
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#define MXGEFW_MAX_MTU 9400
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union mcp_pso_or_cumlen {
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uint16_t pseudo_hdr_offset;
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uint16_t cum_len;
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};
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typedef union mcp_pso_or_cumlen mcp_pso_or_cumlen_t;
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#define MXGEFW_MAX_SEND_DESC 12
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#define MXGEFW_PAD 2
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/* 16 Bytes */
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struct mcp_kreq_ether_send {
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uint32_t addr_high;
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uint32_t addr_low;
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uint16_t pseudo_hdr_offset;
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uint16_t length;
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uint8_t pad;
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uint8_t rdma_count;
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uint8_t cksum_offset; /* where to start computing cksum */
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uint8_t flags; /* as defined above */
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};
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typedef struct mcp_kreq_ether_send mcp_kreq_ether_send_t;
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/* 8 Bytes */
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struct mcp_kreq_ether_recv {
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uint32_t addr_high;
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uint32_t addr_low;
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};
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typedef struct mcp_kreq_ether_recv mcp_kreq_ether_recv_t;
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/* Commands */
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#define MXGEFW_BOOT_HANDOFF 0xfc0000
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#define MXGEFW_BOOT_DUMMY_RDMA 0xfc01c0
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#define MXGEFW_ETH_CMD 0xf80000
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#define MXGEFW_ETH_SEND_4 0x200000
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#define MXGEFW_ETH_SEND_1 0x240000
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#define MXGEFW_ETH_SEND_2 0x280000
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#define MXGEFW_ETH_SEND_3 0x2c0000
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#define MXGEFW_ETH_RECV_SMALL 0x300000
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#define MXGEFW_ETH_RECV_BIG 0x340000
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#define MXGEFW_ETH_SEND(n) (0x200000 + (((n) & 0x03) * 0x40000))
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#define MXGEFW_ETH_SEND_OFFSET(n) (MXGEFW_ETH_SEND(n) - MXGEFW_ETH_SEND_4)
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enum myri10ge_mcp_cmd_type {
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MXGEFW_CMD_NONE = 0,
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/* Reset the mcp, it is left in a safe state, waiting
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for the driver to set all its parameters */
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MXGEFW_CMD_RESET,
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/* get the version number of the current firmware..
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(may be available in the eeprom strings..? */
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MXGEFW_GET_MCP_VERSION,
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/* Parameters which must be set by the driver before it can
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issue MXGEFW_CMD_ETHERNET_UP. They persist until the next
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MXGEFW_CMD_RESET is issued */
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MXGEFW_CMD_SET_INTRQ_DMA,
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MXGEFW_CMD_SET_BIG_BUFFER_SIZE, /* in bytes, power of 2 */
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MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, /* in bytes */
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/* Parameters which refer to lanai SRAM addresses where the
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driver must issue PIO writes for various things */
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MXGEFW_CMD_GET_SEND_OFFSET,
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MXGEFW_CMD_GET_SMALL_RX_OFFSET,
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MXGEFW_CMD_GET_BIG_RX_OFFSET,
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MXGEFW_CMD_GET_IRQ_ACK_OFFSET,
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MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
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/* Parameters which refer to rings stored on the MCP,
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and whose size is controlled by the mcp */
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MXGEFW_CMD_GET_SEND_RING_SIZE, /* in bytes */
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MXGEFW_CMD_GET_RX_RING_SIZE, /* in bytes */
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/* Parameters which refer to rings stored in the host,
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and whose size is controlled by the host. Note that
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all must be physically contiguous and must contain
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a power of 2 number of entries. */
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MXGEFW_CMD_SET_INTRQ_SIZE, /* in bytes */
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/* command to bring ethernet interface up. Above parameters
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(plus mtu & mac address) must have been exchanged prior
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to issuing this command */
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MXGEFW_CMD_ETHERNET_UP,
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/* command to bring ethernet interface down. No further sends
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or receives may be processed until an MXGEFW_CMD_ETHERNET_UP
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is issued, and all interrupt queues must be flushed prior
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to ack'ing this command */
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MXGEFW_CMD_ETHERNET_DOWN,
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/* commands the driver may issue live, without resetting
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the nic. Note that increasing the mtu "live" should
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only be done if the driver has already supplied buffers
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sufficiently large to handle the new mtu. Decreasing
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the mtu live is safe */
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MXGEFW_CMD_SET_MTU,
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MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, /* in microseconds */
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MXGEFW_CMD_SET_STATS_INTERVAL, /* in microseconds */
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MXGEFW_CMD_SET_STATS_DMA_OBSOLETE, /* replaced by SET_STATS_DMA_V2 */
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MXGEFW_ENABLE_PROMISC,
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MXGEFW_DISABLE_PROMISC,
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MXGEFW_SET_MAC_ADDRESS,
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MXGEFW_ENABLE_FLOW_CONTROL,
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MXGEFW_DISABLE_FLOW_CONTROL,
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/* do a DMA test
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data0,data1 = DMA address
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data2 = RDMA length (MSH), WDMA length (LSH)
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command return data = repetitions (MSH), 0.5-ms ticks (LSH)
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*/
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MXGEFW_DMA_TEST,
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MXGEFW_ENABLE_ALLMULTI,
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MXGEFW_DISABLE_ALLMULTI,
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/* returns MXGEFW_CMD_ERROR_MULTICAST
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if there is no room in the cache
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data0,MSH(data1) = multicast group address */
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MXGEFW_JOIN_MULTICAST_GROUP,
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/* returns MXGEFW_CMD_ERROR_MULTICAST
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if the address is not in the cache,
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or is equal to FF-FF-FF-FF-FF-FF
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data0,MSH(data1) = multicast group address */
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MXGEFW_LEAVE_MULTICAST_GROUP,
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MXGEFW_LEAVE_ALL_MULTICAST_GROUPS,
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MXGEFW_CMD_SET_STATS_DMA_V2,
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/* data0, data1 = bus addr,
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data2 = sizeof(struct mcp_irq_data) from driver point of view, allows
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adding new stuff to mcp_irq_data without changing the ABI */
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MXGEFW_CMD_UNALIGNED_TEST,
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/* same than DMA_TEST (same args) but abort with UNALIGNED on unaligned
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chipset */
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MXGEFW_CMD_UNALIGNED_STATUS,
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/* return data = boolean, true if the chipset is known to be unaligned */
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MXGEFW_CMD_ALWAYS_USE_N_BIG_BUFFERS,
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/* data0 = number of big buffers to use. It must be 0 or a power of 2.
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* 0 indicates that the NIC consumes as many buffers as they are required
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* for packet. This is the default behavior.
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* A power of 2 number indicates that the NIC always uses the specified
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* number of buffers for each big receive packet.
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* It is up to the driver to ensure that this value is big enough for
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* the NIC to be able to receive maximum-sized packets.
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*/
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};
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typedef enum myri10ge_mcp_cmd_type myri10ge_mcp_cmd_type_t;
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enum myri10ge_mcp_cmd_status {
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MXGEFW_CMD_OK = 0,
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MXGEFW_CMD_UNKNOWN,
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MXGEFW_CMD_ERROR_RANGE,
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MXGEFW_CMD_ERROR_BUSY,
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MXGEFW_CMD_ERROR_EMPTY,
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MXGEFW_CMD_ERROR_CLOSED,
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MXGEFW_CMD_ERROR_HASH_ERROR,
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MXGEFW_CMD_ERROR_BAD_PORT,
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MXGEFW_CMD_ERROR_RESOURCES,
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MXGEFW_CMD_ERROR_MULTICAST,
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MXGEFW_CMD_ERROR_UNALIGNED
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};
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typedef enum myri10ge_mcp_cmd_status myri10ge_mcp_cmd_status_t;
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#define MXGEFW_OLD_IRQ_DATA_LEN 40
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struct mcp_irq_data {
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/* add new counters at the beginning */
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uint32_t future_use[1];
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uint32_t dropped_pause;
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uint32_t dropped_unicast_filtered;
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uint32_t dropped_bad_crc32;
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uint32_t dropped_bad_phy;
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uint32_t dropped_multicast_filtered;
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/* 40 Bytes */
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uint32_t send_done_count;
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#define MXGEFW_LINK_DOWN 0
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#define MXGEFW_LINK_UP 1
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#define MXGEFW_LINK_MYRINET 2
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#define MXGEFW_LINK_UNKNOWN 3
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uint32_t link_up;
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uint32_t dropped_link_overflow;
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uint32_t dropped_link_error_or_filtered;
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uint32_t dropped_runt;
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uint32_t dropped_overrun;
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uint32_t dropped_no_small_buffer;
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uint32_t dropped_no_big_buffer;
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uint32_t rdma_tags_available;
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uint8_t tx_stopped;
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uint8_t link_down;
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uint8_t stats_updated;
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uint8_t valid;
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};
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typedef struct mcp_irq_data mcp_irq_data_t;
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#endif /* _myri10ge_mcp_h */
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