3395ab28eb
* FreeBSD stores addresses in 8 bit format, but the OPAL API requires the 7-bit address, and encodes the direction elsewhere. Behave like other i2c drivers, and shift accordingly. * The OPAL API can already handle multiple requests in flight. Change the async token to be private to the thread, so as not to stomp across i2c accesses, remove the limitation error message, and use the correct message index to transfer all messages in the list. * Micro-optimize the async handler to not continuously call pmap_kextract() when spin-waiting for the operation to complete. This has been tested by hexdumping an EEPROM attached via the icee(4) driver.
259 lines
6.2 KiB
C
259 lines
6.2 KiB
C
/*-
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* Copyright (c) 2017-2018 QCM Technologies.
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* Copyright (c) 2017-2018 Semihalf.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/endian.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/mbuf.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/iicbus/iicbus.h>
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#include "iicbus_if.h"
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#include "opal.h"
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#ifdef FDT
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#endif
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struct opal_i2c_softc
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{
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device_t dev;
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device_t iicbus;
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uint32_t opal_id;
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struct mtx sc_mtx;
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};
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/* OPAL I2C request */
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struct opal_i2c_request {
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uint8_t type;
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#define OPAL_I2C_RAW_READ 0
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#define OPAL_I2C_RAW_WRITE 1
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#define OPAL_I2C_SM_READ 2
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#define OPAL_I2C_SM_WRITE 3
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uint8_t flags;
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uint8_t subaddr_sz; /* Max 4 */
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uint8_t reserved;
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uint16_t addr; /* 7 or 10 bit address */
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uint16_t reserved2;
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uint32_t subaddr; /* Sub-address if any */
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uint32_t size; /* Data size */
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uint64_t buffer_pa; /* Buffer real address */
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};
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static int opal_i2c_attach(device_t);
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static int opal_i2c_callback(device_t, int, caddr_t);
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static int opal_i2c_probe(device_t);
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static int opal_i2c_transfer(device_t, struct iic_msg *, uint32_t);
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static int i2c_opal_send_request(uint32_t, struct opal_i2c_request *);
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static phandle_t opal_i2c_get_node(device_t bus, device_t dev);
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static device_method_t opal_i2c_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, opal_i2c_probe),
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DEVMETHOD(device_attach, opal_i2c_attach),
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/* iicbus interface */
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DEVMETHOD(iicbus_callback, opal_i2c_callback),
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DEVMETHOD(iicbus_transfer, opal_i2c_transfer),
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DEVMETHOD(ofw_bus_get_node, opal_i2c_get_node),
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DEVMETHOD_END
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};
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#define I2C_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
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#define I2C_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
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#define I2C_LOCK_INIT(_sc) \
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mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
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"i2c", MTX_DEF)
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static devclass_t opal_i2c_devclass;
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static driver_t opal_i2c_driver = {
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"iichb",
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opal_i2c_methods,
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sizeof(struct opal_i2c_softc),
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};
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static int
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opal_i2c_probe(device_t dev)
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{
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if (!(ofw_bus_is_compatible(dev, "ibm,opal-i2c")))
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return (ENXIO);
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device_set_desc(dev, "opal-i2c");
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return (0);
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}
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static int
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opal_i2c_attach(device_t dev)
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{
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struct opal_i2c_softc *sc;
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int len;
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sc = device_get_softc(dev);
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sc->dev = dev;
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len = OF_getproplen(ofw_bus_get_node(dev), "ibm,opal-id");
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if (len <= 0)
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return (EINVAL);
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OF_getencprop(ofw_bus_get_node(dev), "ibm,opal-id", &sc->opal_id, len);
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if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL) {
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device_printf(dev, "could not allocate iicbus instance\n");
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return (EINVAL);
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}
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I2C_LOCK_INIT(sc);
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return (bus_generic_attach(dev));
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}
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static int
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opal_get_async_rc(struct opal_msg msg)
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{
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if (msg.msg_type != OPAL_MSG_ASYNC_COMP)
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return OPAL_PARAMETER;
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else
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return htobe64(msg.params[1]);
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}
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static int
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i2c_opal_send_request(uint32_t bus_id, struct opal_i2c_request *req)
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{
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struct opal_msg msg;
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uint64_t token;
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uint64_t msg_addr;
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int rc;
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/*
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* XXX:
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* Async tokens should be managed globally. Since there are only a very
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* few places now, use a punning of the stack address of the message.
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*/
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token = (uintptr_t)&msg;
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memset(&msg, 0, sizeof(msg));
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msg_addr = pmap_kextract((vm_offset_t)&msg);
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rc = opal_call(OPAL_I2C_REQUEST, token, bus_id,
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pmap_kextract((uint64_t)req));
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if (rc != OPAL_ASYNC_COMPLETION)
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return (rc);
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do {
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rc = opal_call(OPAL_CHECK_ASYNC_COMPLETION,
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msg_addr, sizeof(msg), token);
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} while (rc == OPAL_BUSY);
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if (rc != OPAL_SUCCESS)
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return (rc);
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rc = opal_get_async_rc(msg);
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return rc;
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}
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static int
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opal_i2c_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
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{
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struct opal_i2c_softc *sc;
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int i, err = 0;
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struct opal_i2c_request req;
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sc = device_get_softc(dev);
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memset(&req, 0, sizeof(req));
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I2C_LOCK(sc);
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for (i = 0; i < nmsgs; i++) {
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req.type = (msgs[i].flags & IIC_M_RD) ?
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OPAL_I2C_RAW_READ : OPAL_I2C_RAW_WRITE;
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req.addr = htobe16(msgs[i].slave >> 1);
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req.size = htobe32(msgs[i].len);
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req.buffer_pa = htobe64(pmap_kextract((uint64_t)msgs[i].buf));
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err = i2c_opal_send_request(sc->opal_id, &req);
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}
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I2C_UNLOCK(sc);
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return (err);
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}
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static int
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opal_i2c_callback(device_t dev, int index, caddr_t data)
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{
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int error = 0;
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switch (index) {
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case IIC_REQUEST_BUS:
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break;
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case IIC_RELEASE_BUS:
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break;
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default:
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error = EINVAL;
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}
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return (error);
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}
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static phandle_t
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opal_i2c_get_node(device_t bus, device_t dev)
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{
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/* Share controller node with iibus device. */
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return (ofw_bus_get_node(bus));
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}
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DRIVER_MODULE(opal_i2c, opal_i2cm, opal_i2c_driver, opal_i2c_devclass, NULL,
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NULL);
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DRIVER_MODULE(iicbus, opal_i2c, iicbus_driver, iicbus_devclass, NULL, NULL);
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MODULE_DEPEND(opal_i2c, iicbus, 1, 1, 1);
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