112 lines
3.6 KiB
C++
112 lines
3.6 KiB
C++
//===-- LiveInterval.cpp - Live Interval Representation -------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the LiveRegUnits utility for tracking liveness of
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// physical register units across machine instructions in forward or backward
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// order.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/LiveRegUnits.h"
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#include "llvm/CodeGen/MachineInstrBundle.h"
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using namespace llvm;
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/// Return true if the given MachineOperand clobbers the given register unit.
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/// A register unit is only clobbered if all its super-registers are clobbered.
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static bool operClobbersUnit(const MachineOperand *MO, unsigned Unit,
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const MCRegisterInfo *MCRI) {
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for (MCRegUnitRootIterator RI(Unit, MCRI); RI.isValid(); ++RI) {
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for (MCSuperRegIterator SI(*RI, MCRI, true); SI.isValid(); ++SI) {
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if (!MO->clobbersPhysReg(*SI))
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return false;
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}
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}
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return true;
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}
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/// We assume the high bits of a physical super register are not preserved
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/// unless the instruction has an implicit-use operand reading the
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/// super-register or a register unit for the upper bits is available.
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void LiveRegUnits::removeRegsInMask(const MachineOperand &Op,
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const MCRegisterInfo &MCRI) {
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SparseSet<unsigned>::iterator LUI = LiveUnits.begin();
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while (LUI != LiveUnits.end()) {
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if (operClobbersUnit(&Op, *LUI, &MCRI))
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LUI = LiveUnits.erase(LUI);
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else
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++LUI;
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}
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}
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void LiveRegUnits::stepBackward(const MachineInstr &MI,
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const MCRegisterInfo &MCRI) {
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// Remove defined registers and regmask kills from the set.
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for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
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if (O->isReg()) {
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if (!O->isDef())
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continue;
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unsigned Reg = O->getReg();
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if (Reg == 0)
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continue;
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removeReg(Reg, MCRI);
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} else if (O->isRegMask()) {
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removeRegsInMask(*O, MCRI);
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}
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}
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// Add uses to the set.
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for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
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if (!O->isReg() || !O->readsReg() || O->isUndef())
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continue;
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unsigned Reg = O->getReg();
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if (Reg == 0)
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continue;
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addReg(Reg, MCRI);
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}
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}
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/// Uses with kill flag get removed from the set, defs added. If possible
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/// use StepBackward() instead of this function because some kill flags may
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/// be missing.
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void LiveRegUnits::stepForward(const MachineInstr &MI,
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const MCRegisterInfo &MCRI) {
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SmallVector<unsigned, 4> Defs;
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// Remove killed registers from the set.
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for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
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if (O->isReg()) {
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unsigned Reg = O->getReg();
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if (Reg == 0)
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continue;
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if (O->isDef()) {
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if (!O->isDead())
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Defs.push_back(Reg);
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} else {
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if (!O->isKill())
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continue;
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assert(O->isUse());
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removeReg(Reg, MCRI);
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}
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} else if (O->isRegMask()) {
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removeRegsInMask(*O, MCRI);
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}
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}
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// Add defs to the set.
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for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
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addReg(Defs[i], MCRI);
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}
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}
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/// Adds all registers in the live-in list of block @p BB.
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void LiveRegUnits::addLiveIns(const MachineBasicBlock *MBB,
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const MCRegisterInfo &MCRI) {
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for (MachineBasicBlock::livein_iterator L = MBB->livein_begin(),
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LE = MBB->livein_end(); L != LE; ++L) {
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addReg(*L, MCRI);
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}
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}
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