694 lines
18 KiB
C
694 lines
18 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (C) 2018 Marvell International Ltd.
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*
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* Author: Jayachandran C Nair <jchandra@freebsd.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_acpi.h"
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <machine/intr.h>
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#include <contrib/dev/acpica/include/acpi.h>
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#include <contrib/dev/acpica/include/accommon.h>
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#include <contrib/dev/acpica/include/actables.h>
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#include <dev/acpica/acpivar.h>
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/*
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* Track next XREF available for ITS groups.
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*/
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static u_int acpi_its_xref = ACPI_MSI_XREF;
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/*
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* Some types of IORT nodes have a set of mappings. Each of them map
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* a range of device IDs [base..end] from the current node to another
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* node. The corresponding device IDs on destination node starts at
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* outbase.
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*/
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struct iort_map_entry {
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u_int base;
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u_int end;
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u_int outbase;
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u_int flags;
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u_int out_node_offset;
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struct iort_node *out_node;
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};
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/*
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* The ITS group node does not have any outgoing mappings. It has a
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* of a list of GIC ITS blocks which can handle the device ID. We
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* will store the PIC XREF used by the block and the blocks proximity
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* data here, so that it can be retrieved together.
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*/
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struct iort_its_entry {
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u_int its_id;
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u_int xref;
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int pxm;
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};
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struct iort_named_component
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{
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UINT32 NodeFlags;
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UINT64 MemoryProperties;
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UINT8 MemoryAddressLimit;
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char DeviceName[32]; /* Path of namespace object */
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};
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/*
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* IORT node. Each node has some device specific data depending on the
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* type of the node. The node can also have a set of mappings, OR in
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* case of ITS group nodes a set of ITS entries.
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* The nodes are kept in a TAILQ by type.
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*/
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struct iort_node {
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TAILQ_ENTRY(iort_node) next; /* next entry with same type */
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enum AcpiIortNodeType type; /* ACPI type */
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u_int node_offset; /* offset in IORT - node ID */
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u_int nentries; /* items in array below */
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u_int usecount; /* for bookkeeping */
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u_int revision; /* node revision */
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union {
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ACPI_IORT_ROOT_COMPLEX pci_rc; /* PCI root complex */
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ACPI_IORT_SMMU smmu;
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ACPI_IORT_SMMU_V3 smmu_v3;
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struct iort_named_component named_comp;
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} data;
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union {
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struct iort_map_entry *mappings; /* node mappings */
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struct iort_its_entry *its; /* ITS IDs array */
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} entries;
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};
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/* Lists for each of the types. */
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static TAILQ_HEAD(, iort_node) pci_nodes = TAILQ_HEAD_INITIALIZER(pci_nodes);
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static TAILQ_HEAD(, iort_node) smmu_nodes = TAILQ_HEAD_INITIALIZER(smmu_nodes);
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static TAILQ_HEAD(, iort_node) its_groups = TAILQ_HEAD_INITIALIZER(its_groups);
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static TAILQ_HEAD(, iort_node) named_nodes = TAILQ_HEAD_INITIALIZER(named_nodes);
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static int
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iort_entry_get_id_mapping_index(struct iort_node *node)
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{
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switch(node->type) {
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case ACPI_IORT_NODE_SMMU_V3:
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/* The ID mapping field was added in version 1 */
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if (node->revision < 1)
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return (-1);
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/*
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* If all the control interrupts are GISCV based the ID
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* mapping field is ignored.
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*/
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if (node->data.smmu_v3.EventGsiv != 0 &&
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node->data.smmu_v3.PriGsiv != 0 &&
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node->data.smmu_v3.GerrGsiv != 0 &&
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node->data.smmu_v3.SyncGsiv != 0)
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return (-1);
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if (node->data.smmu_v3.IdMappingIndex >= node->nentries)
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return (-1);
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return (node->data.smmu_v3.IdMappingIndex);
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case ACPI_IORT_NODE_PMCG:
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return (0);
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default:
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break;
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}
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return (-1);
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}
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/*
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* Lookup an ID in the mappings array. If successful, map the input ID
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* to the output ID and return the output node found.
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*/
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static struct iort_node *
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iort_entry_lookup(struct iort_node *node, u_int id, u_int *outid)
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{
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struct iort_map_entry *entry;
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int i, id_map;
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id_map = iort_entry_get_id_mapping_index(node);
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entry = node->entries.mappings;
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for (i = 0; i < node->nentries; i++, entry++) {
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if (i == id_map)
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continue;
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if (entry->base <= id && id <= entry->end)
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break;
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}
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if (i == node->nentries)
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return (NULL);
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if ((entry->flags & ACPI_IORT_ID_SINGLE_MAPPING) == 0)
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*outid = entry->outbase + (id - entry->base);
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else
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*outid = entry->outbase;
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return (entry->out_node);
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}
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/*
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* Perform an additional lookup in case of SMMU node and ITS outtype.
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*/
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static struct iort_node *
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iort_smmu_trymap(struct iort_node *node, u_int outtype, u_int *outid)
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{
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/* Original node can be not found. */
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if (!node)
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return (NULL);
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/* Node can be SMMU or ITS. If SMMU, we need another lookup. */
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if (outtype == ACPI_IORT_NODE_ITS_GROUP &&
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(node->type == ACPI_IORT_NODE_SMMU_V3 ||
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node->type == ACPI_IORT_NODE_SMMU)) {
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node = iort_entry_lookup(node, *outid, outid);
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if (node == NULL)
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return (NULL);
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}
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KASSERT(node->type == outtype, ("mapping fail"));
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return (node);
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}
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/*
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* Map a PCI RID to a SMMU node or an ITS node, based on outtype.
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*/
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static struct iort_node *
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iort_pci_rc_map(u_int seg, u_int rid, u_int outtype, u_int *outid)
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{
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struct iort_node *node, *out_node;
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u_int nxtid;
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out_node = NULL;
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TAILQ_FOREACH(node, &pci_nodes, next) {
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if (node->data.pci_rc.PciSegmentNumber != seg)
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continue;
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out_node = iort_entry_lookup(node, rid, &nxtid);
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if (out_node != NULL)
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break;
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}
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out_node = iort_smmu_trymap(out_node, outtype, &nxtid);
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if (out_node)
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*outid = nxtid;
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return (out_node);
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}
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/*
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* Map a named component node to a SMMU node or an ITS node, based on outtype.
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*/
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static struct iort_node *
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iort_named_comp_map(const char *devname, u_int rid, u_int outtype, u_int *outid)
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{
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struct iort_node *node, *out_node;
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u_int nxtid;
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out_node = NULL;
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TAILQ_FOREACH(node, &named_nodes, next) {
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if (strstr(node->data.named_comp.DeviceName, devname) == NULL)
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continue;
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out_node = iort_entry_lookup(node, rid, &nxtid);
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if (out_node != NULL)
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break;
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}
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out_node = iort_smmu_trymap(out_node, outtype, &nxtid);
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if (out_node)
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*outid = nxtid;
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return (out_node);
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}
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#ifdef notyet
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/*
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* Not implemented, map a PCIe device to the SMMU it is associated with.
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*/
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int
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acpi_iort_map_smmu(u_int seg, u_int devid, void **smmu, u_int *sid)
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{
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/* XXX: convert oref to SMMU device */
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return (ENXIO);
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}
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#endif
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/*
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* Allocate memory for a node, initialize and copy mappings. 'start'
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* argument provides the table start used to calculate the node offset.
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*/
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static void
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iort_copy_data(struct iort_node *node, ACPI_IORT_NODE *node_entry)
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{
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ACPI_IORT_ID_MAPPING *map_entry;
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struct iort_map_entry *mapping;
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int i;
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map_entry = ACPI_ADD_PTR(ACPI_IORT_ID_MAPPING, node_entry,
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node_entry->MappingOffset);
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node->nentries = node_entry->MappingCount;
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node->usecount = 0;
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mapping = malloc(sizeof(*mapping) * node->nentries, M_DEVBUF,
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M_WAITOK | M_ZERO);
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node->entries.mappings = mapping;
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for (i = 0; i < node->nentries; i++, mapping++, map_entry++) {
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mapping->base = map_entry->InputBase;
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/*
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* IdCount means "The number of IDs in the range minus one" (ARM DEN 0049D).
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* We use <= for comparison against this field, so don't add one here.
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*/
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mapping->end = map_entry->InputBase + map_entry->IdCount;
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mapping->outbase = map_entry->OutputBase;
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mapping->out_node_offset = map_entry->OutputReference;
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mapping->flags = map_entry->Flags;
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mapping->out_node = NULL;
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}
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}
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/*
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* Allocate and copy an ITS group.
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*/
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static void
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iort_copy_its(struct iort_node *node, ACPI_IORT_NODE *node_entry)
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{
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struct iort_its_entry *its;
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ACPI_IORT_ITS_GROUP *itsg_entry;
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UINT32 *id;
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int i;
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itsg_entry = (ACPI_IORT_ITS_GROUP *)node_entry->NodeData;
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node->nentries = itsg_entry->ItsCount;
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node->usecount = 0;
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its = malloc(sizeof(*its) * node->nentries, M_DEVBUF, M_WAITOK | M_ZERO);
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node->entries.its = its;
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id = &itsg_entry->Identifiers[0];
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for (i = 0; i < node->nentries; i++, its++, id++) {
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its->its_id = *id;
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its->pxm = -1;
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its->xref = 0;
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}
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}
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/*
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* Walk the IORT table and add nodes to corresponding list.
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*/
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static void
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iort_add_nodes(ACPI_IORT_NODE *node_entry, u_int node_offset)
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{
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ACPI_IORT_ROOT_COMPLEX *pci_rc;
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ACPI_IORT_SMMU *smmu;
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ACPI_IORT_SMMU_V3 *smmu_v3;
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ACPI_IORT_NAMED_COMPONENT *named_comp;
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struct iort_node *node;
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node = malloc(sizeof(*node), M_DEVBUF, M_WAITOK | M_ZERO);
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node->type = node_entry->Type;
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node->node_offset = node_offset;
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node->revision = node_entry->Revision;
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/* copy nodes depending on type */
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switch(node_entry->Type) {
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case ACPI_IORT_NODE_PCI_ROOT_COMPLEX:
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pci_rc = (ACPI_IORT_ROOT_COMPLEX *)node_entry->NodeData;
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memcpy(&node->data.pci_rc, pci_rc, sizeof(*pci_rc));
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iort_copy_data(node, node_entry);
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TAILQ_INSERT_TAIL(&pci_nodes, node, next);
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break;
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case ACPI_IORT_NODE_SMMU:
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smmu = (ACPI_IORT_SMMU *)node_entry->NodeData;
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memcpy(&node->data.smmu, smmu, sizeof(*smmu));
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iort_copy_data(node, node_entry);
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TAILQ_INSERT_TAIL(&smmu_nodes, node, next);
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break;
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case ACPI_IORT_NODE_SMMU_V3:
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smmu_v3 = (ACPI_IORT_SMMU_V3 *)node_entry->NodeData;
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memcpy(&node->data.smmu_v3, smmu_v3, sizeof(*smmu_v3));
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iort_copy_data(node, node_entry);
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TAILQ_INSERT_TAIL(&smmu_nodes, node, next);
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break;
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case ACPI_IORT_NODE_ITS_GROUP:
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iort_copy_its(node, node_entry);
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TAILQ_INSERT_TAIL(&its_groups, node, next);
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break;
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case ACPI_IORT_NODE_NAMED_COMPONENT:
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named_comp = (ACPI_IORT_NAMED_COMPONENT *)node_entry->NodeData;
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memcpy(&node->data.named_comp, named_comp, sizeof(*named_comp));
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/* Copy name of the node separately. */
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strncpy(node->data.named_comp.DeviceName,
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named_comp->DeviceName,
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sizeof(node->data.named_comp.DeviceName));
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node->data.named_comp.DeviceName[31] = 0;
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iort_copy_data(node, node_entry);
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TAILQ_INSERT_TAIL(&named_nodes, node, next);
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break;
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default:
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printf("ACPI: IORT: Dropping unhandled type %u\n",
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node_entry->Type);
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free(node, M_DEVBUF);
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break;
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}
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}
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/*
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* For the mapping entry given, walk thru all the possible destination
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* nodes and resolve the output reference.
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*/
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static void
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iort_resolve_node(struct iort_map_entry *entry, int check_smmu)
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{
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struct iort_node *node, *np;
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node = NULL;
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if (check_smmu) {
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TAILQ_FOREACH(np, &smmu_nodes, next) {
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if (entry->out_node_offset == np->node_offset) {
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node = np;
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break;
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}
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}
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}
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if (node == NULL) {
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TAILQ_FOREACH(np, &its_groups, next) {
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if (entry->out_node_offset == np->node_offset) {
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node = np;
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break;
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}
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}
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}
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if (node != NULL) {
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node->usecount++;
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entry->out_node = node;
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} else {
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printf("ACPI: IORT: Firmware Bug: no mapping for node %u\n",
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entry->out_node_offset);
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}
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}
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/*
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* Resolve all output node references to node pointers.
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*/
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static void
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iort_post_process_mappings(void)
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{
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struct iort_node *node;
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int i;
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TAILQ_FOREACH(node, &pci_nodes, next)
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for (i = 0; i < node->nentries; i++)
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iort_resolve_node(&node->entries.mappings[i], TRUE);
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TAILQ_FOREACH(node, &smmu_nodes, next)
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for (i = 0; i < node->nentries; i++)
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iort_resolve_node(&node->entries.mappings[i], FALSE);
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TAILQ_FOREACH(node, &named_nodes, next)
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for (i = 0; i < node->nentries; i++)
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iort_resolve_node(&node->entries.mappings[i], TRUE);
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}
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/*
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* Walk MADT table, assign PIC xrefs to all ITS entries.
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*/
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static void
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madt_resolve_its_xref(ACPI_SUBTABLE_HEADER *entry, void *arg)
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{
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ACPI_MADT_GENERIC_TRANSLATOR *gict;
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struct iort_node *its_node;
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struct iort_its_entry *its_entry;
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u_int xref;
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int i, matches;
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if (entry->Type != ACPI_MADT_TYPE_GENERIC_TRANSLATOR)
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return;
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gict = (ACPI_MADT_GENERIC_TRANSLATOR *)entry;
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matches = 0;
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xref = acpi_its_xref++;
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TAILQ_FOREACH(its_node, &its_groups, next) {
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its_entry = its_node->entries.its;
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for (i = 0; i < its_node->nentries; i++, its_entry++) {
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if (its_entry->its_id == gict->TranslationId) {
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its_entry->xref = xref;
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matches++;
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}
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}
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}
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if (matches == 0)
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printf("ACPI: IORT: Unused ITS block, ID %u\n",
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gict->TranslationId);
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}
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/*
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* Walk SRAT, assign proximity to all ITS entries.
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*/
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static void
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srat_resolve_its_pxm(ACPI_SUBTABLE_HEADER *entry, void *arg)
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{
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ACPI_SRAT_GIC_ITS_AFFINITY *gicits;
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struct iort_node *its_node;
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struct iort_its_entry *its_entry;
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int *map_counts;
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int i, matches, dom;
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if (entry->Type != ACPI_SRAT_TYPE_GIC_ITS_AFFINITY)
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return;
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matches = 0;
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map_counts = arg;
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gicits = (ACPI_SRAT_GIC_ITS_AFFINITY *)entry;
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dom = acpi_map_pxm_to_vm_domainid(gicits->ProximityDomain);
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/*
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* Catch firmware and config errors. map_counts keeps a
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* count of ProximityDomain values mapping to a domain ID
|
|
*/
|
|
#if MAXMEMDOM > 1
|
|
if (dom == -1)
|
|
printf("Firmware Error: Proximity Domain %d could not be"
|
|
" mapped for GIC ITS ID %d!\n",
|
|
gicits->ProximityDomain, gicits->ItsId);
|
|
#endif
|
|
/* use dom + 1 as index to handle the case where dom == -1 */
|
|
i = ++map_counts[dom + 1];
|
|
if (i > 1) {
|
|
#ifdef NUMA
|
|
if (dom != -1)
|
|
printf("ERROR: Multiple Proximity Domains map to the"
|
|
" same NUMA domain %d!\n", dom);
|
|
#else
|
|
printf("WARNING: multiple Proximity Domains in SRAT but NUMA"
|
|
" NOT enabled!\n");
|
|
#endif
|
|
}
|
|
TAILQ_FOREACH(its_node, &its_groups, next) {
|
|
its_entry = its_node->entries.its;
|
|
for (i = 0; i < its_node->nentries; i++, its_entry++) {
|
|
if (its_entry->its_id == gicits->ItsId) {
|
|
its_entry->pxm = dom;
|
|
matches++;
|
|
}
|
|
}
|
|
}
|
|
if (matches == 0)
|
|
printf("ACPI: IORT: ITS block %u in SRAT not found in IORT!\n",
|
|
gicits->ItsId);
|
|
}
|
|
|
|
/*
|
|
* Cross check the ITS Id with MADT and (if available) SRAT.
|
|
*/
|
|
static int
|
|
iort_post_process_its(void)
|
|
{
|
|
ACPI_TABLE_MADT *madt;
|
|
ACPI_TABLE_SRAT *srat;
|
|
vm_paddr_t madt_pa, srat_pa;
|
|
int map_counts[MAXMEMDOM + 1] = { 0 };
|
|
|
|
/* Check ITS block in MADT */
|
|
madt_pa = acpi_find_table(ACPI_SIG_MADT);
|
|
KASSERT(madt_pa != 0, ("no MADT!"));
|
|
madt = acpi_map_table(madt_pa, ACPI_SIG_MADT);
|
|
KASSERT(madt != NULL, ("can't map MADT!"));
|
|
acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length,
|
|
madt_resolve_its_xref, NULL);
|
|
acpi_unmap_table(madt);
|
|
|
|
/* Get proximtiy if available */
|
|
srat_pa = acpi_find_table(ACPI_SIG_SRAT);
|
|
if (srat_pa != 0) {
|
|
srat = acpi_map_table(srat_pa, ACPI_SIG_SRAT);
|
|
KASSERT(srat != NULL, ("can't map SRAT!"));
|
|
acpi_walk_subtables(srat + 1, (char *)srat + srat->Header.Length,
|
|
srat_resolve_its_pxm, map_counts);
|
|
acpi_unmap_table(srat);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Find, parse, and save IO Remapping Table ("IORT").
|
|
*/
|
|
static int
|
|
acpi_parse_iort(void *dummy __unused)
|
|
{
|
|
ACPI_TABLE_IORT *iort;
|
|
ACPI_IORT_NODE *node_entry;
|
|
vm_paddr_t iort_pa;
|
|
u_int node_offset;
|
|
|
|
iort_pa = acpi_find_table(ACPI_SIG_IORT);
|
|
if (iort_pa == 0)
|
|
return (ENXIO);
|
|
|
|
iort = acpi_map_table(iort_pa, ACPI_SIG_IORT);
|
|
if (iort == NULL) {
|
|
printf("ACPI: Unable to map the IORT table!\n");
|
|
return (ENXIO);
|
|
}
|
|
for (node_offset = iort->NodeOffset;
|
|
node_offset < iort->Header.Length;
|
|
node_offset += node_entry->Length) {
|
|
node_entry = ACPI_ADD_PTR(ACPI_IORT_NODE, iort, node_offset);
|
|
iort_add_nodes(node_entry, node_offset);
|
|
}
|
|
acpi_unmap_table(iort);
|
|
iort_post_process_mappings();
|
|
iort_post_process_its();
|
|
return (0);
|
|
}
|
|
SYSINIT(acpi_parse_iort, SI_SUB_DRIVERS, SI_ORDER_FIRST, acpi_parse_iort, NULL);
|
|
|
|
/*
|
|
* Provide ITS ID to PIC xref mapping.
|
|
*/
|
|
int
|
|
acpi_iort_its_lookup(u_int its_id, u_int *xref, int *pxm)
|
|
{
|
|
struct iort_node *its_node;
|
|
struct iort_its_entry *its_entry;
|
|
int i;
|
|
|
|
TAILQ_FOREACH(its_node, &its_groups, next) {
|
|
its_entry = its_node->entries.its;
|
|
for (i = 0; i < its_node->nentries; i++, its_entry++) {
|
|
if (its_entry->its_id == its_id) {
|
|
*xref = its_entry->xref;
|
|
*pxm = its_entry->pxm;
|
|
return (0);
|
|
}
|
|
}
|
|
}
|
|
return (ENOENT);
|
|
}
|
|
|
|
/*
|
|
* Find mapping for a PCIe device given segment and device ID
|
|
* returns the XREF for MSI interrupt setup and the device ID to
|
|
* use for the interrupt setup
|
|
*/
|
|
int
|
|
acpi_iort_map_pci_msi(u_int seg, u_int rid, u_int *xref, u_int *devid)
|
|
{
|
|
struct iort_node *node;
|
|
|
|
node = iort_pci_rc_map(seg, rid, ACPI_IORT_NODE_ITS_GROUP, devid);
|
|
if (node == NULL)
|
|
return (ENOENT);
|
|
|
|
/* This should be an ITS node */
|
|
KASSERT(node->type == ACPI_IORT_NODE_ITS_GROUP, ("bad group"));
|
|
|
|
/* return first node, we don't handle more than that now. */
|
|
*xref = node->entries.its[0].xref;
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
acpi_iort_map_pci_smmuv3(u_int seg, u_int rid, u_int *xref, u_int *sid)
|
|
{
|
|
ACPI_IORT_SMMU_V3 *smmu;
|
|
struct iort_node *node;
|
|
|
|
node = iort_pci_rc_map(seg, rid, ACPI_IORT_NODE_SMMU_V3, sid);
|
|
if (node == NULL)
|
|
return (ENOENT);
|
|
|
|
/* This should be an SMMU node. */
|
|
KASSERT(node->type == ACPI_IORT_NODE_SMMU_V3, ("bad node"));
|
|
|
|
smmu = (ACPI_IORT_SMMU_V3 *)&node->data.smmu_v3;
|
|
*xref = smmu->BaseAddress;
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Finds mapping for a named node given name and resource ID and returns the
|
|
* XREF for MSI interrupt setup and the device ID to use for the interrupt setup.
|
|
*/
|
|
int
|
|
acpi_iort_map_named_msi(const char *devname, u_int rid, u_int *xref,
|
|
u_int *devid)
|
|
{
|
|
struct iort_node *node;
|
|
|
|
node = iort_named_comp_map(devname, rid, ACPI_IORT_NODE_ITS_GROUP,
|
|
devid);
|
|
if (node == NULL)
|
|
return (ENOENT);
|
|
|
|
/* This should be an ITS node */
|
|
KASSERT(node->type == ACPI_IORT_NODE_ITS_GROUP, ("bad group"));
|
|
|
|
/* Return first node, we don't handle more than that now. */
|
|
*xref = node->entries.its[0].xref;
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
acpi_iort_map_named_smmuv3(const char *devname, u_int rid, u_int *xref,
|
|
u_int *devid)
|
|
{
|
|
ACPI_IORT_SMMU_V3 *smmu;
|
|
struct iort_node *node;
|
|
|
|
node = iort_named_comp_map(devname, rid, ACPI_IORT_NODE_SMMU_V3, devid);
|
|
if (node == NULL)
|
|
return (ENOENT);
|
|
|
|
/* This should be an SMMU node. */
|
|
KASSERT(node->type == ACPI_IORT_NODE_SMMU_V3, ("bad node"));
|
|
|
|
smmu = (ACPI_IORT_SMMU_V3 *)&node->data.smmu_v3;
|
|
*xref = smmu->BaseAddress;
|
|
|
|
return (0);
|
|
}
|