125 lines
3.4 KiB
C
125 lines
3.4 KiB
C
/*-
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* Copyright (c) 2018-2020 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <machine/bus.h>
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#include <arm64/coresight/coresight.h>
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static struct mtx cs_mtx;
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struct coresight_device_list cs_devs;
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int
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coresight_register(struct coresight_desc *desc)
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{
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struct coresight_device *cs_dev;
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cs_dev = malloc(sizeof(struct coresight_device),
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M_CORESIGHT, M_WAITOK | M_ZERO);
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cs_dev->dev = desc->dev;
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cs_dev->pdata = desc->pdata;
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cs_dev->dev_type = desc->dev_type;
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mtx_lock(&cs_mtx);
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TAILQ_INSERT_TAIL(&cs_devs, cs_dev, link);
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mtx_unlock(&cs_mtx);
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return (0);
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}
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struct endpoint *
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coresight_get_output_endpoint(struct coresight_platform_data *pdata)
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{
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struct endpoint *endp;
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if (pdata->out_ports != 1)
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return (NULL);
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TAILQ_FOREACH(endp, &pdata->endpoints, link) {
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if (endp->input == 0)
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return (endp);
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}
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return (NULL);
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}
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struct coresight_device *
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coresight_get_output_device(struct endpoint *endp, struct endpoint **out_endp)
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{
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struct coresight_platform_data *pdata;
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struct coresight_device *cs_dev;
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struct endpoint *endp2;
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TAILQ_FOREACH(cs_dev, &cs_devs, link) {
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pdata = cs_dev->pdata;
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TAILQ_FOREACH(endp2, &cs_dev->pdata->endpoints, link) {
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switch (pdata->bus_type) {
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case CORESIGHT_BUS_FDT:
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#ifdef FDT
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if (endp->their_node == endp2->my_node) {
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*out_endp = endp2;
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return (cs_dev);
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}
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#endif
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break;
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case CORESIGHT_BUS_ACPI:
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#ifdef DEV_ACPI
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if (endp->their_handle == endp2->my_handle) {
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*out_endp = endp2;
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return (cs_dev);
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}
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#endif
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break;
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}
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}
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}
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return (NULL);
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}
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static void
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coresight_init(void)
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{
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mtx_init(&cs_mtx, "ARM Coresight", NULL, MTX_DEF);
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TAILQ_INIT(&cs_devs);
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}
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SYSINIT(coresight, SI_SUB_DRIVERS, SI_ORDER_FIRST, coresight_init, NULL);
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