432 lines
10 KiB
C
432 lines
10 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Emmanuel Vadot <manu@FreeBSD.Org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Rockchip USB2PHY
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/ofw/ofw_subr.h>
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#include <dev/extres/clk/clk.h>
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#include <dev/extres/phy/phy_usb.h>
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#include <dev/extres/regulator/regulator.h>
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#include <dev/extres/syscon/syscon.h>
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#include "clkdev_if.h"
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#include "syscon_if.h"
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struct rk_usb2phy_reg {
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uint32_t offset;
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uint32_t enable_mask;
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uint32_t disable_mask;
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};
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struct rk_usb2phy_regs {
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struct rk_usb2phy_reg clk_ctl;
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};
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struct rk_usb2phy_regs rk3399_regs = {
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.clk_ctl = {
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.offset = 0x0000,
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/* bit 4 put pll in suspend */
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.enable_mask = 0x100000,
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.disable_mask = 0x100010,
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}
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};
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struct rk_usb2phy_regs rk3568_regs = {
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.clk_ctl = {
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.offset = 0x0008,
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.enable_mask = 0x100000,
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/* bit 4 put pll in suspend */
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.disable_mask = 0x100010,
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}
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};
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static struct ofw_compat_data compat_data[] = {
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{ "rockchip,rk3399-usb2phy", (uintptr_t)&rk3399_regs },
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{ "rockchip,rk3568-usb2phy", (uintptr_t)&rk3568_regs },
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{ NULL, 0 }
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};
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struct rk_usb2phy_softc {
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device_t dev;
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struct syscon *grf;
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regulator_t phy_supply;
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clk_t clk;
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int mode;
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};
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/* Phy class and methods. */
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static int rk_usb2phy_enable(struct phynode *phynode, bool enable);
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static int rk_usb2phy_get_mode(struct phynode *phy, int *mode);
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static int rk_usb2phy_set_mode(struct phynode *phy, int mode);
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static phynode_method_t rk_usb2phy_phynode_methods[] = {
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PHYNODEMETHOD(phynode_enable, rk_usb2phy_enable),
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PHYNODEMETHOD(phynode_usb_get_mode, rk_usb2phy_get_mode),
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PHYNODEMETHOD(phynode_usb_set_mode, rk_usb2phy_set_mode),
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PHYNODEMETHOD_END
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};
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DEFINE_CLASS_1(rk_usb2phy_phynode, rk_usb2phy_phynode_class,
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rk_usb2phy_phynode_methods,
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sizeof(struct phynode_usb_sc), phynode_usb_class);
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enum RK_USBPHY {
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RK_USBPHY_HOST = 0,
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RK_USBPHY_OTG,
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};
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static int
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rk_usb2phy_enable(struct phynode *phynode, bool enable)
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{
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struct rk_usb2phy_softc *sc;
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device_t dev;
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intptr_t phy;
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int error;
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dev = phynode_get_device(phynode);
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phy = phynode_get_id(phynode);
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sc = device_get_softc(dev);
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if (phy != RK_USBPHY_HOST)
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return (ERANGE);
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if (sc->phy_supply) {
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if (enable)
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error = regulator_enable(sc->phy_supply);
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else
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error = regulator_disable(sc->phy_supply);
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if (error != 0) {
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device_printf(dev, "Cannot %sable the regulator\n",
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enable ? "En" : "Dis");
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goto fail;
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}
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}
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return (0);
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fail:
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return (ENXIO);
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}
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static int
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rk_usb2phy_get_mode(struct phynode *phynode, int *mode)
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{
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struct rk_usb2phy_softc *sc;
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intptr_t phy;
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device_t dev;
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dev = phynode_get_device(phynode);
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phy = phynode_get_id(phynode);
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sc = device_get_softc(dev);
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if (phy != RK_USBPHY_HOST)
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return (ERANGE);
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*mode = sc->mode;
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return (0);
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}
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static int
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rk_usb2phy_set_mode(struct phynode *phynode, int mode)
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{
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struct rk_usb2phy_softc *sc;
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intptr_t phy;
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device_t dev;
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dev = phynode_get_device(phynode);
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phy = phynode_get_id(phynode);
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sc = device_get_softc(dev);
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if (phy != RK_USBPHY_HOST)
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return (ERANGE);
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sc->mode = mode;
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return (0);
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}
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/* Clock class and method */
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struct rk_usb2phy_clk_sc {
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device_t clkdev;
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struct syscon *grf;
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struct rk_usb2phy_regs *regs;
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};
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static int
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rk_usb2phy_clk_init(struct clknode *clk, device_t dev)
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{
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clknode_init_parent_idx(clk, 0);
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return (0);
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}
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static int
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rk_usb2phy_clk_set_gate(struct clknode *clk, bool enable)
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{
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struct rk_usb2phy_clk_sc *sc;
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sc = clknode_get_softc(clk);
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if (enable)
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SYSCON_WRITE_4(sc->grf, sc->regs->clk_ctl.offset,
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sc->regs->clk_ctl.enable_mask);
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else
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SYSCON_WRITE_4(sc->grf, sc->regs->clk_ctl.offset,
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sc->regs->clk_ctl.disable_mask);
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return (0);
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}
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static int
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rk_usb2phy_clk_recalc(struct clknode *clk, uint64_t *freq)
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{
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*freq = 480000000;
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return (0);
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}
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static clknode_method_t rk_usb2phy_clk_clknode_methods[] = {
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/* Device interface */
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CLKNODEMETHOD(clknode_init, rk_usb2phy_clk_init),
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CLKNODEMETHOD(clknode_set_gate, rk_usb2phy_clk_set_gate),
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CLKNODEMETHOD(clknode_recalc_freq, rk_usb2phy_clk_recalc),
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CLKNODEMETHOD_END
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};
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DEFINE_CLASS_1(rk_usb2phy_clk_clknode, rk_usb2phy_clk_clknode_class,
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rk_usb2phy_clk_clknode_methods, sizeof(struct rk_usb2phy_clk_sc),
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clknode_class);
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static int
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rk_usb2phy_clk_ofw_map(struct clkdom *clkdom, uint32_t ncells,
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phandle_t *cells, struct clknode **clk)
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{
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if (ncells != 0)
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return (ERANGE);
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*clk = clknode_find_by_id(clkdom, 0);
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if (*clk == NULL)
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return (ENXIO);
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return (0);
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}
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static int
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rk_usb2phy_export_clock(struct rk_usb2phy_softc *devsc)
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{
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struct clknode_init_def def;
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struct rk_usb2phy_clk_sc *sc;
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const char **clknames;
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struct clkdom *clkdom;
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struct clknode *clk;
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clk_t clk_parent;
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phandle_t node;
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phandle_t regs[2];
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int i, nclocks, ncells, error;
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node = ofw_bus_get_node(devsc->dev);
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error = ofw_bus_parse_xref_list_get_length(node, "clocks",
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"#clock-cells", &ncells);
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if (error != 0 || ncells != 1) {
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device_printf(devsc->dev, "couldn't find parent clock\n");
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return (ENXIO);
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}
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nclocks = ofw_bus_string_list_to_array(node, "clock-output-names",
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&clknames);
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if (nclocks != 1)
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return (ENXIO);
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clkdom = clkdom_create(devsc->dev);
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clkdom_set_ofw_mapper(clkdom, rk_usb2phy_clk_ofw_map);
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memset(&def, 0, sizeof(def));
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def.id = 0;
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def.name = clknames[0];
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def.parent_names = malloc(sizeof(char *) * ncells, M_OFWPROP, M_WAITOK);
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for (i = 0; i < ncells; i++) {
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error = clk_get_by_ofw_index(devsc->dev, 0, i, &clk_parent);
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if (error != 0) {
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device_printf(devsc->dev, "cannot get clock %d\n", error);
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return (ENXIO);
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}
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def.parent_names[i] = clk_get_name(clk_parent);
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clk_release(clk_parent);
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}
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def.parent_cnt = ncells;
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clk = clknode_create(clkdom, &rk_usb2phy_clk_clknode_class, &def);
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if (clk == NULL) {
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device_printf(devsc->dev, "cannot create clknode\n");
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return (ENXIO);
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}
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sc = clknode_get_softc(clk);
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sc->clkdev = device_get_parent(devsc->dev);
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sc->grf = devsc->grf;
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sc->regs = (struct rk_usb2phy_regs *)ofw_bus_search_compatible(devsc->dev, compat_data)->ocd_data;
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if (sc->regs->clk_ctl.offset == 0) {
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OF_getencprop(node, "reg", regs, sizeof(regs));
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sc->regs->clk_ctl.offset = regs[0];
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}
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clknode_register(clkdom, clk);
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if (clkdom_finit(clkdom) != 0) {
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device_printf(devsc->dev, "cannot finalize clkdom initialization\n");
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return (ENXIO);
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}
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if (bootverbose)
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clkdom_dump(clkdom);
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return (0);
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}
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static int
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rk_usb2phy_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Rockchip USB2PHY");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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rk_usb2phy_attach(device_t dev)
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{
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struct rk_usb2phy_softc *sc;
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struct phynode_init_def phy_init;
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struct phynode *phynode;
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phandle_t node, host;
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int err;
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sc = device_get_softc(dev);
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sc->dev = dev;
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node = ofw_bus_get_node(dev);
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if (OF_hasprop(node, "rockchip,usbgrf")) {
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if (syscon_get_by_ofw_property(dev, node, "rockchip,usbgrf",
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&sc->grf)) {
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device_printf(dev, "Cannot get syscon handle\n");
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return (ENXIO);
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}
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}
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else {
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if (syscon_get_handle_default(dev, &sc->grf)) {
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device_printf(dev, "Cannot get syscon handle\n");
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return (ENXIO);
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}
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}
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if (clk_get_by_ofw_name(dev, 0, "phyclk", &sc->clk) != 0) {
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device_printf(dev, "Cannot get clock\n");
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return (ENXIO);
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}
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err = clk_enable(sc->clk);
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if (err != 0) {
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device_printf(dev, "Could not enable clock %s\n",
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clk_get_name(sc->clk));
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return (ENXIO);
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}
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err = rk_usb2phy_export_clock(sc);
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if (err != 0)
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return (err);
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/* Only host is supported right now */
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host = ofw_bus_find_child(node, "host-port");
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if (host == 0) {
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device_printf(dev, "Cannot find host-port child node\n");
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return (ENXIO);
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}
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if (!ofw_bus_node_status_okay(host)) {
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device_printf(dev, "host-port isn't okay\n");
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return (0);
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}
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regulator_get_by_ofw_property(dev, host, "phy-supply", &sc->phy_supply);
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phy_init.id = RK_USBPHY_HOST;
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phy_init.ofw_node = host;
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phynode = phynode_create(dev, &rk_usb2phy_phynode_class, &phy_init);
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if (phynode == NULL) {
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device_printf(dev, "failed to create host USB2PHY\n");
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return (ENXIO);
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}
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if (phynode_register(phynode) == NULL) {
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device_printf(dev, "failed to register host USB2PHY\n");
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return (ENXIO);
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}
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OF_device_register_xref(OF_xref_from_node(host), dev);
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return (0);
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}
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static device_method_t rk_usb2phy_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, rk_usb2phy_probe),
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DEVMETHOD(device_attach, rk_usb2phy_attach),
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DEVMETHOD_END
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};
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static driver_t rk_usb2phy_driver = {
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"rk_usb2phy",
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rk_usb2phy_methods,
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sizeof(struct rk_usb2phy_softc)
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};
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EARLY_DRIVER_MODULE(rk_usb2phy, simplebus, rk_usb2phy_driver, 0, 0,
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BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_MIDDLE);
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MODULE_VERSION(rk_usb2phy, 1);
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