474 lines
10 KiB
C
474 lines
10 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2018 Advanced Micro Devices
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include "opt_acpi.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/gpio.h>
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#include <sys/interrupt.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <contrib/dev/acpica/include/acpi.h>
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#include <contrib/dev/acpica/include/accommon.h>
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#include <dev/acpica/acpivar.h>
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#include <dev/gpio/gpiobusvar.h>
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#include "gpio_if.h"
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#include "amdgpio.h"
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static struct resource_spec amdgpio_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ -1, 0, 0 }
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};
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static inline uint32_t
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amdgpio_read_4(struct amdgpio_softc *sc, bus_size_t off)
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{
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return (bus_read_4(sc->sc_res[0], off));
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}
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static inline void
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amdgpio_write_4(struct amdgpio_softc *sc, bus_size_t off,
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uint32_t val)
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{
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bus_write_4(sc->sc_res[0], off, val);
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}
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static bool
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amdgpio_is_pin_output(struct amdgpio_softc *sc, uint32_t pin)
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{
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uint32_t reg, val;
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bool ret;
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/* Get the current pin state */
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AMDGPIO_LOCK(sc);
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reg = AMDGPIO_PIN_REGISTER(pin);
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val = amdgpio_read_4(sc, reg);
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if (val & BIT(OUTPUT_ENABLE_OFF))
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ret = true;
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else
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ret = false;
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AMDGPIO_UNLOCK(sc);
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return (ret);
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}
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static device_t
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amdgpio_get_bus(device_t dev)
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{
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struct amdgpio_softc *sc;
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sc = device_get_softc(dev);
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dprintf("busdev %p\n", sc->sc_busdev);
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return (sc->sc_busdev);
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}
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static int
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amdgpio_pin_max(device_t dev, int *maxpin)
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{
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struct amdgpio_softc *sc;
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sc = device_get_softc(dev);
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*maxpin = sc->sc_npins - 1;
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dprintf("npins %d maxpin %d\n", sc->sc_npins, *maxpin);
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return (0);
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}
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static bool
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amdgpio_valid_pin(struct amdgpio_softc *sc, int pin)
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{
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dprintf("pin %d\n", pin);
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if (sc->sc_res[0] == NULL)
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return (false);
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if ((sc->sc_gpio_pins[pin].gp_pin == pin) &&
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(sc->sc_gpio_pins[pin].gp_caps != 0))
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return (true);
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return (false);
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}
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static int
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amdgpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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struct amdgpio_softc *sc;
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dprintf("pin %d\n", pin);
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sc = device_get_softc(dev);
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if (!amdgpio_valid_pin(sc, pin))
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return (EINVAL);
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/* Set a very simple name */
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snprintf(name, GPIOMAXNAME, "%s", sc->sc_gpio_pins[pin].gp_name);
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name[GPIOMAXNAME - 1] = '\0';
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dprintf("pin %d name %s\n", pin, name);
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return (0);
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}
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static int
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amdgpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct amdgpio_softc *sc;
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sc = device_get_softc(dev);
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dprintf("pin %d\n", pin);
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if (!amdgpio_valid_pin(sc, pin))
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return (EINVAL);
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*caps = sc->sc_gpio_pins[pin].gp_caps;
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dprintf("pin %d caps 0x%x\n", pin, *caps);
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return (0);
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}
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static int
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amdgpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
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{
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struct amdgpio_softc *sc;
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sc = device_get_softc(dev);
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dprintf("pin %d\n", pin);
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if (!amdgpio_valid_pin(sc, pin))
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return (EINVAL);
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AMDGPIO_LOCK(sc);
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*flags = sc->sc_gpio_pins[pin].gp_flags;
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dprintf("pin %d flags 0x%x\n", pin, *flags);
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AMDGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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amdgpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct amdgpio_softc *sc;
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uint32_t reg, val, allowed;
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sc = device_get_softc(dev);
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dprintf("pin %d flags 0x%x\n", pin, flags);
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if (!amdgpio_valid_pin(sc, pin))
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return (EINVAL);
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allowed = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
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/*
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* Only directtion flag allowed
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*/
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if (flags & ~allowed)
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return (EINVAL);
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/*
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* Not both directions simultaneously
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*/
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if ((flags & allowed) == allowed)
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return (EINVAL);
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/* Set the GPIO mode and state */
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AMDGPIO_LOCK(sc);
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reg = AMDGPIO_PIN_REGISTER(pin);
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val = amdgpio_read_4(sc, reg);
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if (flags & GPIO_PIN_INPUT) {
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val &= ~BIT(OUTPUT_ENABLE_OFF);
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sc->sc_gpio_pins[pin].gp_flags = GPIO_PIN_INPUT;
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} else {
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val |= BIT(OUTPUT_ENABLE_OFF);
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sc->sc_gpio_pins[pin].gp_flags = GPIO_PIN_OUTPUT;
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}
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amdgpio_write_4(sc, reg, val);
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dprintf("pin %d flags 0x%x val 0x%x gp_flags 0x%x\n",
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pin, flags, val, sc->sc_gpio_pins[pin].gp_flags);
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AMDGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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amdgpio_pin_get(device_t dev, uint32_t pin, unsigned int *value)
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{
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struct amdgpio_softc *sc;
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uint32_t reg, val;
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sc = device_get_softc(dev);
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dprintf("pin %d\n", pin);
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if (!amdgpio_valid_pin(sc, pin))
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return (EINVAL);
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*value = 0;
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AMDGPIO_LOCK(sc);
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reg = AMDGPIO_PIN_REGISTER(pin);
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val = amdgpio_read_4(sc, reg);
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if ((sc->sc_gpio_pins[pin].gp_flags & GPIO_PIN_OUTPUT) != 0) {
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if (val & BIT(OUTPUT_VALUE_OFF))
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*value = GPIO_PIN_HIGH;
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else
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*value = GPIO_PIN_LOW;
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} else {
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if (val & BIT(PIN_STS_OFF))
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*value = GPIO_PIN_HIGH;
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else
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*value = GPIO_PIN_LOW;
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}
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dprintf("pin %d value 0x%x\n", pin, *value);
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AMDGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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amdgpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
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{
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struct amdgpio_softc *sc;
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uint32_t reg, val;
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sc = device_get_softc(dev);
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dprintf("pin %d value 0x%x\n", pin, value);
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if (!amdgpio_valid_pin(sc, pin))
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return (EINVAL);
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if (!amdgpio_is_pin_output(sc, pin))
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return (EINVAL);
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AMDGPIO_LOCK(sc);
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reg = AMDGPIO_PIN_REGISTER(pin);
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val = amdgpio_read_4(sc, reg);
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if (value == GPIO_PIN_LOW)
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val &= ~BIT(OUTPUT_VALUE_OFF);
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else
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val |= BIT(OUTPUT_VALUE_OFF);
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amdgpio_write_4(sc, reg, val);
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dprintf("pin %d value 0x%x val 0x%x\n", pin, value, val);
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AMDGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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amdgpio_pin_toggle(device_t dev, uint32_t pin)
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{
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struct amdgpio_softc *sc;
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uint32_t reg, val;
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sc = device_get_softc(dev);
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dprintf("pin %d\n", pin);
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if (!amdgpio_valid_pin(sc, pin))
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return (EINVAL);
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if (!amdgpio_is_pin_output(sc, pin))
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return (EINVAL);
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/* Toggle the pin */
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AMDGPIO_LOCK(sc);
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reg = AMDGPIO_PIN_REGISTER(pin);
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val = amdgpio_read_4(sc, reg);
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dprintf("pin %d value before 0x%x\n", pin, val);
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val = val ^ BIT(OUTPUT_VALUE_OFF);
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dprintf("pin %d value after 0x%x\n", pin, val);
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amdgpio_write_4(sc, reg, val);
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AMDGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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amdgpio_probe(device_t dev)
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{
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static char *gpio_ids[] = { "AMD0030", "AMDI0030", NULL };
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int rv;
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if (acpi_disabled("gpio"))
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return (ENXIO);
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rv = ACPI_ID_PROBE(device_get_parent(dev), dev, gpio_ids, NULL);
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if (rv <= 0)
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device_set_desc(dev, "AMD GPIO Controller");
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return (rv);
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}
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static int
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amdgpio_attach(device_t dev)
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{
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struct amdgpio_softc *sc;
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int i, pin, bank;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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sc->sc_handle = acpi_get_handle(dev);
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AMDGPIO_LOCK_INIT(sc);
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sc->sc_nbanks = AMD_GPIO_NUM_PIN_BANK;
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sc->sc_npins = AMD_GPIO_PINS_MAX;
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sc->sc_bank_prefix = AMD_GPIO_PREFIX;
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sc->sc_pin_info = kernzp_pins;
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sc->sc_ngroups = nitems(kernzp_groups);
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sc->sc_groups = kernzp_groups;
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if (bus_alloc_resources(dev, amdgpio_spec, sc->sc_res)) {
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device_printf(dev, "could not allocate resources\n");
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goto err_rsrc;
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}
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sc->sc_bst = rman_get_bustag(sc->sc_res[0]);
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sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]);
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/* Initialize all possible pins to be Invalid */
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for (i = 0; i < AMD_GPIO_PINS_MAX ; i++) {
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snprintf(sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME,
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"Unexposed PIN %d", i);
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sc->sc_gpio_pins[i].gp_pin = -1;
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sc->sc_gpio_pins[i].gp_caps = 0;
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sc->sc_gpio_pins[i].gp_flags = 0;
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}
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/* Initialize only driver exposed pins with appropriate capabilities */
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for (i = 0; i < AMD_GPIO_PINS_EXPOSED ; i++) {
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pin = kernzp_pins[i].pin_num;
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bank = pin/AMD_GPIO_PINS_PER_BANK;
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snprintf(sc->sc_gpio_pins[pin].gp_name, GPIOMAXNAME, "%s%d_%s",
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AMD_GPIO_PREFIX, bank, kernzp_pins[i].pin_name);
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sc->sc_gpio_pins[pin].gp_pin = pin;
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sc->sc_gpio_pins[pin].gp_caps = AMDGPIO_DEFAULT_CAPS;
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sc->sc_gpio_pins[pin].gp_flags =
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amdgpio_is_pin_output(sc, pin) ?
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GPIO_PIN_OUTPUT : GPIO_PIN_INPUT;
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}
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sc->sc_busdev = gpiobus_attach_bus(dev);
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if (sc->sc_busdev == NULL) {
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device_printf(dev, "could not attach gpiobus\n");
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goto err_bus;
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}
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return (0);
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err_bus:
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bus_release_resources(dev, amdgpio_spec, sc->sc_res);
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err_rsrc:
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AMDGPIO_LOCK_DESTROY(sc);
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return (ENXIO);
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}
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static int
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amdgpio_detach(device_t dev)
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{
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struct amdgpio_softc *sc;
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sc = device_get_softc(dev);
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if (sc->sc_busdev)
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gpiobus_detach_bus(dev);
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bus_release_resources(dev, amdgpio_spec, sc->sc_res);
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AMDGPIO_LOCK_DESTROY(sc);
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return (0);
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}
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static device_method_t amdgpio_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, amdgpio_probe),
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DEVMETHOD(device_attach, amdgpio_attach),
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DEVMETHOD(device_detach, amdgpio_detach),
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/* GPIO protocol */
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DEVMETHOD(gpio_get_bus, amdgpio_get_bus),
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DEVMETHOD(gpio_pin_max, amdgpio_pin_max),
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DEVMETHOD(gpio_pin_getname, amdgpio_pin_getname),
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DEVMETHOD(gpio_pin_getcaps, amdgpio_pin_getcaps),
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DEVMETHOD(gpio_pin_getflags, amdgpio_pin_getflags),
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DEVMETHOD(gpio_pin_setflags, amdgpio_pin_setflags),
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DEVMETHOD(gpio_pin_get, amdgpio_pin_get),
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DEVMETHOD(gpio_pin_set, amdgpio_pin_set),
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DEVMETHOD(gpio_pin_toggle, amdgpio_pin_toggle),
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DEVMETHOD_END
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};
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static driver_t amdgpio_driver = {
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"gpio",
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amdgpio_methods,
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sizeof(struct amdgpio_softc),
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};
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DRIVER_MODULE(amdgpio, acpi, amdgpio_driver, 0, 0);
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MODULE_DEPEND(amdgpio, acpi, 1, 1, 1);
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MODULE_DEPEND(amdgpio, gpiobus, 1, 1, 1);
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MODULE_VERSION(amdgpio, 1);
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