689 lines
22 KiB
C
689 lines
22 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <sys/cdefs.h>
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/*
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* Driver for the Atheros Wireless LAN controller.
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*
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* This software is derived from work of Atsushi Onoe; his contribution
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* is greatly appreciated.
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*/
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#include "opt_inet.h"
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#include "opt_ath.h"
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/*
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* This is needed for register operations which are performed
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* by the driver - eg, calls to ath_hal_gettsf32().
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*
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* It's also required for any AH_DEBUG checks in here, eg the
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* module dependencies.
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*/
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#include "opt_ah.h"
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#include "opt_wlan.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sysctl.h>
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#include <sys/mbuf.h>
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#include <sys/malloc.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/errno.h>
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#include <sys/callout.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/kthread.h>
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#include <sys/taskqueue.h>
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#include <sys/priv.h>
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#include <sys/module.h>
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#include <sys/ktr.h>
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#include <sys/smp.h> /* for mp_ncpus */
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#include <machine/bus.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <net/if_arp.h>
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#include <net/ethernet.h>
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#include <net/if_llc.h>
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#include <net80211/ieee80211_var.h>
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#include <net80211/ieee80211_regdomain.h>
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#ifdef IEEE80211_SUPPORT_SUPERG
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#include <net80211/ieee80211_superg.h>
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#endif
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#ifdef IEEE80211_SUPPORT_TDMA
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#include <net80211/ieee80211_tdma.h>
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#endif
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#include <net/bpf.h>
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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#endif
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#include <dev/ath/if_athvar.h>
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#include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
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#include <dev/ath/ath_hal/ah_diagcodes.h>
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#include <dev/ath/if_ath_debug.h>
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#include <dev/ath/if_ath_misc.h>
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#include <dev/ath/if_ath_tsf.h>
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#include <dev/ath/if_ath_tx.h>
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#include <dev/ath/if_ath_sysctl.h>
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#include <dev/ath/if_ath_led.h>
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#include <dev/ath/if_ath_keycache.h>
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#include <dev/ath/if_ath_rx.h>
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#include <dev/ath/if_ath_beacon.h>
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#include <dev/ath/if_athdfs.h>
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#ifdef ATH_TX99_DIAG
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#include <dev/ath/ath_tx99/ath_tx99.h>
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#endif
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#ifdef ATH_DEBUG_ALQ
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#include <dev/ath/if_ath_alq.h>
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#endif
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#ifdef IEEE80211_SUPPORT_TDMA
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#include <dev/ath/if_ath_tdma.h>
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static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
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u_int32_t bintval);
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static void ath_tdma_bintvalsetup(struct ath_softc *sc,
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const struct ieee80211_tdma_state *tdma);
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#endif /* IEEE80211_SUPPORT_TDMA */
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#ifdef IEEE80211_SUPPORT_TDMA
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static void
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ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, u_int32_t bintval)
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{
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struct ath_hal *ah = sc->sc_ah;
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HAL_BEACON_TIMERS bt;
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bt.bt_intval = bintval | HAL_BEACON_ENA;
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bt.bt_nexttbtt = nexttbtt;
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bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep;
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bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep;
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bt.bt_nextatim = nexttbtt+1;
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/* Enables TBTT, DBA, SWBA timers by default */
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bt.bt_flags = 0;
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#if 0
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DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
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"%s: intval=%d (0x%08x) nexttbtt=%u (0x%08x), nextdba=%u (0x%08x), nextswba=%u (0x%08x),nextatim=%u (0x%08x)\n",
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__func__,
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bt.bt_intval,
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bt.bt_intval,
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bt.bt_nexttbtt,
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bt.bt_nexttbtt,
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bt.bt_nextdba,
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bt.bt_nextdba,
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bt.bt_nextswba,
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bt.bt_nextswba,
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bt.bt_nextatim,
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bt.bt_nextatim);
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#endif
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#ifdef ATH_DEBUG_ALQ
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if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET)) {
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struct if_ath_alq_tdma_timer_set t;
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t.bt_intval = htobe32(bt.bt_intval);
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t.bt_nexttbtt = htobe32(bt.bt_nexttbtt);
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t.bt_nextdba = htobe32(bt.bt_nextdba);
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t.bt_nextswba = htobe32(bt.bt_nextswba);
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t.bt_nextatim = htobe32(bt.bt_nextatim);
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t.bt_flags = htobe32(bt.bt_flags);
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t.sc_tdmadbaprep = htobe32(sc->sc_tdmadbaprep);
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t.sc_tdmaswbaprep = htobe32(sc->sc_tdmaswbaprep);
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if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET,
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sizeof(t), (char *) &t);
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}
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#endif
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DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
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"%s: nexttbtt=%u (0x%08x), nexttbtt tsf=%lld (0x%08llx)\n",
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__func__,
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bt.bt_nexttbtt,
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bt.bt_nexttbtt,
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(long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10),
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(long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10));
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ath_hal_beaconsettimers(ah, &bt);
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}
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/*
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* Calculate the beacon interval. This is periodic in the
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* superframe for the bss. We assume each station is configured
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* identically wrt transmit rate so the guard time we calculate
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* above will be the same on all stations. Note we need to
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* factor in the xmit time because the hardware will schedule
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* a frame for transmit if the start of the frame is within
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* the burst time. When we get hardware that properly kills
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* frames in the PCU we can reduce/eliminate the guard time.
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*
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* Roundup to 1024 is so we have 1 TU buffer in the guard time
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* to deal with the granularity of the nexttbtt timer. 11n MAC's
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* with 1us timer granularity should allow us to reduce/eliminate
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* this.
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*/
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static void
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ath_tdma_bintvalsetup(struct ath_softc *sc,
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const struct ieee80211_tdma_state *tdma)
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{
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/* copy from vap state (XXX check all vaps have same value?) */
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sc->sc_tdmaslotlen = tdma->tdma_slotlen;
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sc->sc_tdmabintval = roundup((sc->sc_tdmaslotlen+sc->sc_tdmaguard) *
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tdma->tdma_slotcnt, 1024);
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sc->sc_tdmabintval >>= 10; /* TSF -> TU */
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if (sc->sc_tdmabintval & 1)
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sc->sc_tdmabintval++;
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if (tdma->tdma_slot == 0) {
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/*
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* Only slot 0 beacons; other slots respond.
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*/
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sc->sc_imask |= HAL_INT_SWBA;
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sc->sc_tdmaswba = 0; /* beacon immediately */
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} else {
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/* XXX all vaps must be slot 0 or slot !0 */
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sc->sc_imask &= ~HAL_INT_SWBA;
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}
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}
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/*
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* Max 802.11 overhead. This assumes no 4-address frames and
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* the encapsulation done by ieee80211_encap (llc). We also
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* include potential crypto overhead.
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*/
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#define IEEE80211_MAXOVERHEAD \
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(sizeof(struct ieee80211_qosframe) \
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+ sizeof(struct llc) \
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+ IEEE80211_ADDR_LEN \
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+ IEEE80211_WEP_IVLEN \
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+ IEEE80211_WEP_KIDLEN \
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+ IEEE80211_WEP_CRCLEN \
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+ IEEE80211_WEP_MICLEN \
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+ IEEE80211_CRC_LEN)
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/*
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* Setup initially for tdma operation. Start the beacon
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* timers and enable SWBA if we are slot 0. Otherwise
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* we wait for slot 0 to arrive so we can sync up before
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* starting to transmit.
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*/
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void
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ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap)
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{
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struct ath_hal *ah = sc->sc_ah;
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struct ieee80211com *ic = &sc->sc_ic;
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const struct ieee80211_txparam *tp;
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const struct ieee80211_tdma_state *tdma = NULL;
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int rix;
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if (vap == NULL) {
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vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */
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if (vap == NULL) {
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device_printf(sc->sc_dev, "%s: no vaps?\n", __func__);
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return;
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}
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}
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/* XXX should take a locked ref to iv_bss */
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tp = vap->iv_bss->ni_txparms;
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/*
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* Calculate the guard time for each slot. This is the
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* time to send a maximal-size frame according to the
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* fixed/lowest transmit rate. Note that the interface
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* mtu does not include the 802.11 overhead so we must
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* tack that on (ath_hal_computetxtime includes the
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* preamble and plcp in its calculation).
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*/
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tdma = vap->iv_tdma;
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if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
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rix = ath_tx_findrix(sc, tp->ucastrate);
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else
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rix = ath_tx_findrix(sc, tp->mcastrate);
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/*
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* If the chip supports enforcing TxOP on transmission,
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* we can just delete the guard window. It isn't at all required.
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*/
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if (sc->sc_hasenforcetxop) {
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sc->sc_tdmaguard = 0;
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} else {
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/* XXX short preamble assumed */
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/* XXX non-11n rate assumed */
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sc->sc_tdmaguard = ath_hal_computetxtime(ah, sc->sc_currates,
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if_getmtu(vap->iv_ifp) + IEEE80211_MAXOVERHEAD, rix, AH_TRUE,
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AH_TRUE);
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}
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ath_hal_intrset(ah, 0);
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ath_beaconq_config(sc); /* setup h/w beacon q */
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if (sc->sc_setcca)
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ath_hal_setcca(ah, AH_FALSE); /* disable CCA */
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ath_tdma_bintvalsetup(sc, tdma); /* calculate beacon interval */
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ath_tdma_settimers(sc, sc->sc_tdmabintval,
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sc->sc_tdmabintval | HAL_BEACON_RESET_TSF);
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sc->sc_syncbeacon = 0;
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sc->sc_avgtsfdeltap = TDMA_DUMMY_MARKER;
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sc->sc_avgtsfdeltam = TDMA_DUMMY_MARKER;
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ath_hal_intrset(ah, sc->sc_imask);
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DPRINTF(sc, ATH_DEBUG_TDMA, "%s: slot %u len %uus cnt %u "
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"bsched %u guard %uus bintval %u TU dba prep %u\n", __func__,
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tdma->tdma_slot, tdma->tdma_slotlen, tdma->tdma_slotcnt,
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tdma->tdma_bintval, sc->sc_tdmaguard, sc->sc_tdmabintval,
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sc->sc_tdmadbaprep);
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#ifdef ATH_DEBUG_ALQ
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if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG)) {
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struct if_ath_alq_tdma_timer_config t;
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t.tdma_slot = htobe32(tdma->tdma_slot);
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t.tdma_slotlen = htobe32(tdma->tdma_slotlen);
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t.tdma_slotcnt = htobe32(tdma->tdma_slotcnt);
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t.tdma_bintval = htobe32(tdma->tdma_bintval);
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t.tdma_guard = htobe32(sc->sc_tdmaguard);
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t.tdma_scbintval = htobe32(sc->sc_tdmabintval);
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t.tdma_dbaprep = htobe32(sc->sc_tdmadbaprep);
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if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG,
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sizeof(t), (char *) &t);
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}
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#endif /* ATH_DEBUG_ALQ */
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}
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/*
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* Update tdma operation. Called from the 802.11 layer
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* when a beacon is received from the TDMA station operating
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* in the slot immediately preceding us in the bss. Use
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* the rx timestamp for the beacon frame to update our
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* beacon timers so we follow their schedule. Note that
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* by using the rx timestamp we implicitly include the
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* propagation delay in our schedule.
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*
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* XXX TODO: since the changes for the AR5416 and later chips
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* involved changing the TSF/TU calculations, we need to make
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* sure that various calculations wrap consistently.
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*
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* A lot of the problems stemmed from the calculations wrapping
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* at 65,535 TU. Since a lot of the math is still being done in
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* TU, please audit it to ensure that when the TU values programmed
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* into the timers wrap at (2^31)-1 TSF, all the various terms
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* wrap consistently.
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*/
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void
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ath_tdma_update(struct ieee80211_node *ni,
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const struct ieee80211_tdma_param *tdma, int changed)
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{
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#define TSF_TO_TU(_h,_l) \
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((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
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#define TU_TO_TSF(_tu) (((u_int64_t)(_tu)) << 10)
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struct ieee80211vap *vap = ni->ni_vap;
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struct ieee80211com *ic = ni->ni_ic;
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struct ath_softc *sc = ic->ic_softc;
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struct ath_hal *ah = sc->sc_ah;
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const HAL_RATE_TABLE *rt = sc->sc_currates;
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u_int64_t tsf, rstamp, nextslot, nexttbtt, nexttbtt_full;
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u_int32_t txtime, nextslottu;
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int32_t tudelta, tsfdelta;
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const struct ath_rx_status *rs;
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int rix;
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sc->sc_stats.ast_tdma_update++;
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/*
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* Check for and adopt configuration changes.
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*/
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if (changed != 0) {
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const struct ieee80211_tdma_state *ts = vap->iv_tdma;
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ath_tdma_bintvalsetup(sc, ts);
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if (changed & TDMA_UPDATE_SLOTLEN)
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ath_wme_update(ic);
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DPRINTF(sc, ATH_DEBUG_TDMA,
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"%s: adopt slot %u slotcnt %u slotlen %u us "
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"bintval %u TU\n", __func__,
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ts->tdma_slot, ts->tdma_slotcnt, ts->tdma_slotlen,
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sc->sc_tdmabintval);
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/* XXX right? */
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ath_hal_intrset(ah, sc->sc_imask);
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/* NB: beacon timers programmed below */
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}
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/* extend rx timestamp to 64 bits */
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rs = sc->sc_lastrs;
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tsf = ath_hal_gettsf64(ah);
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rstamp = ath_extend_tsf(sc, rs->rs_tstamp, tsf);
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/*
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* The rx timestamp is set by the hardware on completing
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* reception (at the point where the rx descriptor is DMA'd
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* to the host). To find the start of our next slot we
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* must adjust this time by the time required to send
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* the packet just received.
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*/
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rix = rt->rateCodeToIndex[rs->rs_rate];
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/*
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* To calculate the packet duration for legacy rates, we
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* only need the rix and preamble.
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*
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* For 11n non-aggregate frames, we also need the channel
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* width and short/long guard interval.
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*
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* For 11n aggregate frames, the required hacks are a little
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* more subtle. You need to figure out the frame duration
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* for each frame, including the delimiters. However, when
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* a frame isn't received successfully, we won't hear it
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* (unless you enable reception of CRC errored frames), so
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* your duration calculation is going to be off.
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*
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* However, we can assume that the beacon frames won't be
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* transmitted as aggregate frames, so we should be okay.
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* Just add a check to ensure that we aren't handed something
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* bad.
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*
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* For ath_hal_pkt_txtime() - for 11n rates, shortPreamble is
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* actually short guard interval. For legacy rates,
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* it's short preamble.
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*/
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txtime = ath_hal_pkt_txtime(ah, rt, rs->rs_datalen,
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rix,
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!! (rs->rs_flags & HAL_RX_2040),
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(rix & 0x80) ?
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(! (rs->rs_flags & HAL_RX_GI)) : rt->info[rix].shortPreamble,
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AH_TRUE);
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/* NB: << 9 is to cvt to TU and /2 */
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nextslot = (rstamp - txtime) + (sc->sc_tdmabintval << 9);
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/*
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* For 802.11n chips: nextslottu needs to be the full TSF space,
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* not just 0..65535 TU.
|
|
*/
|
|
nextslottu = TSF_TO_TU(nextslot>>32, nextslot);
|
|
/*
|
|
* Retrieve the hardware NextTBTT in usecs
|
|
* and calculate the difference between what the
|
|
* other station thinks and what we have programmed. This
|
|
* lets us figure how to adjust our timers to match. The
|
|
* adjustments are done by pulling the TSF forward and possibly
|
|
* rewriting the beacon timers.
|
|
*/
|
|
/*
|
|
* The logic here assumes the nexttbtt counter is in TSF
|
|
* but the prr-11n NICs are in TU. The HAL shifts them
|
|
* to TSF but there's two important differences:
|
|
*
|
|
* + The TU->TSF values have 0's for the low 9 bits, and
|
|
* + The counter wraps at TU_TO_TSF(HAL_BEACON_PERIOD + 1) for
|
|
* the pre-11n NICs, but not for the 11n NICs.
|
|
*
|
|
* So for now, just make sure the nexttbtt value we get
|
|
* matches the second issue or once nexttbtt exceeds this
|
|
* value, tsfdelta ends up becoming very negative and all
|
|
* of the adjustments get very messed up.
|
|
*/
|
|
|
|
/*
|
|
* We need to track the full nexttbtt rather than having it
|
|
* truncated at HAL_BEACON_PERIOD, as programming the
|
|
* nexttbtt (and related) registers for the 11n chips is
|
|
* actually going to take the full 32 bit space, rather than
|
|
* just 0..65535 TU.
|
|
*/
|
|
nexttbtt_full = ath_hal_getnexttbtt(ah);
|
|
nexttbtt = nexttbtt_full % (TU_TO_TSF(HAL_BEACON_PERIOD + 1));
|
|
tsfdelta = (int32_t)((nextslot % TU_TO_TSF(HAL_BEACON_PERIOD + 1)) - nexttbtt);
|
|
|
|
DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
|
|
"rs->rstamp %llu rstamp %llu tsf %llu txtime %d, nextslot %llu, "
|
|
"nextslottu %d, nextslottume %d\n",
|
|
(unsigned long long) rs->rs_tstamp,
|
|
(unsigned long long) rstamp,
|
|
(unsigned long long) tsf, txtime,
|
|
(unsigned long long) nextslot,
|
|
nextslottu, TSF_TO_TU(nextslot >> 32, nextslot));
|
|
DPRINTF(sc, ATH_DEBUG_TDMA,
|
|
" beacon tstamp: %llu (0x%016llx)\n",
|
|
(unsigned long long) le64toh(ni->ni_tstamp.tsf),
|
|
(unsigned long long) le64toh(ni->ni_tstamp.tsf));
|
|
|
|
DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
|
|
"nexttbtt %llu (0x%08llx) tsfdelta %d avg +%d/-%d\n",
|
|
(unsigned long long) nexttbtt,
|
|
(long long) nexttbtt,
|
|
tsfdelta,
|
|
TDMA_AVG(sc->sc_avgtsfdeltap), TDMA_AVG(sc->sc_avgtsfdeltam));
|
|
|
|
if (tsfdelta < 0) {
|
|
TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
|
|
TDMA_SAMPLE(sc->sc_avgtsfdeltam, -tsfdelta);
|
|
tsfdelta = -tsfdelta % 1024;
|
|
nextslottu++;
|
|
} else if (tsfdelta > 0) {
|
|
TDMA_SAMPLE(sc->sc_avgtsfdeltap, tsfdelta);
|
|
TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
|
|
tsfdelta = 1024 - (tsfdelta % 1024);
|
|
nextslottu++;
|
|
} else {
|
|
TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
|
|
TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
|
|
}
|
|
tudelta = nextslottu - TSF_TO_TU(nexttbtt_full >> 32, nexttbtt_full);
|
|
|
|
#ifdef ATH_DEBUG_ALQ
|
|
if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE)) {
|
|
struct if_ath_alq_tdma_beacon_state t;
|
|
t.rx_tsf = htobe64(rstamp);
|
|
t.beacon_tsf = htobe64(le64toh(ni->ni_tstamp.tsf));
|
|
t.tsf64 = htobe64(tsf);
|
|
t.nextslot_tsf = htobe64(nextslot);
|
|
t.nextslot_tu = htobe32(nextslottu);
|
|
t.txtime = htobe32(txtime);
|
|
if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE,
|
|
sizeof(t), (char *) &t);
|
|
}
|
|
|
|
if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC)) {
|
|
struct if_ath_alq_tdma_slot_calc t;
|
|
|
|
t.nexttbtt = htobe64(nexttbtt_full);
|
|
t.next_slot = htobe64(nextslot);
|
|
t.tsfdelta = htobe32(tsfdelta);
|
|
t.avg_plus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltap));
|
|
t.avg_minus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltam));
|
|
|
|
if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC,
|
|
sizeof(t), (char *) &t);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Copy sender's timetstamp into tdma ie so they can
|
|
* calculate roundtrip time. We submit a beacon frame
|
|
* below after any timer adjustment. The frame goes out
|
|
* at the next TBTT so the sender can calculate the
|
|
* roundtrip by inspecting the tdma ie in our beacon frame.
|
|
*
|
|
* NB: This tstamp is subtlely preserved when
|
|
* IEEE80211_BEACON_TDMA is marked (e.g. when the
|
|
* slot position changes) because ieee80211_add_tdma
|
|
* skips over the data.
|
|
*/
|
|
memcpy(vap->iv_bcn_off.bo_tdma +
|
|
__offsetof(struct ieee80211_tdma_param, tdma_tstamp),
|
|
&ni->ni_tstamp.data, 8);
|
|
#if 0
|
|
DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
|
|
"tsf %llu nextslot %llu (%d, %d) nextslottu %u nexttbtt %llu (%d)\n",
|
|
(unsigned long long) tsf, (unsigned long long) nextslot,
|
|
(int)(nextslot - tsf), tsfdelta, nextslottu, nexttbtt, tudelta);
|
|
#endif
|
|
/*
|
|
* Adjust the beacon timers only when pulling them forward
|
|
* or when going back by less than the beacon interval.
|
|
* Negative jumps larger than the beacon interval seem to
|
|
* cause the timers to stop and generally cause instability.
|
|
* This basically filters out jumps due to missed beacons.
|
|
*/
|
|
if (tudelta != 0 && (tudelta > 0 || -tudelta < sc->sc_tdmabintval)) {
|
|
DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
|
|
"%s: calling ath_tdma_settimers; nextslottu=%d, bintval=%d\n",
|
|
__func__,
|
|
nextslottu,
|
|
sc->sc_tdmabintval);
|
|
ath_tdma_settimers(sc, nextslottu, sc->sc_tdmabintval);
|
|
sc->sc_stats.ast_tdma_timers++;
|
|
}
|
|
if (tsfdelta > 0) {
|
|
uint64_t tsf;
|
|
|
|
/* XXX should just teach ath_hal_adjusttsf() to do this */
|
|
tsf = ath_hal_gettsf64(ah);
|
|
ath_hal_settsf64(ah, tsf + tsfdelta);
|
|
DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
|
|
"%s: calling ath_hal_adjusttsf: TSF=%llu, tsfdelta=%d\n",
|
|
__func__,
|
|
(unsigned long long) tsf,
|
|
tsfdelta);
|
|
|
|
#ifdef ATH_DEBUG_ALQ
|
|
if (if_ath_alq_checkdebug(&sc->sc_alq,
|
|
ATH_ALQ_TDMA_TSF_ADJUST)) {
|
|
struct if_ath_alq_tdma_tsf_adjust t;
|
|
|
|
t.tsfdelta = htobe32(tsfdelta);
|
|
t.tsf64_old = htobe64(tsf);
|
|
t.tsf64_new = htobe64(tsf + tsfdelta);
|
|
if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TSF_ADJUST,
|
|
sizeof(t), (char *) &t);
|
|
}
|
|
#endif /* ATH_DEBUG_ALQ */
|
|
sc->sc_stats.ast_tdma_tsf++;
|
|
}
|
|
ath_tdma_beacon_send(sc, vap); /* prepare response */
|
|
#undef TU_TO_TSF
|
|
#undef TSF_TO_TU
|
|
}
|
|
|
|
/*
|
|
* Transmit a beacon frame at SWBA. Dynamic updates
|
|
* to the frame contents are done as needed.
|
|
*/
|
|
void
|
|
ath_tdma_beacon_send(struct ath_softc *sc, struct ieee80211vap *vap)
|
|
{
|
|
struct ath_hal *ah = sc->sc_ah;
|
|
struct ath_buf *bf;
|
|
int otherant;
|
|
|
|
/*
|
|
* Check if the previous beacon has gone out. If
|
|
* not don't try to post another, skip this period
|
|
* and wait for the next. Missed beacons indicate
|
|
* a problem and should not occur. If we miss too
|
|
* many consecutive beacons reset the device.
|
|
*/
|
|
if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
|
|
sc->sc_bmisscount++;
|
|
DPRINTF(sc, ATH_DEBUG_BEACON,
|
|
"%s: missed %u consecutive beacons\n",
|
|
__func__, sc->sc_bmisscount);
|
|
if (sc->sc_bmisscount >= ath_bstuck_threshold)
|
|
taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
|
|
return;
|
|
}
|
|
if (sc->sc_bmisscount != 0) {
|
|
DPRINTF(sc, ATH_DEBUG_BEACON,
|
|
"%s: resume beacon xmit after %u misses\n",
|
|
__func__, sc->sc_bmisscount);
|
|
sc->sc_bmisscount = 0;
|
|
}
|
|
|
|
/*
|
|
* Check recent per-antenna transmit statistics and flip
|
|
* the default antenna if noticeably more frames went out
|
|
* on the non-default antenna.
|
|
* XXX assumes 2 anntenae
|
|
*/
|
|
if (!sc->sc_diversity) {
|
|
otherant = sc->sc_defant & 1 ? 2 : 1;
|
|
if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
|
|
ath_setdefantenna(sc, otherant);
|
|
sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
|
|
}
|
|
|
|
bf = ath_beacon_generate(sc, vap);
|
|
/* XXX We don't do cabq traffic, but just for completeness .. */
|
|
ATH_TXQ_LOCK(sc->sc_cabq);
|
|
ath_beacon_cabq_start(sc);
|
|
ATH_TXQ_UNLOCK(sc->sc_cabq);
|
|
|
|
if (bf != NULL) {
|
|
/*
|
|
* Stop any current dma and put the new frame on the queue.
|
|
* This should never fail since we check above that no frames
|
|
* are still pending on the queue.
|
|
*/
|
|
if ((! sc->sc_isedma) &&
|
|
(! ath_hal_stoptxdma(ah, sc->sc_bhalq))) {
|
|
DPRINTF(sc, ATH_DEBUG_ANY,
|
|
"%s: beacon queue %u did not stop?\n",
|
|
__func__, sc->sc_bhalq);
|
|
/* NB: the HAL still stops DMA, so proceed */
|
|
}
|
|
ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
|
|
ath_hal_txstart(ah, sc->sc_bhalq);
|
|
|
|
sc->sc_stats.ast_be_xmit++; /* XXX per-vap? */
|
|
|
|
/*
|
|
* Record local TSF for our last send for use
|
|
* in arbitrating slot collisions.
|
|
*/
|
|
/* XXX should take a locked ref to iv_bss */
|
|
vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah);
|
|
}
|
|
}
|
|
#endif /* IEEE80211_SUPPORT_TDMA */
|