523 lines
13 KiB
C
523 lines
13 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2017 Tom Jones <tj@enoti.me>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/*
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* Copyright (c) 2016 Mark Kettenis
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/gpio.h>
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#include <sys/clock.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/endian.h>
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#include <sys/rman.h>
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#include <sys/types.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <contrib/dev/acpica/include/acpi.h>
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#include <contrib/dev/acpica/include/accommon.h>
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#include <dev/acpica/acpivar.h>
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#include <dev/gpio/gpiobusvar.h>
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#include "opt_platform.h"
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#include "opt_acpi.h"
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#include "gpio_if.h"
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#include "chvgpio_reg.h"
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/*
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* Macros for driver mutex locking
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*/
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#define CHVGPIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx)
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#define CHVGPIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->sc_mtx)
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#define CHVGPIO_LOCK_INIT(_sc) \
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mtx_init(&_sc->sc_mtx, device_get_nameunit((_sc)->sc_dev), \
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"chvgpio", MTX_SPIN)
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#define CHVGPIO_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx)
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#define CHVGPIO_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
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#define CHVGPIO_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED)
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struct chvgpio_softc {
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device_t sc_dev;
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device_t sc_busdev;
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struct mtx sc_mtx;
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ACPI_HANDLE sc_handle;
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int sc_mem_rid;
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struct resource *sc_mem_res;
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int sc_irq_rid;
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struct resource *sc_irq_res;
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void *intr_handle;
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const char *sc_bank_prefix;
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const int *sc_pins;
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int sc_npins;
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int sc_ngroups;
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const char **sc_pin_names;
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};
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static void chvgpio_intr(void *);
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static int chvgpio_probe(device_t);
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static int chvgpio_attach(device_t);
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static int chvgpio_detach(device_t);
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static inline int
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chvgpio_pad_cfg0_offset(int pin)
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{
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return (CHVGPIO_PAD_CFG0 + 1024 * (pin / 15) + 8 * (pin % 15));
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}
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static inline int
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chvgpio_read_pad_cfg0(struct chvgpio_softc *sc, int pin)
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{
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return bus_read_4(sc->sc_mem_res, chvgpio_pad_cfg0_offset(pin));
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}
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static inline void
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chvgpio_write_pad_cfg0(struct chvgpio_softc *sc, int pin, uint32_t val)
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{
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bus_write_4(sc->sc_mem_res, chvgpio_pad_cfg0_offset(pin), val);
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}
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static inline int
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chvgpio_read_pad_cfg1(struct chvgpio_softc *sc, int pin)
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{
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return bus_read_4(sc->sc_mem_res, chvgpio_pad_cfg0_offset(pin) + 4);
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}
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static device_t
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chvgpio_get_bus(device_t dev)
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{
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struct chvgpio_softc *sc;
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sc = device_get_softc(dev);
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return (sc->sc_busdev);
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}
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static int
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chvgpio_pin_max(device_t dev, int *maxpin)
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{
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struct chvgpio_softc *sc;
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sc = device_get_softc(dev);
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*maxpin = sc->sc_npins - 1;
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return (0);
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}
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static int
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chvgpio_valid_pin(struct chvgpio_softc *sc, int pin)
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{
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if (pin < 0)
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return EINVAL;
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if ((pin / 15) >= sc->sc_ngroups)
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return EINVAL;
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if ((pin % 15) >= sc->sc_pins[pin / 15])
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return EINVAL;
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return (0);
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}
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static int
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chvgpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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struct chvgpio_softc *sc;
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sc = device_get_softc(dev);
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if (chvgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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/* return pin name from datasheet */
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snprintf(name, GPIOMAXNAME, "%s", sc->sc_pin_names[pin]);
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name[GPIOMAXNAME - 1] = '\0';
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return (0);
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}
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static int
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chvgpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct chvgpio_softc *sc;
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sc = device_get_softc(dev);
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if (chvgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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*caps = 0;
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if (chvgpio_valid_pin(sc, pin))
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*caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
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return (0);
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}
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static int
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chvgpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
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{
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struct chvgpio_softc *sc;
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uint32_t val;
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sc = device_get_softc(dev);
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if (chvgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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*flags = 0;
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/* Get the current pin state */
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CHVGPIO_LOCK(sc);
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val = chvgpio_read_pad_cfg0(sc, pin);
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if (val & CHVGPIO_PAD_CFG0_GPIOCFG_GPIO ||
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val & CHVGPIO_PAD_CFG0_GPIOCFG_GPO)
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*flags |= GPIO_PIN_OUTPUT;
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if (val & CHVGPIO_PAD_CFG0_GPIOCFG_GPIO ||
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val & CHVGPIO_PAD_CFG0_GPIOCFG_GPI)
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*flags |= GPIO_PIN_INPUT;
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val = chvgpio_read_pad_cfg1(sc, pin);
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CHVGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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chvgpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct chvgpio_softc *sc;
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uint32_t val;
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uint32_t allowed;
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sc = device_get_softc(dev);
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if (chvgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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allowed = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
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/*
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* Only direction flag allowed
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*/
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if (flags & ~allowed)
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return (EINVAL);
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/*
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* Not both directions simultaneously
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*/
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if ((flags & allowed) == allowed)
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return (EINVAL);
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/* Set the GPIO mode and state */
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CHVGPIO_LOCK(sc);
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val = chvgpio_read_pad_cfg0(sc, pin);
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if (flags & GPIO_PIN_INPUT)
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val = val & CHVGPIO_PAD_CFG0_GPIOCFG_GPI;
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if (flags & GPIO_PIN_OUTPUT)
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val = val & CHVGPIO_PAD_CFG0_GPIOCFG_GPO;
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chvgpio_write_pad_cfg0(sc, pin, val);
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CHVGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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chvgpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
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{
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struct chvgpio_softc *sc;
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uint32_t val;
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sc = device_get_softc(dev);
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if (chvgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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CHVGPIO_LOCK(sc);
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val = chvgpio_read_pad_cfg0(sc, pin);
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if (value == GPIO_PIN_LOW)
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val = val & ~CHVGPIO_PAD_CFG0_GPIOTXSTATE;
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else
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val = val | CHVGPIO_PAD_CFG0_GPIOTXSTATE;
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chvgpio_write_pad_cfg0(sc, pin, val);
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CHVGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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chvgpio_pin_get(device_t dev, uint32_t pin, unsigned int *value)
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{
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struct chvgpio_softc *sc;
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uint32_t val;
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sc = device_get_softc(dev);
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if (chvgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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CHVGPIO_LOCK(sc);
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/* Read pin value */
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val = chvgpio_read_pad_cfg0(sc, pin);
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if (val & CHVGPIO_PAD_CFG0_GPIORXSTATE)
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*value = GPIO_PIN_HIGH;
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else
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*value = GPIO_PIN_LOW;
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CHVGPIO_UNLOCK(sc);
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return (0);
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}
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static int
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chvgpio_pin_toggle(device_t dev, uint32_t pin)
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{
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struct chvgpio_softc *sc;
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uint32_t val;
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sc = device_get_softc(dev);
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if (chvgpio_valid_pin(sc, pin) != 0)
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return (EINVAL);
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CHVGPIO_LOCK(sc);
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/* Toggle the pin */
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val = chvgpio_read_pad_cfg0(sc, pin);
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val = val ^ CHVGPIO_PAD_CFG0_GPIOTXSTATE;
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chvgpio_write_pad_cfg0(sc, pin, val);
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CHVGPIO_UNLOCK(sc);
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return (0);
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}
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static char *chvgpio_hids[] = {
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"INT33FF",
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NULL
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};
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static int
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chvgpio_probe(device_t dev)
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{
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int rv;
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if (acpi_disabled("chvgpio"))
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return (ENXIO);
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rv = ACPI_ID_PROBE(device_get_parent(dev), dev, chvgpio_hids, NULL);
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if (rv <= 0)
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device_set_desc(dev, "Intel Cherry View GPIO");
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return (rv);
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}
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static int
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chvgpio_attach(device_t dev)
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{
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struct chvgpio_softc *sc;
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ACPI_STATUS status;
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int uid;
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int i;
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int error;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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sc->sc_handle = acpi_get_handle(dev);
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status = acpi_GetInteger(sc->sc_handle, "_UID", &uid);
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if (ACPI_FAILURE(status)) {
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device_printf(dev, "failed to read _UID\n");
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return (ENXIO);
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}
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CHVGPIO_LOCK_INIT(sc);
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switch (uid) {
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case SW_UID:
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sc->sc_bank_prefix = SW_BANK_PREFIX;
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sc->sc_pins = chv_southwest_pins;
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sc->sc_pin_names = chv_southwest_pin_names;
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break;
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case N_UID:
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sc->sc_bank_prefix = N_BANK_PREFIX;
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sc->sc_pins = chv_north_pins;
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sc->sc_pin_names = chv_north_pin_names;
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break;
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case E_UID:
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sc->sc_bank_prefix = E_BANK_PREFIX;
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sc->sc_pins = chv_east_pins;
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sc->sc_pin_names = chv_east_pin_names;
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break;
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case SE_UID:
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sc->sc_bank_prefix = SE_BANK_PREFIX;
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sc->sc_pins = chv_southeast_pins;
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sc->sc_pin_names = chv_southeast_pin_names;
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break;
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default:
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device_printf(dev, "invalid _UID value: %d\n", uid);
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return (ENXIO);
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}
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for (i = 0; sc->sc_pins[i] >= 0; i++) {
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sc->sc_npins += sc->sc_pins[i];
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sc->sc_ngroups++;
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}
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sc->sc_mem_rid = 0;
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sc->sc_mem_res = bus_alloc_resource_any(sc->sc_dev, SYS_RES_MEMORY,
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&sc->sc_mem_rid, RF_ACTIVE);
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if (sc->sc_mem_res == NULL) {
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CHVGPIO_LOCK_DESTROY(sc);
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device_printf(dev, "can't allocate memory resource\n");
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return (ENOMEM);
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}
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sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&sc->sc_irq_rid, RF_ACTIVE);
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if (!sc->sc_irq_res) {
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CHVGPIO_LOCK_DESTROY(sc);
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bus_release_resource(dev, SYS_RES_MEMORY,
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sc->sc_mem_rid, sc->sc_mem_res);
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device_printf(dev, "can't allocate irq resource\n");
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return (ENOMEM);
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}
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error = bus_setup_intr(sc->sc_dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
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NULL, chvgpio_intr, sc, &sc->intr_handle);
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if (error) {
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device_printf(sc->sc_dev, "unable to setup irq: error %d\n", error);
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CHVGPIO_LOCK_DESTROY(sc);
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bus_release_resource(dev, SYS_RES_MEMORY,
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sc->sc_mem_rid, sc->sc_mem_res);
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bus_release_resource(dev, SYS_RES_IRQ,
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sc->sc_irq_rid, sc->sc_irq_res);
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return (ENXIO);
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}
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/* Mask and ack all interrupts. */
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bus_write_4(sc->sc_mem_res, CHVGPIO_INTERRUPT_MASK, 0);
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bus_write_4(sc->sc_mem_res, CHVGPIO_INTERRUPT_STATUS, 0xffff);
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sc->sc_busdev = gpiobus_attach_bus(dev);
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if (sc->sc_busdev == NULL) {
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CHVGPIO_LOCK_DESTROY(sc);
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bus_release_resource(dev, SYS_RES_MEMORY,
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sc->sc_mem_rid, sc->sc_mem_res);
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bus_release_resource(dev, SYS_RES_IRQ,
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sc->sc_irq_rid, sc->sc_irq_res);
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return (ENXIO);
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}
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return (0);
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}
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static void
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chvgpio_intr(void *arg)
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{
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struct chvgpio_softc *sc = arg;
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uint32_t reg;
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int line;
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reg = bus_read_4(sc->sc_mem_res, CHVGPIO_INTERRUPT_STATUS);
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for (line = 0; line < 16; line++) {
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if ((reg & (1 << line)) == 0)
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continue;
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bus_write_4(sc->sc_mem_res, CHVGPIO_INTERRUPT_STATUS, 1 << line);
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}
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}
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static int
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chvgpio_detach(device_t dev)
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{
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struct chvgpio_softc *sc;
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sc = device_get_softc(dev);
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if (sc->sc_busdev)
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gpiobus_detach_bus(dev);
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if (sc->intr_handle != NULL)
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bus_teardown_intr(sc->sc_dev, sc->sc_irq_res, sc->intr_handle);
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if (sc->sc_irq_res != NULL)
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bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid, sc->sc_irq_res);
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if (sc->sc_mem_res != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid, sc->sc_mem_res);
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CHVGPIO_LOCK_DESTROY(sc);
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return (0);
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}
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static device_method_t chvgpio_methods[] = {
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DEVMETHOD(device_probe, chvgpio_probe),
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DEVMETHOD(device_attach, chvgpio_attach),
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DEVMETHOD(device_detach, chvgpio_detach),
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/* GPIO protocol */
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DEVMETHOD(gpio_get_bus, chvgpio_get_bus),
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DEVMETHOD(gpio_pin_max, chvgpio_pin_max),
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DEVMETHOD(gpio_pin_getname, chvgpio_pin_getname),
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DEVMETHOD(gpio_pin_getflags, chvgpio_pin_getflags),
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DEVMETHOD(gpio_pin_getcaps, chvgpio_pin_getcaps),
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DEVMETHOD(gpio_pin_setflags, chvgpio_pin_setflags),
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DEVMETHOD(gpio_pin_get, chvgpio_pin_get),
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DEVMETHOD(gpio_pin_set, chvgpio_pin_set),
|
|
DEVMETHOD(gpio_pin_toggle, chvgpio_pin_toggle),
|
|
|
|
DEVMETHOD_END
|
|
};
|
|
|
|
static driver_t chvgpio_driver = {
|
|
.name = "gpio",
|
|
.methods = chvgpio_methods,
|
|
.size = sizeof(struct chvgpio_softc)
|
|
};
|
|
|
|
DRIVER_MODULE(chvgpio, acpi, chvgpio_driver, NULL, NULL);
|
|
MODULE_DEPEND(chvgpio, acpi, 1, 1, 1);
|
|
MODULE_DEPEND(chvgpio, gpiobus, 1, 1, 1);
|
|
|
|
MODULE_VERSION(chvgpio, 1);
|