438 lines
9.9 KiB
C
438 lines
9.9 KiB
C
/*-
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* Copyright (c) 2020 Alstom Group.
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* Copyright (c) 2020 Semihalf.
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* Copyright (c) 2015 Justin Hibbits
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/rman.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <machine/stdarg.h>
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#include <dev/gpio/gpiobusvar.h>
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#include <dev/gpio/qoriq_gpio.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "gpio_if.h"
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static device_t
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qoriq_gpio_get_bus(device_t dev)
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{
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struct qoriq_gpio_softc *sc;
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sc = device_get_softc(dev);
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return (sc->busdev);
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}
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static int
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qoriq_gpio_pin_max(device_t dev, int *maxpin)
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{
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*maxpin = MAXPIN;
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return (0);
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}
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/* Get a specific pin's capabilities. */
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static int
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qoriq_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct qoriq_gpio_softc *sc;
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sc = device_get_softc(dev);
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if (!VALID_PIN(pin))
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return (EINVAL);
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GPIO_LOCK(sc);
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*caps = sc->sc_pins[pin].gp_caps;
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GPIO_UNLOCK(sc);
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return (0);
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}
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/* Get a specific pin's name. */
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static int
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qoriq_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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if (!VALID_PIN(pin))
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return (EINVAL);
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snprintf(name, GPIOMAXNAME, "qoriq_gpio%d.%d",
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device_get_unit(dev), pin);
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name[GPIOMAXNAME-1] = '\0';
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return (0);
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}
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static int
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qoriq_gpio_pin_configure(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct qoriq_gpio_softc *sc;
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uint32_t reg;
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sc = device_get_softc(dev);
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if ((flags & sc->sc_pins[pin].gp_caps) != flags) {
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return (EINVAL);
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}
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if (flags & GPIO_PIN_INPUT) {
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reg = bus_read_4(sc->sc_mem, GPIO_GPDIR);
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reg &= ~(1 << (31 - pin));
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bus_write_4(sc->sc_mem, GPIO_GPDIR, reg);
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}
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else if (flags & GPIO_PIN_OUTPUT) {
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reg = bus_read_4(sc->sc_mem, GPIO_GPDIR);
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reg |= (1 << (31 - pin));
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bus_write_4(sc->sc_mem, GPIO_GPDIR, reg);
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reg = bus_read_4(sc->sc_mem, GPIO_GPODR);
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if (flags & GPIO_PIN_OPENDRAIN)
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reg |= (1 << (31 - pin));
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else
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reg &= ~(1 << (31 - pin));
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bus_write_4(sc->sc_mem, GPIO_GPODR, reg);
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}
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sc->sc_pins[pin].gp_flags = flags;
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return (0);
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}
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/* Set flags for the pin. */
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static int
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qoriq_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct qoriq_gpio_softc *sc = device_get_softc(dev);
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uint32_t ret;
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if (!VALID_PIN(pin))
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return (EINVAL);
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if ((flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) ==
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(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT))
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return (EINVAL);
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GPIO_LOCK(sc);
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ret = qoriq_gpio_pin_configure(dev, pin, flags);
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GPIO_UNLOCK(sc);
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return (ret);
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}
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static int
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qoriq_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *pflags)
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{
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struct qoriq_gpio_softc *sc;
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if (!VALID_PIN(pin))
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return (EINVAL);
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sc = device_get_softc(dev);
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GPIO_LOCK(sc);
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*pflags = sc->sc_pins[pin].gp_flags;
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GPIO_UNLOCK(sc);
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return (0);
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}
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/* Set a specific output pin's value. */
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static int
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qoriq_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
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{
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struct qoriq_gpio_softc *sc = device_get_softc(dev);
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uint32_t outvals;
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uint8_t pinbit;
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if (!VALID_PIN(pin) || value > 1)
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return (EINVAL);
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GPIO_LOCK(sc);
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pinbit = 31 - pin;
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outvals = bus_read_4(sc->sc_mem, GPIO_GPDAT);
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outvals &= ~(1 << pinbit);
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outvals |= (value << pinbit);
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bus_write_4(sc->sc_mem, GPIO_GPDAT, outvals);
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GPIO_UNLOCK(sc);
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return (0);
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}
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/* Get a specific pin's input value. */
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static int
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qoriq_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value)
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{
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struct qoriq_gpio_softc *sc = device_get_softc(dev);
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if (!VALID_PIN(pin))
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return (EINVAL);
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*value = (bus_read_4(sc->sc_mem, GPIO_GPDAT) >> (31 - pin)) & 1;
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return (0);
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}
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/* Toggle a pin's output value. */
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static int
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qoriq_gpio_pin_toggle(device_t dev, uint32_t pin)
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{
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struct qoriq_gpio_softc *sc = device_get_softc(dev);
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uint32_t val;
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if (!VALID_PIN(pin))
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return (EINVAL);
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GPIO_LOCK(sc);
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val = bus_read_4(sc->sc_mem, GPIO_GPDAT);
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val ^= (1 << (31 - pin));
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bus_write_4(sc->sc_mem, GPIO_GPDAT, val);
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GPIO_UNLOCK(sc);
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return (0);
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}
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static struct ofw_compat_data gpio_matches[] = {
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{"fsl,pq3-gpio", 1},
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{"fsl,mpc8572-gpio", 1},
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{"fsl,qoriq-gpio", 1},
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{0, 0}
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};
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static int
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qoriq_gpio_probe(device_t dev)
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{
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if (ofw_bus_search_compatible(dev, gpio_matches)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Freescale QorIQ GPIO driver");
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return (0);
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}
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static int
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qoriq_gpio_pin_access_32(device_t dev, uint32_t first_pin, uint32_t clear_pins,
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uint32_t change_pins, uint32_t *orig_pins)
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{
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struct qoriq_gpio_softc *sc;
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uint32_t hwstate;
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sc = device_get_softc(dev);
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if (first_pin != 0)
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return (EINVAL);
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GPIO_LOCK(sc);
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hwstate = bus_read_4(sc->sc_mem, GPIO_GPDAT);
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bus_write_4(sc->sc_mem, GPIO_GPDAT,
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(hwstate & ~clear_pins) ^ change_pins);
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GPIO_UNLOCK(sc);
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if (orig_pins != NULL)
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*orig_pins = hwstate;
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return (0);
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}
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static int
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qoriq_gpio_pin_config_32(device_t dev, uint32_t first_pin, uint32_t num_pins,
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uint32_t *pin_flags)
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{
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uint32_t dir, odr, mask, reg;
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struct qoriq_gpio_softc *sc;
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uint32_t newflags[32];
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int i;
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if (first_pin != 0 || !VALID_PIN(num_pins))
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return (EINVAL);
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sc = device_get_softc(dev);
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dir = odr = mask = 0;
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for (i = 0; i < num_pins; i++) {
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newflags[i] = 0;
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mask |= (1 << i);
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if (pin_flags[i] & GPIO_PIN_INPUT) {
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newflags[i] = GPIO_PIN_INPUT;
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dir &= ~(1 << i);
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} else {
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newflags[i] = GPIO_PIN_OUTPUT;
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dir |= (1 << i);
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if (pin_flags[i] & GPIO_PIN_OPENDRAIN) {
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newflags[i] |= GPIO_PIN_OPENDRAIN;
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odr |= (1 << i);
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} else {
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newflags[i] |= GPIO_PIN_PUSHPULL;
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odr &= ~(1 << i);
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}
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}
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}
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GPIO_LOCK(sc);
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reg = (bus_read_4(sc->sc_mem, GPIO_GPDIR) & ~mask) | dir;
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bus_write_4(sc->sc_mem, GPIO_GPDIR, reg);
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reg = (bus_read_4(sc->sc_mem, GPIO_GPODR) & ~mask) | odr;
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bus_write_4(sc->sc_mem, GPIO_GPODR, reg);
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for (i = 0; i < num_pins; i++)
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sc->sc_pins[i].gp_flags = newflags[i];
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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qoriq_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, int gcells,
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pcell_t *gpios, uint32_t *pin, uint32_t *flags)
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{
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struct qoriq_gpio_softc *sc;
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int err;
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if (!VALID_PIN(gpios[0]))
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return (EINVAL);
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sc = device_get_softc(bus);
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GPIO_LOCK(sc);
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err = qoriq_gpio_pin_configure(bus, gpios[0], gpios[1]);
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GPIO_UNLOCK(sc);
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if (err == 0) {
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*pin = gpios[0];
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*flags = gpios[1];
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}
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return (err);
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}
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int
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qoriq_gpio_attach(device_t dev)
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{
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struct qoriq_gpio_softc *sc = device_get_softc(dev);
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int i, rid;
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sc->dev = dev;
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GPIO_LOCK_INIT(sc);
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/* Allocate memory. */
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rid = 0;
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sc->sc_mem = bus_alloc_resource_any(dev,
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SYS_RES_MEMORY, &rid, RF_ACTIVE);
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if (sc->sc_mem == NULL) {
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device_printf(dev, "Can't allocate memory for device output port");
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qoriq_gpio_detach(dev);
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return (ENOMEM);
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}
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for (i = 0; i <= MAXPIN; i++)
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sc->sc_pins[i].gp_caps = DEFAULT_CAPS;
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sc->busdev = gpiobus_attach_bus(dev);
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if (sc->busdev == NULL) {
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qoriq_gpio_detach(dev);
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return (ENOMEM);
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}
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/*
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* Enable the GPIO Input Buffer for all GPIOs.
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* This is safe on devices without a GPIBE register, because those
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* devices ignore writes and read 0's in undefined portions of the map.
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*/
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if (ofw_bus_is_compatible(dev, "fsl,qoriq-gpio"))
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bus_write_4(sc->sc_mem, GPIO_GPIBE, 0xffffffff);
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OF_device_register_xref(OF_xref_from_node(ofw_bus_get_node(dev)), dev);
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return (0);
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}
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int
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qoriq_gpio_detach(device_t dev)
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{
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struct qoriq_gpio_softc *sc = device_get_softc(dev);
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gpiobus_detach_bus(dev);
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if (sc->sc_mem != NULL) {
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/* Release output port resource. */
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bus_release_resource(dev, SYS_RES_MEMORY,
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rman_get_rid(sc->sc_mem), sc->sc_mem);
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}
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GPIO_LOCK_DESTROY(sc);
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return (0);
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}
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static device_method_t qoriq_gpio_methods[] = {
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/* device_if */
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DEVMETHOD(device_probe, qoriq_gpio_probe),
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DEVMETHOD(device_attach, qoriq_gpio_attach),
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DEVMETHOD(device_detach, qoriq_gpio_detach),
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/* GPIO protocol */
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DEVMETHOD(gpio_get_bus, qoriq_gpio_get_bus),
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DEVMETHOD(gpio_pin_max, qoriq_gpio_pin_max),
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DEVMETHOD(gpio_pin_getname, qoriq_gpio_pin_getname),
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DEVMETHOD(gpio_pin_getcaps, qoriq_gpio_pin_getcaps),
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DEVMETHOD(gpio_pin_get, qoriq_gpio_pin_get),
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DEVMETHOD(gpio_pin_set, qoriq_gpio_pin_set),
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DEVMETHOD(gpio_pin_getflags, qoriq_gpio_pin_getflags),
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DEVMETHOD(gpio_pin_setflags, qoriq_gpio_pin_setflags),
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DEVMETHOD(gpio_pin_toggle, qoriq_gpio_pin_toggle),
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DEVMETHOD(gpio_map_gpios, qoriq_gpio_map_gpios),
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DEVMETHOD(gpio_pin_access_32, qoriq_gpio_pin_access_32),
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DEVMETHOD(gpio_pin_config_32, qoriq_gpio_pin_config_32),
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DEVMETHOD_END
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};
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DEFINE_CLASS_0(gpio, qoriq_gpio_driver, qoriq_gpio_methods,
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sizeof(struct qoriq_gpio_softc));
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EARLY_DRIVER_MODULE(qoriq_gpio, simplebus, qoriq_gpio_driver, NULL, NULL,
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BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
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