621 lines
14 KiB
C
621 lines
14 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2011,2013 Justin Hibbits
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* Copyright (c) 2005, Joseph Koshy
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/pmc.h>
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#include <sys/pmckern.h>
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#include <sys/sysent.h>
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#include <sys/syslog.h>
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#include <sys/systm.h>
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#include <machine/pmc_mdep.h>
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#include <machine/spr.h>
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#include <machine/pte.h>
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#include <machine/sr.h>
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#include <machine/cpu.h>
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#include <machine/stack.h>
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#include "hwpmc_powerpc.h"
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#ifdef __powerpc64__
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#define OFFSET 4 /* Account for the TOC reload slot */
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#else
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#define OFFSET 0
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#endif
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struct powerpc_cpu **powerpc_pcpu;
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struct pmc_ppc_event *ppc_event_codes;
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size_t ppc_event_codes_size;
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int ppc_event_first;
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int ppc_event_last;
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int ppc_max_pmcs;
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enum pmc_class ppc_class;
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void (*powerpc_set_pmc)(int cpu, int ri, int config);
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pmc_value_t (*powerpc_pmcn_read)(unsigned int pmc);
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void (*powerpc_pmcn_write)(unsigned int pmc, uint32_t val);
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void (*powerpc_resume_pmc)(bool ie);
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int
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pmc_save_kernel_callchain(uintptr_t *cc, int maxsamples,
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struct trapframe *tf)
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{
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uintptr_t *osp, *sp;
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uintptr_t pc;
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int frames = 0;
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cc[frames++] = PMC_TRAPFRAME_TO_PC(tf);
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sp = (uintptr_t *)PMC_TRAPFRAME_TO_FP(tf);
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osp = (uintptr_t *)PAGE_SIZE;
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for (; frames < maxsamples; frames++) {
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if (sp <= osp)
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break;
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#ifdef __powerpc64__
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pc = sp[2];
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#else
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pc = sp[1];
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#endif
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if ((pc & 3) || (pc < 0x100))
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break;
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/*
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* trapexit() and asttrapexit() are sentinels
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* for kernel stack tracing.
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* */
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if (pc + OFFSET == (uintptr_t) &trapexit ||
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pc + OFFSET == (uintptr_t) &asttrapexit)
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break;
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cc[frames] = pc;
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osp = sp;
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sp = (uintptr_t *)*sp;
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}
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return (frames);
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}
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int
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powerpc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
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{
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struct pmc_hw *phw;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[powerpc,%d], illegal CPU %d", __LINE__, cpu));
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phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri];
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snprintf(pi->pm_name, sizeof(pi->pm_name), "POWERPC-%d", ri);
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pi->pm_class = powerpc_pcpu[cpu]->pc_class;
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if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
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pi->pm_enabled = TRUE;
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*ppmc = phw->phw_pmc;
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} else {
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pi->pm_enabled = FALSE;
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*ppmc = NULL;
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}
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return (0);
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}
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int
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powerpc_get_config(int cpu, int ri, struct pmc **ppm)
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{
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*ppm = powerpc_pcpu[cpu]->pc_ppcpmcs[ri].phw_pmc;
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return (0);
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}
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int
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powerpc_pcpu_init(struct pmc_mdep *md, int cpu)
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{
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struct pmc_cpu *pc;
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struct powerpc_cpu *pac;
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struct pmc_hw *phw;
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int first_ri, i;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[powerpc,%d] wrong cpu number %d", __LINE__, cpu));
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PMCDBG1(MDP,INI,1,"powerpc-init cpu=%d", cpu);
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powerpc_pcpu[cpu] = pac = malloc(sizeof(struct powerpc_cpu) +
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ppc_max_pmcs * sizeof(struct pmc_hw), M_PMC, M_WAITOK | M_ZERO);
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pac->pc_class =
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md->pmd_classdep[PMC_MDEP_CLASS_INDEX_POWERPC].pcd_class;
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pc = pmc_pcpu[cpu];
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first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_POWERPC].pcd_ri;
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KASSERT(pc != NULL, ("[powerpc,%d] NULL per-cpu pointer", __LINE__));
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for (i = 0, phw = pac->pc_ppcpmcs; i < ppc_max_pmcs; i++, phw++) {
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phw->phw_state = PMC_PHW_FLAG_IS_ENABLED |
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PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(i);
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phw->phw_pmc = NULL;
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pc->pc_hwpmcs[i + first_ri] = phw;
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}
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return (0);
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}
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int
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powerpc_pcpu_fini(struct pmc_mdep *md, int cpu)
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{
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PMCDBG1(MDP,INI,1,"powerpc-fini cpu=%d", cpu);
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free(powerpc_pcpu[cpu], M_PMC);
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powerpc_pcpu[cpu] = NULL;
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return (0);
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}
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int
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powerpc_allocate_pmc(int cpu, int ri, struct pmc *pm,
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const struct pmc_op_pmcallocate *a)
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{
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enum pmc_event pe;
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uint32_t caps, config = 0, counter = 0;
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int i;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[powerpc,%d] illegal CPU value %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < ppc_max_pmcs,
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("[powerpc,%d] illegal row index %d", __LINE__, ri));
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if (a->pm_class != ppc_class)
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return (EINVAL);
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caps = a->pm_caps;
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pe = a->pm_ev;
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if (pe < ppc_event_first || pe > ppc_event_last)
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return (EINVAL);
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for (i = 0; i < ppc_event_codes_size; i++) {
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if (ppc_event_codes[i].pe_event == pe) {
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config = ppc_event_codes[i].pe_code;
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counter = ppc_event_codes[i].pe_flags;
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break;
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}
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}
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if (i == ppc_event_codes_size)
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return (EINVAL);
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if ((counter & (1 << ri)) == 0)
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return (EINVAL);
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if (caps & PMC_CAP_SYSTEM)
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config |= POWERPC_PMC_KERNEL_ENABLE;
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if (caps & PMC_CAP_USER)
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config |= POWERPC_PMC_USER_ENABLE;
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if ((caps & (PMC_CAP_USER | PMC_CAP_SYSTEM)) == 0)
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config |= POWERPC_PMC_ENABLE;
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pm->pm_md.pm_powerpc.pm_powerpc_evsel = config;
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PMCDBG3(MDP,ALL,1,"powerpc-allocate cpu=%d ri=%d -> config=0x%x",
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cpu, ri, config);
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return (0);
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}
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int
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powerpc_release_pmc(int cpu, int ri, struct pmc *pmc)
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{
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struct pmc_hw *phw __diagused;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[powerpc,%d] illegal CPU value %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < ppc_max_pmcs,
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("[powerpc,%d] illegal row-index %d", __LINE__, ri));
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phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri];
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KASSERT(phw->phw_pmc == NULL,
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("[powerpc,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc));
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return (0);
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}
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int
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powerpc_start_pmc(int cpu, int ri, struct pmc *pm)
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{
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PMCDBG2(MDP,STA,1,"powerpc-start cpu=%d ri=%d", cpu, ri);
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powerpc_set_pmc(cpu, ri, pm->pm_md.pm_powerpc.pm_powerpc_evsel);
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return (0);
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}
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int
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powerpc_stop_pmc(int cpu, int ri, struct pmc *pm __unused)
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{
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PMCDBG2(MDP,STO,1, "powerpc-stop cpu=%d ri=%d", cpu, ri);
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powerpc_set_pmc(cpu, ri, PMCN_NONE);
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return (0);
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}
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int
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powerpc_config_pmc(int cpu, int ri, struct pmc *pm)
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{
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struct pmc_hw *phw;
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PMCDBG3(MDP,CFG,1, "powerpc-config cpu=%d ri=%d pm=%p", cpu, ri, pm);
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[powerpc,%d] illegal CPU value %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < ppc_max_pmcs,
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("[powerpc,%d] illegal row-index %d", __LINE__, ri));
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phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri];
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KASSERT(pm == NULL || phw->phw_pmc == NULL,
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("[powerpc,%d] pm=%p phw->pm=%p hwpmc not unconfigured",
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__LINE__, pm, phw->phw_pmc));
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phw->phw_pmc = pm;
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return (0);
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}
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pmc_value_t
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powerpc_pmcn_read_default(unsigned int pmc)
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{
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pmc_value_t val;
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if (pmc > ppc_max_pmcs)
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panic("Invalid PMC number: %d\n", pmc);
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switch (pmc) {
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case 0:
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val = mfspr(SPR_PMC1);
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break;
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case 1:
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val = mfspr(SPR_PMC2);
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break;
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case 2:
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val = mfspr(SPR_PMC3);
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break;
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case 3:
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val = mfspr(SPR_PMC4);
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break;
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case 4:
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val = mfspr(SPR_PMC5);
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break;
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case 5:
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val = mfspr(SPR_PMC6);
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break;
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case 6:
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val = mfspr(SPR_PMC7);
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break;
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case 7:
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val = mfspr(SPR_PMC8);
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break;
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}
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return (val);
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}
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void
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powerpc_pmcn_write_default(unsigned int pmc, uint32_t val)
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{
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if (pmc > ppc_max_pmcs)
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panic("Invalid PMC number: %d\n", pmc);
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switch (pmc) {
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case 0:
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mtspr(SPR_PMC1, val);
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break;
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case 1:
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mtspr(SPR_PMC2, val);
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break;
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case 2:
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mtspr(SPR_PMC3, val);
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break;
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case 3:
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mtspr(SPR_PMC4, val);
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break;
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case 4:
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mtspr(SPR_PMC5, val);
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break;
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case 5:
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mtspr(SPR_PMC6, val);
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break;
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case 6:
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mtspr(SPR_PMC7, val);
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break;
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case 7:
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mtspr(SPR_PMC8, val);
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break;
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}
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}
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int
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powerpc_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v)
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{
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pmc_value_t p, r, tmp;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[powerpc,%d] illegal CPU value %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < ppc_max_pmcs,
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("[powerpc,%d] illegal row index %d", __LINE__, ri));
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/*
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* After an interrupt occurs because of a PMC overflow, the PMC value
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* is not always MAX_PMC_VALUE + 1, but may be a little above it.
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* This may mess up calculations and frustrate machine independent
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* layer expectations, such as that no value read should be greater
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* than reload count in sampling mode.
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* To avoid these issues, use MAX_PMC_VALUE as an upper limit.
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*/
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p = MIN(powerpc_pmcn_read(ri), POWERPC_MAX_PMC_VALUE);
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r = pm->pm_sc.pm_reloadcount;
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if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) {
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/*
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* Special case 1: r is too big
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* This usually happens when a PMC write fails, the PMC is
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* stopped and then it is read.
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*
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* Special case 2: PMC was reseted or has a value
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* that should not be possible with current r.
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*
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* In the above cases, just return 0 instead of an arbitrary
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* value.
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*/
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if (r > POWERPC_MAX_PMC_VALUE || p + r <= POWERPC_MAX_PMC_VALUE)
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tmp = 0;
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else
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tmp = POWERPC_PERFCTR_VALUE_TO_RELOAD_COUNT(p);
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} else
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tmp = p + (POWERPC_MAX_PMC_VALUE + 1) * PPC_OVERFLOWCNT(pm);
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PMCDBG5(MDP,REA,1,"ppc-read cpu=%d ri=%d -> %jx (%jx,%jx)",
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cpu, ri, (uintmax_t)tmp, (uintmax_t)PPC_OVERFLOWCNT(pm),
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(uintmax_t)p);
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*v = tmp;
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return (0);
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}
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int
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powerpc_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v)
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{
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pmc_value_t vlo;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[powerpc,%d] illegal CPU value %d", __LINE__, cpu));
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KASSERT(ri >= 0 && ri < ppc_max_pmcs,
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("[powerpc,%d] illegal row-index %d", __LINE__, ri));
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if (PMC_IS_COUNTING_MODE(PMC_TO_MODE(pm))) {
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PPC_OVERFLOWCNT(pm) = v / (POWERPC_MAX_PMC_VALUE + 1);
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vlo = v % (POWERPC_MAX_PMC_VALUE + 1);
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} else if (v > POWERPC_MAX_PMC_VALUE) {
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PMCDBG3(MDP,WRI,2,
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"powerpc-write cpu=%d ri=%d: PMC value is too big: %jx",
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cpu, ri, (uintmax_t)v);
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return (EINVAL);
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} else
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vlo = POWERPC_RELOAD_COUNT_TO_PERFCTR_VALUE(v);
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PMCDBG5(MDP,WRI,1,"powerpc-write cpu=%d ri=%d -> %jx (%jx,%jx)",
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cpu, ri, (uintmax_t)v, (uintmax_t)PPC_OVERFLOWCNT(pm),
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(uintmax_t)vlo);
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powerpc_pmcn_write(ri, vlo);
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return (0);
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}
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int
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powerpc_pmc_intr(struct trapframe *tf)
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{
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struct pmc *pm;
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struct powerpc_cpu *pc;
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int cpu, error, i, retval;
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cpu = curcpu;
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KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
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("[powerpc,%d] out of range CPU %d", __LINE__, cpu));
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PMCDBG3(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf,
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TRAPF_USERMODE(tf));
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retval = 0;
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pc = powerpc_pcpu[cpu];
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/*
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* Look for a running, sampling PMC which has overflowed
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* and which has a valid 'struct pmc' association.
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*/
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for (i = 0; i < ppc_max_pmcs; i++) {
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if (!POWERPC_PMC_HAS_OVERFLOWED(i))
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continue;
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retval = 1; /* Found an interrupting PMC. */
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/*
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* Always clear the PMC, to make it stop interrupting.
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* If pm is available and in sampling mode, use reload
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* count, to make PMC read after stop correct.
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* Otherwise, just reset the PMC.
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*/
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if ((pm = pc->pc_ppcpmcs[i].phw_pmc) != NULL &&
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PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) {
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if (pm->pm_state != PMC_STATE_RUNNING) {
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powerpc_write_pmc(cpu, i, pm,
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pm->pm_sc.pm_reloadcount);
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continue;
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}
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} else {
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if (pm != NULL) { /* !PMC_IS_SAMPLING_MODE */
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PPC_OVERFLOWCNT(pm) = (PPC_OVERFLOWCNT(pm) +
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1) % PPC_OVERFLOWCNT_MAX;
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PMCDBG3(MDP,INT,2,
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"cpu=%d ri=%d: overflowcnt=%d",
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cpu, i, PPC_OVERFLOWCNT(pm));
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}
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powerpc_pmcn_write(i, 0);
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continue;
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}
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|
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error = pmc_process_interrupt(PMC_HR, pm, tf);
|
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if (error != 0) {
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PMCDBG3(MDP,INT,3,
|
|
"cpu=%d ri=%d: error %d processing interrupt",
|
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cpu, i, error);
|
|
powerpc_stop_pmc(cpu, i, pm);
|
|
}
|
|
|
|
/* Reload sampling count */
|
|
powerpc_write_pmc(cpu, i, pm, pm->pm_sc.pm_reloadcount);
|
|
}
|
|
|
|
if (retval)
|
|
counter_u64_add(pmc_stats.pm_intr_processed, 1);
|
|
else
|
|
counter_u64_add(pmc_stats.pm_intr_ignored, 1);
|
|
|
|
/*
|
|
* Re-enable PERF exceptions if we were able to find the interrupt
|
|
* source and handle it. Otherwise, it's better to disable PERF
|
|
* interrupts, to avoid the risk of processing the same interrupt
|
|
* forever.
|
|
*/
|
|
powerpc_resume_pmc(retval != 0);
|
|
if (retval == 0)
|
|
log(LOG_WARNING,
|
|
"pmc_intr: couldn't find interrupting PMC on cpu %d - "
|
|
"disabling PERF interrupts\n", cpu);
|
|
|
|
return (retval);
|
|
}
|
|
|
|
struct pmc_mdep *
|
|
pmc_md_initialize(void)
|
|
{
|
|
struct pmc_mdep *pmc_mdep;
|
|
int error;
|
|
uint16_t vers;
|
|
|
|
/*
|
|
* Allocate space for pointers to PMC HW descriptors and for
|
|
* the MDEP structure used by MI code.
|
|
*/
|
|
powerpc_pcpu = malloc(sizeof(struct powerpc_cpu *) * pmc_cpu_max(), M_PMC,
|
|
M_WAITOK|M_ZERO);
|
|
|
|
/* Just one class */
|
|
pmc_mdep = pmc_mdep_alloc(1);
|
|
|
|
vers = mfpvr() >> 16;
|
|
|
|
switch (vers) {
|
|
case MPC7447A:
|
|
case MPC7448:
|
|
case MPC7450:
|
|
case MPC7455:
|
|
case MPC7457:
|
|
error = pmc_mpc7xxx_initialize(pmc_mdep);
|
|
break;
|
|
case IBM970:
|
|
case IBM970FX:
|
|
case IBM970MP:
|
|
error = pmc_ppc970_initialize(pmc_mdep);
|
|
break;
|
|
case IBMPOWER8E:
|
|
case IBMPOWER8NVL:
|
|
case IBMPOWER8:
|
|
case IBMPOWER9:
|
|
error = pmc_power8_initialize(pmc_mdep);
|
|
break;
|
|
case FSL_E500v1:
|
|
case FSL_E500v2:
|
|
case FSL_E500mc:
|
|
case FSL_E5500:
|
|
error = pmc_e500_initialize(pmc_mdep);
|
|
break;
|
|
default:
|
|
error = -1;
|
|
break;
|
|
}
|
|
|
|
if (error != 0) {
|
|
pmc_mdep_free(pmc_mdep);
|
|
pmc_mdep = NULL;
|
|
}
|
|
|
|
/* Set the value for kern.hwpmc.cpuid */
|
|
snprintf(pmc_cpuid, sizeof(pmc_cpuid), "%08x", mfpvr());
|
|
|
|
return (pmc_mdep);
|
|
}
|
|
|
|
void
|
|
pmc_md_finalize(struct pmc_mdep *md)
|
|
{
|
|
|
|
free(powerpc_pcpu, M_PMC);
|
|
powerpc_pcpu = NULL;
|
|
}
|
|
|
|
int
|
|
pmc_save_user_callchain(uintptr_t *cc, int maxsamples,
|
|
struct trapframe *tf)
|
|
{
|
|
uintptr_t *osp, *sp;
|
|
int frames = 0;
|
|
|
|
cc[frames++] = PMC_TRAPFRAME_TO_PC(tf);
|
|
sp = (uintptr_t *)PMC_TRAPFRAME_TO_FP(tf);
|
|
osp = NULL;
|
|
|
|
for (; frames < maxsamples; frames++) {
|
|
if (sp <= osp)
|
|
break;
|
|
osp = sp;
|
|
#ifdef __powerpc64__
|
|
/* Check if 32-bit mode. */
|
|
if (!(tf->srr1 & PSL_SF)) {
|
|
cc[frames] = fuword32((uint32_t *)sp + 1);
|
|
sp = (uintptr_t *)(uintptr_t)fuword32(sp);
|
|
} else {
|
|
cc[frames] = fuword(sp + 2);
|
|
sp = (uintptr_t *)fuword(sp);
|
|
}
|
|
#else
|
|
cc[frames] = fuword32((uint32_t *)sp + 1);
|
|
sp = (uintptr_t *)fuword32(sp);
|
|
#endif
|
|
}
|
|
|
|
return (frames);
|
|
}
|