487 lines
14 KiB
C
487 lines
14 KiB
C
/*-
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* Copyright (c) 2009 Yahoo! Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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/* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */
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/* TODO Move headers to mprvar */
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/malloc.h>
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#include <sys/sysctl.h>
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#include <sys/uio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pci_private.h>
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#include <dev/mpr/mpi/mpi2_type.h>
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#include <dev/mpr/mpi/mpi2.h>
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#include <dev/mpr/mpi/mpi2_ioc.h>
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#include <dev/mpr/mpi/mpi2_cnfg.h>
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#include <dev/mpr/mpi/mpi2_tool.h>
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#include <dev/mpr/mpi/mpi2_pci.h>
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#include <sys/queue.h>
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#include <sys/kthread.h>
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#include <dev/mpr/mpr_ioctl.h>
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#include <dev/mpr/mprvar.h>
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static int mpr_pci_probe(device_t);
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static int mpr_pci_attach(device_t);
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static int mpr_pci_detach(device_t);
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static int mpr_pci_suspend(device_t);
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static int mpr_pci_resume(device_t);
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static void mpr_pci_free(struct mpr_softc *);
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static int mpr_alloc_msix(struct mpr_softc *sc, int msgs);
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static int mpr_alloc_msi(struct mpr_softc *sc, int msgs);
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static int mpr_pci_alloc_interrupts(struct mpr_softc *sc);
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static device_method_t mpr_methods[] = {
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DEVMETHOD(device_probe, mpr_pci_probe),
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DEVMETHOD(device_attach, mpr_pci_attach),
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DEVMETHOD(device_detach, mpr_pci_detach),
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DEVMETHOD(device_suspend, mpr_pci_suspend),
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DEVMETHOD(device_resume, mpr_pci_resume),
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_driver_added, bus_generic_driver_added),
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{ 0, 0 }
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};
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static driver_t mpr_pci_driver = {
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"mpr",
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mpr_methods,
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sizeof(struct mpr_softc)
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};
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struct mpr_ident {
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uint16_t vendor;
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uint16_t device;
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uint16_t subvendor;
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uint16_t subdevice;
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u_int flags;
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const char *desc;
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} mpr_identifiers[] = {
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004,
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0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3004" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008,
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0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3008" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1,
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0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_1" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2,
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0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_2" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5,
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0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6,
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0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3216,
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0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3216" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3224,
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0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3224" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_1,
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0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_1" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3316_2,
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0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3316_2" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_1,
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0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_1" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3324_2,
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0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3324_2" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3408,
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0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
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"Avago Technologies (LSI) SAS3408" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3416,
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0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
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"Avago Technologies (LSI) SAS3416" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508,
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0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
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"Avago Technologies (LSI) SAS3508" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3508_1,
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0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
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"Avago Technologies (LSI) SAS3508_1" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516,
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0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
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"Avago Technologies (LSI) SAS3516" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3516_1,
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0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
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"Avago Technologies (LSI) SAS3516_1" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3616,
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0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
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"Avago Technologies (LSI) SAS3616" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3708,
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0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
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"Avago Technologies (LSI) SAS3708" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_SAS3716,
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0xffff, 0xffff, MPR_FLAGS_GEN35_IOC,
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"Avago Technologies (LSI) SAS3716" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID0_SAS3816,
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0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
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"Broadcom Inc. (LSI) INVALID0 SAS3816" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3816,
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0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
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"Broadcom Inc. (LSI) CFG SEC SAS3816" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_SAS3816,
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0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
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"Broadcom Inc. (LSI) HARD SEC SAS3816" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID1_SAS3816,
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0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
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"Broadcom Inc. (LSI) INVALID1 SAS3816" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID0_SAS3916,
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0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
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"Broadcom Inc. (LSI) INVALID0 SAS3916" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3916,
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0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
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"Broadcom Inc. (LSI) CFG SEC SAS3916" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_HARD_SEC_SAS3916,
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0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
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"Broadcom Inc. (LSI) HARD SEC SAS3916" },
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{ MPI2_MFGPAGE_VENDORID_LSI, MPI26_MFGPAGE_DEVID_INVALID1_SAS3916,
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0xffff, 0xffff, (MPR_FLAGS_GEN35_IOC | MPR_FLAGS_SEA_IOC),
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"Broadcom Inc. (LSI) INVALID1 SAS3916" },
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{ 0, 0, 0, 0, 0, NULL }
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};
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DRIVER_MODULE(mpr, pci, mpr_pci_driver, 0, 0);
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MODULE_PNP_INFO("U16:vendor;U16:device;U16:subvendor;U16:subdevice;D:#", pci,
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mpr, mpr_identifiers, nitems(mpr_identifiers) - 1);
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MODULE_DEPEND(mpr, cam, 1, 1, 1);
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static struct mpr_ident *
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mpr_find_ident(device_t dev)
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{
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struct mpr_ident *m;
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for (m = mpr_identifiers; m->vendor != 0; m++) {
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if (m->vendor != pci_get_vendor(dev))
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continue;
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if (m->device != pci_get_device(dev))
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continue;
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if ((m->subvendor != 0xffff) &&
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(m->subvendor != pci_get_subvendor(dev)))
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continue;
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if ((m->subdevice != 0xffff) &&
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(m->subdevice != pci_get_subdevice(dev)))
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continue;
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return (m);
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}
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return (NULL);
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}
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static int
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mpr_pci_probe(device_t dev)
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{
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struct mpr_ident *id;
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if ((id = mpr_find_ident(dev)) != NULL) {
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device_set_desc(dev, id->desc);
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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}
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static int
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mpr_pci_attach(device_t dev)
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{
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bus_dma_template_t t;
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struct mpr_softc *sc;
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struct mpr_ident *m;
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int error, i;
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sc = device_get_softc(dev);
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bzero(sc, sizeof(*sc));
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sc->mpr_dev = dev;
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m = mpr_find_ident(dev);
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sc->mpr_flags = m->flags;
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switch (m->device) {
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case MPI26_MFGPAGE_DEVID_INVALID0_SAS3816:
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case MPI26_MFGPAGE_DEVID_INVALID1_SAS3816:
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case MPI26_MFGPAGE_DEVID_INVALID0_SAS3916:
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case MPI26_MFGPAGE_DEVID_INVALID1_SAS3916:
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mpr_printf(sc, "HBA is in Non Secure mode\n");
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return (ENXIO);
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case MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3816:
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case MPI26_MFGPAGE_DEVID_CFG_SEC_SAS3916:
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mpr_printf(sc, "HBA is in Configurable Secure mode\n");
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break;
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default:
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break;
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}
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mpr_get_tunables(sc);
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/* Twiddle basic PCI config bits for a sanity check */
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pci_enable_busmaster(dev);
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for (i = 0; i < PCI_MAXMAPS_0; i++) {
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sc->mpr_regs_rid = PCIR_BAR(i);
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if ((sc->mpr_regs_resource = bus_alloc_resource_any(dev,
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SYS_RES_MEMORY, &sc->mpr_regs_rid, RF_ACTIVE)) != NULL)
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break;
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}
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if (sc->mpr_regs_resource == NULL) {
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mpr_printf(sc, "Cannot allocate PCI registers\n");
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return (ENXIO);
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}
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sc->mpr_btag = rman_get_bustag(sc->mpr_regs_resource);
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sc->mpr_bhandle = rman_get_bushandle(sc->mpr_regs_resource);
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/* Allocate the parent DMA tag */
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bus_dma_template_init(&t, bus_get_dma_tag(dev));
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if (bus_dma_template_tag(&t, &sc->mpr_parent_dmat)) {
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mpr_printf(sc, "Cannot allocate parent DMA tag\n");
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mpr_pci_free(sc);
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return (ENOMEM);
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}
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if (((error = mpr_pci_alloc_interrupts(sc)) != 0) ||
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((error = mpr_attach(sc)) != 0))
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mpr_pci_free(sc);
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return (error);
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}
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/*
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* Allocate, but don't assign interrupts early. Doing it before requesting
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* the IOCFacts message informs the firmware that we want to do MSI-X
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* multiqueue. We might not use all of the available messages, but there's
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* no reason to re-alloc if we don't.
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*/
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int
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mpr_pci_alloc_interrupts(struct mpr_softc *sc)
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{
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device_t dev;
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int error, msgs;
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dev = sc->mpr_dev;
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error = 0;
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msgs = 0;
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if (sc->disable_msix == 0) {
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msgs = pci_msix_count(dev);
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mpr_dprint(sc, MPR_INIT, "Counted %d MSI-X messages\n", msgs);
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msgs = min(msgs, sc->max_msix);
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msgs = min(msgs, MPR_MSIX_MAX);
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msgs = min(msgs, 1); /* XXX */
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if (msgs != 0) {
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mpr_dprint(sc, MPR_INIT, "Attempting to allocate %d "
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"MSI-X messages\n", msgs);
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error = mpr_alloc_msix(sc, msgs);
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}
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}
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if (((error != 0) || (msgs == 0)) && (sc->disable_msi == 0)) {
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msgs = pci_msi_count(dev);
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mpr_dprint(sc, MPR_INIT, "Counted %d MSI messages\n", msgs);
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msgs = min(msgs, MPR_MSI_MAX);
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if (msgs != 0) {
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mpr_dprint(sc, MPR_INIT, "Attempting to allocated %d "
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"MSI messages\n", MPR_MSI_MAX);
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error = mpr_alloc_msi(sc, MPR_MSI_MAX);
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}
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}
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if ((error != 0) || (msgs == 0)) {
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/*
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* If neither MSI or MSI-X are available, assume legacy INTx.
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* This also implies that there will be only 1 queue.
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*/
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mpr_dprint(sc, MPR_INIT, "Falling back to legacy INTx\n");
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sc->mpr_flags |= MPR_FLAGS_INTX;
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msgs = 1;
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} else
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sc->mpr_flags |= MPR_FLAGS_MSI;
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sc->msi_msgs = msgs;
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mpr_dprint(sc, MPR_INIT, "Allocated %d interrupts\n", msgs);
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return (error);
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}
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int
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mpr_pci_setup_interrupts(struct mpr_softc *sc)
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{
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device_t dev;
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struct mpr_queue *q;
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void *ihandler;
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int i, error, rid, initial_rid;
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dev = sc->mpr_dev;
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error = ENXIO;
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if (sc->mpr_flags & MPR_FLAGS_INTX) {
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initial_rid = 0;
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ihandler = mpr_intr;
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} else if (sc->mpr_flags & MPR_FLAGS_MSI) {
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initial_rid = 1;
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ihandler = mpr_intr_msi;
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} else {
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mpr_dprint(sc, MPR_ERROR|MPR_INIT,
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"Unable to set up interrupts\n");
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return (EINVAL);
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}
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for (i = 0; i < sc->msi_msgs; i++) {
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q = &sc->queues[i];
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rid = i + initial_rid;
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q->irq_rid = rid;
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q->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&q->irq_rid, RF_ACTIVE);
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if (q->irq == NULL) {
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mpr_dprint(sc, MPR_ERROR|MPR_INIT,
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"Cannot allocate interrupt RID %d\n", rid);
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sc->msi_msgs = i;
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break;
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}
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error = bus_setup_intr(dev, q->irq,
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INTR_TYPE_BIO | INTR_MPSAFE, NULL, ihandler,
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sc, &q->intrhand);
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if (error) {
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mpr_dprint(sc, MPR_ERROR|MPR_INIT,
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"Cannot setup interrupt RID %d\n", rid);
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sc->msi_msgs = i;
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break;
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}
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}
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mpr_dprint(sc, MPR_INIT, "Set up %d interrupts\n", sc->msi_msgs);
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return (error);
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}
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static int
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mpr_pci_detach(device_t dev)
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{
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struct mpr_softc *sc;
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int error;
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sc = device_get_softc(dev);
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if ((error = mpr_free(sc)) != 0)
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return (error);
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mpr_pci_free(sc);
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return (0);
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}
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void
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mpr_pci_free_interrupts(struct mpr_softc *sc)
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{
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struct mpr_queue *q;
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int i;
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if (sc->queues == NULL)
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return;
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for (i = 0; i < sc->msi_msgs; i++) {
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q = &sc->queues[i];
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if (q->irq != NULL) {
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bus_teardown_intr(sc->mpr_dev, q->irq,
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q->intrhand);
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bus_release_resource(sc->mpr_dev, SYS_RES_IRQ,
|
|
q->irq_rid, q->irq);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void
|
|
mpr_pci_free(struct mpr_softc *sc)
|
|
{
|
|
|
|
if (sc->mpr_parent_dmat != NULL) {
|
|
bus_dma_tag_destroy(sc->mpr_parent_dmat);
|
|
}
|
|
|
|
mpr_pci_free_interrupts(sc);
|
|
|
|
if (sc->mpr_flags & MPR_FLAGS_MSI)
|
|
pci_release_msi(sc->mpr_dev);
|
|
|
|
if (sc->mpr_regs_resource != NULL) {
|
|
bus_release_resource(sc->mpr_dev, SYS_RES_MEMORY,
|
|
sc->mpr_regs_rid, sc->mpr_regs_resource);
|
|
}
|
|
|
|
return;
|
|
}
|
|
|
|
static int
|
|
mpr_pci_suspend(device_t dev)
|
|
{
|
|
return (EINVAL);
|
|
}
|
|
|
|
static int
|
|
mpr_pci_resume(device_t dev)
|
|
{
|
|
return (EINVAL);
|
|
}
|
|
|
|
static int
|
|
mpr_alloc_msix(struct mpr_softc *sc, int msgs)
|
|
{
|
|
int error;
|
|
|
|
error = pci_alloc_msix(sc->mpr_dev, &msgs);
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
mpr_alloc_msi(struct mpr_softc *sc, int msgs)
|
|
{
|
|
int error;
|
|
|
|
error = pci_alloc_msi(sc->mpr_dev, &msgs);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
mpr_pci_restore(struct mpr_softc *sc)
|
|
{
|
|
struct pci_devinfo *dinfo;
|
|
|
|
mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
|
|
|
|
dinfo = device_get_ivars(sc->mpr_dev);
|
|
if (dinfo == NULL) {
|
|
mpr_dprint(sc, MPR_FAULT, "%s: NULL dinfo\n", __func__);
|
|
return (EINVAL);
|
|
}
|
|
|
|
pci_cfg_restore(sc->mpr_dev, dinfo);
|
|
return (0);
|
|
}
|