332 lines
7.7 KiB
C
332 lines
7.7 KiB
C
/*******************************************************************************
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SPDX-License-Identifier: BSD-2-Clause
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Copyright (c) 2006-2013, Myricom Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Neither the name of the Myricom Inc, nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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***************************************************************************/
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#define MXGE_ETH_STOPPED 0
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#define MXGE_ETH_STOPPING 1
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#define MXGE_ETH_STARTING 2
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#define MXGE_ETH_RUNNING 3
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#define MXGE_ETH_OPEN_FAILED 4
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#define MXGE_FW_OFFSET 1024*1024
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#define MXGE_EEPROM_STRINGS_SIZE 256
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#define MXGE_MAX_SEND_DESC 128
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#ifndef VLAN_CAPABILITIES
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#define VLAN_CAPABILITIES(ifp)
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#define mxge_vlans_active(sc) (sc)->ifp->if_nvlans
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#else
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#define mxge_vlans_active(sc) if_getvlantrunk((sc)->ifp)
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#endif
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#ifndef VLAN_TAG_VALUE
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#define MXGE_NEW_VLAN_API
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#endif
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#ifndef IFCAP_LRO
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#define IFCAP_LRO 0
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#endif
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#ifndef IFCAP_TSO
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#define IFCAP_TSO 0
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#endif
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#ifndef IFCAP_TSO4
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#define IFCAP_TSO4 0
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#endif
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#ifndef IFCAP_TSO6
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#define IFCAP_TSO6 0
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#endif
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#ifndef IFCAP_TXCSUM_IPV6
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#define IFCAP_TXCSUM_IPV6 0
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#endif
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#ifndef IFCAP_RXCSUM_IPV6
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#define IFCAP_RXCSUM_IPV6 0
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#endif
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#ifndef CSUM_TSO
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#define CSUM_TSO 0
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#endif
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#ifndef CSUM_TCP_IPV6
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#define CSUM_TCP_IPV6 0
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#endif
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#ifndef CSUM_UDP_IPV6
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#define CSUM_UDP_IPV6 0
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#endif
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#ifndef CSUM_DELAY_DATA_IPV6
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#define CSUM_DELAY_DATA_IPV6 0
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#endif
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typedef struct {
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void *addr;
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bus_addr_t bus_addr;
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bus_dma_tag_t dmat;
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bus_dmamap_t map;
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} mxge_dma_t;
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typedef struct {
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mcp_slot_t *entry;
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mxge_dma_t dma;
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int cnt;
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int idx;
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int mask;
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} mxge_rx_done_t;
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typedef struct
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{
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uint32_t data0;
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uint32_t data1;
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uint32_t data2;
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} mxge_cmd_t;
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struct mxge_rx_buffer_state {
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struct mbuf *m;
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bus_dmamap_t map;
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};
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struct mxge_tx_buffer_state {
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struct mbuf *m;
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bus_dmamap_t map;
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int flag;
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};
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typedef struct
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{
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volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */
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mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */
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struct mxge_rx_buffer_state *info;
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bus_dma_tag_t dmat;
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bus_dmamap_t extra_map;
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int cnt;
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int nbufs;
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int cl_size;
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int alloc_fail;
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int mask; /* number of rx slots -1 */
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int mlen;
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} mxge_rx_ring_t;
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typedef struct
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{
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struct mtx mtx;
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struct buf_ring *br;
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volatile mcp_kreq_ether_send_t *lanai; /* lanai ptr for sendq */
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volatile uint32_t *send_go; /* doorbell for sendq */
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volatile uint32_t *send_stop; /* doorbell for sendq */
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mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */
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char *req_bytes;
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bus_dma_segment_t *seg_list;
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struct mxge_tx_buffer_state *info;
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bus_dma_tag_t dmat;
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int req; /* transmits submitted */
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int mask; /* number of transmit slots -1 */
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int done; /* transmits completed */
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int pkt_done; /* packets completed */
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int max_desc; /* max descriptors per xmit */
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int queue_active; /* fw currently polling this queue*/
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int activate;
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int deactivate;
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int stall; /* #times hw queue exhausted */
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int wake; /* #times irq re-enabled xmit */
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int watchdog_req; /* cache of req */
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int watchdog_done; /* cache of done */
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int watchdog_rx_pause; /* cache of pause rq recvd */
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int defrag;
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char mtx_name[16];
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} mxge_tx_ring_t;
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struct mxge_softc;
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typedef struct mxge_softc mxge_softc_t;
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struct mxge_slice_state {
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mxge_softc_t *sc;
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mxge_tx_ring_t tx; /* transmit ring */
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mxge_rx_ring_t rx_small;
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mxge_rx_ring_t rx_big;
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mxge_rx_done_t rx_done;
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mcp_irq_data_t *fw_stats;
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volatile uint32_t *irq_claim;
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u_long ipackets;
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u_long opackets;
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u_long obytes;
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u_long omcasts;
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u_long oerrors;
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int if_drv_flags;
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struct lro_ctrl lc;
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mxge_dma_t fw_stats_dma;
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struct sysctl_oid *sysctl_tree;
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struct sysctl_ctx_list sysctl_ctx;
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char scratch[256];
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};
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struct mxge_softc {
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if_t ifp;
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struct mxge_slice_state *ss;
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int tx_boundary; /* boundary transmits cannot cross*/
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int lro_cnt;
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bus_dma_tag_t parent_dmat;
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volatile uint8_t *sram;
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int sram_size;
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volatile uint32_t *irq_deassert;
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mcp_cmd_response_t *cmd;
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mxge_dma_t cmd_dma;
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mxge_dma_t zeropad_dma;
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struct pci_dev *pdev;
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int legacy_irq;
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int link_state;
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unsigned int rdma_tags_available;
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int intr_coal_delay;
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volatile uint32_t *intr_coal_delay_ptr;
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int wc;
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struct mtx cmd_mtx;
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struct mtx driver_mtx;
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int wake_queue;
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int stop_queue;
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int down_cnt;
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int watchdog_resets;
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int watchdog_countdown;
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int pause;
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struct resource *mem_res;
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struct resource *irq_res;
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struct resource **msix_irq_res;
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struct resource *msix_table_res;
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struct resource *msix_pba_res;
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void *ih;
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void **msix_ih;
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char *fw_name;
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char eeprom_strings[MXGE_EEPROM_STRINGS_SIZE];
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char fw_version[128];
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int fw_ver_major;
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int fw_ver_minor;
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int fw_ver_tiny;
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int adopted_rx_filter_bug;
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device_t dev;
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struct ifmedia media;
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int read_dma;
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int write_dma;
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int read_write_dma;
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int fw_multicast_support;
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int link_width;
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int max_mtu;
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int throttle;
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int tx_defrag;
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int media_flags;
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int need_media_probe;
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int num_slices;
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int rx_ring_size;
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int dying;
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int connector;
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int current_media;
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int max_tso6_hlen;
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mxge_dma_t dmabench_dma;
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struct callout co_hdl;
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struct taskqueue *tq;
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struct task watchdog_task;
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struct sysctl_oid *slice_sysctl_tree;
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struct sysctl_ctx_list slice_sysctl_ctx;
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char *mac_addr_string;
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uint8_t mac_addr[6]; /* eeprom mac address */
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uint16_t pectl; /* save PCIe CTL state */
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char product_code_string[64];
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char serial_number_string[64];
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char cmd_mtx_name[16];
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char driver_mtx_name[16];
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};
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#define MXGE_PCI_VENDOR_MYRICOM 0x14c1
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#define MXGE_PCI_DEVICE_Z8E 0x0008
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#define MXGE_PCI_DEVICE_Z8E_9 0x0009
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#define MXGE_PCI_REV_Z8E 0
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#define MXGE_PCI_REV_Z8ES 1
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#define MXGE_XFP_COMPLIANCE_BYTE 131
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#define MXGE_SFP_COMPLIANCE_BYTE 3
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#define MXGE_MIN_THROTTLE 416
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#define MXGE_MAX_THROTTLE 4096
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/* Types of connectors on NICs supported by this driver */
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#define MXGE_CX4 0
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#define MXGE_XFP 1
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#define MXGE_SFP 2
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#define MXGE_QRF 3
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#define MXGE_HIGHPART_TO_U32(X) \
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(sizeof (X) == 8) ? ((uint32_t)((uint64_t)(X) >> 32)) : (0)
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#define MXGE_LOWPART_TO_U32(X) ((uint32_t)(X))
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struct mxge_media_type
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{
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int flag;
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uint8_t bitmask;
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char *name;
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};
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struct mxge_pkt_info {
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int ip_off;
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int ip_hlen;
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struct ip *ip;
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struct ip6_hdr *ip6;
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struct tcphdr *tcp;
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};
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static inline void
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mxge_pio_copy(volatile void *to_v, void *from_v, size_t size)
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{
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register volatile uintptr_t *to;
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volatile uintptr_t *from;
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size_t i;
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to = (volatile uintptr_t *) to_v;
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from = from_v;
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for (i = (size / sizeof (uintptr_t)); i; i--) {
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*to = *from;
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to++;
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from++;
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}
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}
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void mxge_lro_flush(struct mxge_slice_state *ss, struct lro_entry *lro);
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int mxge_lro_rx(struct mxge_slice_state *ss, struct mbuf *m_head,
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uint32_t csum);
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/*
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This file uses Myri10GE driver indentation.
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Local Variables:
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c-file-style:"linux"
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tab-width:8
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End:
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*/
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