532 lines
14 KiB
C
532 lines
14 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* This is the shared pinmux code that the qualcomm SoCs use for their
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* specific way of configuring up pins.
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*
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* For now this does use the IPQ4018 TLMM related softc, but that
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* may change as I extend the driver to support multiple kinds of
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* qualcomm chipsets in the future.
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/gpio/gpiobusvar.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/fdt/fdt_pinctrl.h>
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#include "qcom_tlmm_var.h"
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#include "qcom_tlmm_debug.h"
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/*
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* For now we're hard-coded to doing IPQ4018 stuff here, but
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* it's not going to be very hard to flip it to being generic.
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*/
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#include "qcom_tlmm_ipq4018_hw.h"
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#include "gpio_if.h"
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/* Parameters */
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static const struct qcom_tlmm_prop_name prop_names[] = {
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{ "bias-disable", PIN_ID_BIAS_DISABLE, 0 },
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{ "bias-high-impedance", PIN_ID_BIAS_HIGH_IMPEDANCE, 0 },
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{ "bias-bus-hold", PIN_ID_BIAS_BUS_HOLD, 0 },
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{ "bias-pull-up", PIN_ID_BIAS_PULL_UP, 0 },
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{ "bias-pull-down", PIN_ID_BIAS_PULL_DOWN, 0 },
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{ "bias-pull-pin-default", PIN_ID_BIAS_PULL_PIN_DEFAULT, 0 },
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{ "drive-push-pull", PIN_ID_DRIVE_PUSH_PULL, 0 },
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{ "drive-open-drain", PIN_ID_DRIVE_OPEN_DRAIN, 0 },
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{ "drive-open-source", PIN_ID_DRIVE_OPEN_SOURCE, 0 },
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{ "drive-strength", PIN_ID_DRIVE_STRENGTH, 1 },
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{ "input-enable", PIN_ID_INPUT_ENABLE, 0 },
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{ "input-disable", PIN_ID_INPUT_DISABLE, 0 },
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{ "input-schmitt-enable", PIN_ID_INPUT_SCHMITT_ENABLE, 0 },
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{ "input-schmitt-disable", PIN_ID_INPUT_SCHMITT_DISABLE, 0 },
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{ "input-debounce", PIN_ID_INPUT_DEBOUNCE, 0 },
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{ "power-source", PIN_ID_POWER_SOURCE, 0 },
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{ "slew-rate", PIN_ID_SLEW_RATE, 0},
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{ "low-power-enable", PIN_ID_LOW_POWER_MODE_ENABLE, 0 },
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{ "low-power-disable", PIN_ID_LOW_POWER_MODE_DISABLE, 0 },
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{ "output-low", PIN_ID_OUTPUT_LOW, 0, },
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{ "output-high", PIN_ID_OUTPUT_HIGH, 0, },
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{ "vm-enable", PIN_ID_VM_ENABLE, 0, },
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{ "vm-disable", PIN_ID_VM_DISABLE, 0, },
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};
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static const struct qcom_tlmm_spec_pin *
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qcom_tlmm_pinctrl_search_spin(struct qcom_tlmm_softc *sc, char *pin_name)
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{
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int i;
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if (sc->spec_pins == NULL)
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return (NULL);
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for (i = 0; sc->spec_pins[i].name != NULL; i++) {
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if (strcmp(pin_name, sc->spec_pins[i].name) == 0)
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return (&sc->spec_pins[i]);
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}
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return (NULL);
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}
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static int
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qcom_tlmm_pinctrl_config_spin(struct qcom_tlmm_softc *sc,
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char *pin_name, const struct qcom_tlmm_spec_pin *spin,
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struct qcom_tlmm_pinctrl_cfg *cfg)
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{
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/* XXX TODO */
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device_printf(sc->dev, "%s: TODO: called; pin_name=%s\n",
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__func__, pin_name);
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return (0);
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}
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static const struct qcom_tlmm_gpio_mux *
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qcom_tlmm_pinctrl_search_gmux(struct qcom_tlmm_softc *sc, char *pin_name)
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{
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int i;
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if (sc->gpio_muxes == NULL)
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return (NULL);
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for (i = 0; sc->gpio_muxes[i].id >= 0; i++) {
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if (strcmp(pin_name, sc->gpio_muxes[i].name) == 0)
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return (&sc->gpio_muxes[i]);
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}
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return (NULL);
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}
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static int
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qcom_tlmm_pinctrl_gmux_function(const struct qcom_tlmm_gpio_mux *gmux,
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char *fnc_name)
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{
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int i;
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for (i = 0; i < 16; i++) { /* XXX size */
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if ((gmux->functions[i] != NULL) &&
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(strcmp(fnc_name, gmux->functions[i]) == 0))
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return (i);
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}
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return (-1);
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}
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static int
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qcom_tlmm_pinctrl_read_node(struct qcom_tlmm_softc *sc,
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phandle_t node, struct qcom_tlmm_pinctrl_cfg *cfg, char **pins,
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int *lpins)
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{
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int rv, i;
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*lpins = OF_getprop_alloc(node, "pins", (void **)pins);
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if (*lpins <= 0)
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return (ENOENT);
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/* Read function (mux) settings. */
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rv = OF_getprop_alloc(node, "function", (void **)&cfg->function);
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if (rv <= 0)
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cfg->function = NULL;
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/*
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* Read the rest of the properties.
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*
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* Properties that are a flag are simply present with a value of 0.
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* Properties that have arguments have have_value set to 1, and
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* we will parse an argument out for it to use.
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*
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* Properties that were not found/parsed with have a value of -1
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* and thus we won't program them into the hardware.
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*/
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for (i = 0; i < PROP_ID_MAX_ID; i++) {
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rv = OF_getencprop(node, prop_names[i].name, &cfg->params[i],
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sizeof(cfg->params[i]));
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if (prop_names[i].have_value) {
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if (rv == 0) {
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device_printf(sc->dev,
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"WARNING: Missing value for propety"
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" \"%s\"\n",
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prop_names[i].name);
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cfg->params[i] = 0;
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}
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} else {
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/* No value, default to 0 */
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cfg->params[i] = 0;
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}
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if (rv < 0)
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cfg->params[i] = -1;
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}
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return (0);
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}
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static int
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qcom_tlmm_pinctrl_config_gmux(struct qcom_tlmm_softc *sc, char *pin_name,
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const struct qcom_tlmm_gpio_mux *gmux, struct qcom_tlmm_pinctrl_cfg *cfg)
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{
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int err = 0, i;
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QCOM_TLMM_DPRINTF(sc, QCOM_TLMM_DEBUG_PINMUX,
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"%s: called; pin=%s, function %s\n",
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__func__, pin_name, cfg->function);
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GPIO_LOCK(sc);
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/*
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* Lookup the function in the configuration table. Configure it
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* if required.
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*/
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if (cfg->function != NULL) {
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uint32_t tmp;
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tmp = qcom_tlmm_pinctrl_gmux_function(gmux, cfg->function);
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if (tmp == -1) {
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device_printf(sc->dev,
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"%s: pin=%s, function=%s, unknown!\n",
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__func__,
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pin_name,
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cfg->function);
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err = EINVAL;
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goto done;
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}
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/*
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* Program in the given function to the given pin.
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*/
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QCOM_TLMM_DPRINTF(sc, QCOM_TLMM_DEBUG_PINMUX,
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"%s: pin id=%u, new function=%u\n",
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__func__,
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gmux->id,
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tmp);
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err = qcom_tlmm_ipq4018_hw_pin_set_function(sc, gmux->id,
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tmp);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set function (%d)\n",
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__func__, gmux->id, err);
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goto done;
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}
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}
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/*
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* Iterate the set of properties; call the relevant method
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* if we need to change it.
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*/
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for (i = 0; i < PROP_ID_MAX_ID; i++) {
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if (cfg->params[i] == -1)
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continue;
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QCOM_TLMM_DPRINTF(sc, QCOM_TLMM_DEBUG_PINMUX,
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"%s: pin_id=%u, param=%d, val=%d\n",
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__func__,
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gmux->id,
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i,
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cfg->params[i]);
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switch (i) {
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case PIN_ID_BIAS_DISABLE:
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err = qcom_tlmm_ipq4018_hw_pin_set_pupd_config(sc,
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gmux->id, QCOM_TLMM_PIN_PUPD_CONFIG_DISABLE);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set pupd(DISABLE):"
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" %d\n",
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__func__, gmux->id, err);
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goto done;
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}
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break;
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case PIN_ID_BIAS_PULL_DOWN:
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err = qcom_tlmm_ipq4018_hw_pin_set_pupd_config(sc,
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gmux->id, QCOM_TLMM_PIN_PUPD_CONFIG_PULL_DOWN);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set pupd(PD):"
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" %d\n",
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__func__, gmux->id, err);
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goto done;
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}
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break;
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case PIN_ID_BIAS_BUS_HOLD:
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err = qcom_tlmm_ipq4018_hw_pin_set_pupd_config(sc,
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gmux->id, QCOM_TLMM_PIN_PUPD_CONFIG_BUS_HOLD);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set pupd(HOLD):"
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" %d\n",
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__func__, gmux->id, err);
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goto done;
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}
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break;
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case PIN_ID_BIAS_PULL_UP:
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err = qcom_tlmm_ipq4018_hw_pin_set_pupd_config(sc,
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gmux->id, QCOM_TLMM_PIN_PUPD_CONFIG_PULL_UP);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set pupd(PU):"
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" %d\n",
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__func__, gmux->id, err);
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goto done;
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}
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break;
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case PIN_ID_OUTPUT_LOW:
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err = qcom_tlmm_ipq4018_hw_pin_set_oe_output(sc,
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gmux->id);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set OE:"
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" %d\n",
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__func__, gmux->id, err);
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goto done;
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}
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err = qcom_tlmm_ipq4018_hw_pin_set_output_value(
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sc, gmux->id, 0);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set output value:"
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" %d\n",
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__func__, gmux->id, err);
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goto done;
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}
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break;
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case PIN_ID_OUTPUT_HIGH:
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err = qcom_tlmm_ipq4018_hw_pin_set_oe_output(sc,
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gmux->id);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set OE:"
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" %d\n",
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__func__, gmux->id, err);
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goto done;
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}
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err = qcom_tlmm_ipq4018_hw_pin_set_output_value(
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sc, gmux->id, 1);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set output value:"
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" %d\n",
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__func__, gmux->id, err);
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goto done;
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}
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break;
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case PIN_ID_DRIVE_STRENGTH:
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err = qcom_tlmm_ipq4018_hw_pin_set_drive_strength(sc,
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gmux->id, cfg->params[i]);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set drive"
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" strength %d (%d)\n",
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__func__, gmux->id,
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cfg->params[i], err);
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goto done;
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}
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break;
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case PIN_ID_VM_ENABLE:
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err = qcom_tlmm_ipq4018_hw_pin_set_vm(sc,
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gmux->id, true);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set VM enable:"
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" %d\n",
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__func__, gmux->id, err);
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goto done;
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}
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break;
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case PIN_ID_VM_DISABLE:
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err = qcom_tlmm_ipq4018_hw_pin_set_vm(sc,
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gmux->id, false);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set VM disable:"
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" %d\n",
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__func__, gmux->id, err);
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goto done;
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}
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break;
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case PIN_ID_DRIVE_OPEN_DRAIN:
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err = qcom_tlmm_ipq4018_hw_pin_set_open_drain(sc,
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gmux->id, true);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set open drain"
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" (%d)\n",
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__func__, gmux->id, err);
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goto done;
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}
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break;
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case PIN_ID_INPUT_ENABLE:
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/* Configure pin as an input */
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err = qcom_tlmm_ipq4018_hw_pin_set_oe_input(sc,
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gmux->id);
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if (err != 0) {
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device_printf(sc->dev,
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"%s: pin=%d: failed to set pin as input"
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" (%d)\n",
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__func__, gmux->id, err);
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goto done;
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}
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break;
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case PIN_ID_INPUT_DISABLE:
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/*
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* the linux-msm GPIO driver treats this as an error;
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* a pin should be configured as an output instead.
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*/
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err = ENXIO;
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goto done;
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break;
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case PIN_ID_BIAS_HIGH_IMPEDANCE:
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case PIN_ID_INPUT_SCHMITT_ENABLE:
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case PIN_ID_INPUT_SCHMITT_DISABLE:
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case PIN_ID_INPUT_DEBOUNCE:
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case PIN_ID_SLEW_RATE:
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case PIN_ID_LOW_POWER_MODE_ENABLE:
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case PIN_ID_LOW_POWER_MODE_DISABLE:
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case PIN_ID_BIAS_PULL_PIN_DEFAULT:
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case PIN_ID_DRIVE_PUSH_PULL:
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case PIN_ID_DRIVE_OPEN_SOURCE:
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case PIN_ID_POWER_SOURCE:
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default:
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device_printf(sc->dev,
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"%s: ERROR: unknown/unsupported param: "
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" pin_id=%u, param=%d, val=%d\n",
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__func__,
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gmux->id,
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i,
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cfg->params[i]);
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err = ENXIO;
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goto done;
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}
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}
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done:
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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qcom_tlmm_pinctrl_config_node(struct qcom_tlmm_softc *sc,
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char *pin_name, struct qcom_tlmm_pinctrl_cfg *cfg)
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{
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const struct qcom_tlmm_gpio_mux *gmux;
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const struct qcom_tlmm_spec_pin *spin;
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int rv;
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/* Handle GPIO pins */
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gmux = qcom_tlmm_pinctrl_search_gmux(sc, pin_name);
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if (gmux != NULL) {
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rv = qcom_tlmm_pinctrl_config_gmux(sc, pin_name, gmux, cfg);
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return (rv);
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}
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/* Handle special pin groups */
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spin = qcom_tlmm_pinctrl_search_spin(sc, pin_name);
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if (spin != NULL) {
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rv = qcom_tlmm_pinctrl_config_spin(sc, pin_name, spin, cfg);
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return (rv);
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}
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device_printf(sc->dev, "Unknown pin: %s\n", pin_name);
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return (ENXIO);
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}
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static int
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qcom_tlmm_pinctrl_process_node(struct qcom_tlmm_softc *sc,
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phandle_t node)
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{
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struct qcom_tlmm_pinctrl_cfg cfg;
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char *pins, *pname;
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int i, len, lpins, rv;
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/*
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* Read the configuration and list of pins for the given node to
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* configure.
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*/
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rv = qcom_tlmm_pinctrl_read_node(sc, node, &cfg, &pins, &lpins);
|
|
if (rv != 0)
|
|
return (rv);
|
|
|
|
len = 0;
|
|
pname = pins;
|
|
do {
|
|
i = strlen(pname) + 1;
|
|
/*
|
|
* Configure the given node with the specific configuration.
|
|
*/
|
|
rv = qcom_tlmm_pinctrl_config_node(sc, pname, &cfg);
|
|
if (rv != 0)
|
|
device_printf(sc->dev,
|
|
"Cannot configure pin: %s: %d\n", pname, rv);
|
|
|
|
len += i;
|
|
pname += i;
|
|
} while (len < lpins);
|
|
|
|
if (pins != NULL)
|
|
free(pins, M_OFWPROP);
|
|
if (cfg.function != NULL)
|
|
free(cfg.function, M_OFWPROP);
|
|
|
|
return (rv);
|
|
}
|
|
|
|
int
|
|
qcom_tlmm_pinctrl_configure(device_t dev, phandle_t cfgxref)
|
|
{
|
|
struct qcom_tlmm_softc *sc;
|
|
phandle_t node, cfgnode;
|
|
int rv;
|
|
|
|
sc = device_get_softc(dev);
|
|
cfgnode = OF_node_from_xref(cfgxref);
|
|
|
|
for (node = OF_child(cfgnode); node != 0; node = OF_peer(node)) {
|
|
if (!ofw_bus_node_status_okay(node))
|
|
continue;
|
|
rv = qcom_tlmm_pinctrl_process_node(sc, node);
|
|
if (rv != 0)
|
|
device_printf(dev, "Pin config failed: %d\n", rv);
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|