195 lines
5.6 KiB
C
195 lines
5.6 KiB
C
/*-
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* Copyright (c) 2010-2016 Solarflare Communications, Inc.
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* All rights reserved.
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*
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* This software was developed in part by OKTET Labs Ltd. under contract for
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* Solarflare Communications, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include <sys/types.h>
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#include <sys/malloc.h>
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#include "common/efx.h"
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#include "sfxge.h"
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/* These data make no real sense, they are here just to make sfupdate happy.
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* Any code that would rely on it is broken.
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*/
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static const uint8_t fake_dynamic_cfg_nvram[] = {
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0x7a, 0xda, 0x10, 0xef, 0x0c, 0x00, 0x00, 0x00,
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0x00, 0x05, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
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0x48, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x10,
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0x08, 0x00, 0x00, 0x00, 0x90, 0x04, 0x00, 0x52,
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0x56, 0x01, 0xc3, 0x78, 0x01, 0x00, 0x03, 0x10,
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0x08, 0x00, 0x00, 0x00, 0x90, 0x04, 0x00, 0x52,
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0x56, 0x01, 0xc3, 0x78, 0x57, 0x1a, 0x10, 0xef,
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0x08, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
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0x02, 0x0b, 0x64, 0x7d, 0xee, 0xee, 0xee, 0xee
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};
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static int
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sfxge_nvram_rw(struct sfxge_softc *sc, sfxge_ioc_t *ip, efx_nvram_type_t type,
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boolean_t write)
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{
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efx_nic_t *enp = sc->enp;
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size_t total_size = ip->u.nvram.size;
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size_t chunk_size;
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off_t off;
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int rc = 0;
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uint8_t *buf;
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if (type == EFX_NVRAM_DYNAMIC_CFG && sc->family == EFX_FAMILY_SIENA) {
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if (write)
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return (0);
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rc = copyout(fake_dynamic_cfg_nvram, ip->u.nvram.data,
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MIN(total_size, sizeof(fake_dynamic_cfg_nvram)));
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return (rc);
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}
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if ((rc = efx_nvram_rw_start(enp, type, &chunk_size)) != 0)
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goto fail1;
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buf = malloc(chunk_size, M_TEMP, M_WAITOK);
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off = 0;
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while (total_size) {
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size_t len = MIN(chunk_size, total_size);
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if (write) {
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rc = copyin(ip->u.nvram.data + off, buf, len);
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if (rc != 0)
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goto fail3;
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rc = efx_nvram_write_chunk(enp, type,
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ip->u.nvram.offset + off, buf, len);
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if (rc != 0)
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goto fail3;
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} else {
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rc = efx_nvram_read_chunk(enp, type,
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ip->u.nvram.offset + off, buf, len);
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if (rc != 0)
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goto fail3;
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rc = copyout(buf, ip->u.nvram.data + off, len);
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if (rc != 0)
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goto fail3;
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}
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total_size -= len;
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off += len;
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}
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fail3:
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free(buf, M_TEMP);
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efx_nvram_rw_finish(enp, type, NULL);
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fail1:
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return (rc);
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}
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static int
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sfxge_nvram_erase(struct sfxge_softc *sc, efx_nvram_type_t type)
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{
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efx_nic_t *enp = sc->enp;
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size_t chunk_size;
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int rc = 0;
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if (type == EFX_NVRAM_DYNAMIC_CFG && sc->family == EFX_FAMILY_SIENA)
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return (0);
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if ((rc = efx_nvram_rw_start(enp, type, &chunk_size)) != 0)
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return (rc);
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rc = efx_nvram_erase(enp, type);
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efx_nvram_rw_finish(enp, type, NULL);
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return (rc);
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}
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int
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sfxge_nvram_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip)
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{
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static const efx_nvram_type_t nvram_types[] = {
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[SFXGE_NVRAM_TYPE_BOOTROM] = EFX_NVRAM_BOOTROM,
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[SFXGE_NVRAM_TYPE_BOOTROM_CFG] = EFX_NVRAM_BOOTROM_CFG,
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[SFXGE_NVRAM_TYPE_MC] = EFX_NVRAM_MC_FIRMWARE,
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[SFXGE_NVRAM_TYPE_MC_GOLDEN] = EFX_NVRAM_MC_GOLDEN,
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[SFXGE_NVRAM_TYPE_PHY] = EFX_NVRAM_PHY,
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[SFXGE_NVRAM_TYPE_NULL_PHY] = EFX_NVRAM_NULLPHY,
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[SFXGE_NVRAM_TYPE_FPGA] = EFX_NVRAM_FPGA,
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[SFXGE_NVRAM_TYPE_FCFW] = EFX_NVRAM_FCFW,
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[SFXGE_NVRAM_TYPE_CPLD] = EFX_NVRAM_CPLD,
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[SFXGE_NVRAM_TYPE_FPGA_BACKUP] = EFX_NVRAM_FPGA_BACKUP,
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[SFXGE_NVRAM_TYPE_DYNAMIC_CFG] = EFX_NVRAM_DYNAMIC_CFG,
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};
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efx_nic_t *enp = sc->enp;
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efx_nvram_type_t type;
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int rc = 0;
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if (ip->u.nvram.type > SFXGE_NVRAM_TYPE_DYNAMIC_CFG)
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return (EINVAL);
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type = nvram_types[ip->u.nvram.type];
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if (type == EFX_NVRAM_MC_GOLDEN &&
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(ip->u.nvram.op == SFXGE_NVRAM_OP_WRITE ||
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ip->u.nvram.op == SFXGE_NVRAM_OP_ERASE ||
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ip->u.nvram.op == SFXGE_NVRAM_OP_SET_VER))
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return (EOPNOTSUPP);
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switch (ip->u.nvram.op) {
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case SFXGE_NVRAM_OP_SIZE:
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{
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size_t size;
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if (type == EFX_NVRAM_DYNAMIC_CFG && sc->family == EFX_FAMILY_SIENA) {
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ip->u.nvram.size = sizeof(fake_dynamic_cfg_nvram);
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} else {
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if ((rc = efx_nvram_size(enp, type, &size)) != 0)
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return (rc);
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ip->u.nvram.size = size;
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}
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break;
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}
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case SFXGE_NVRAM_OP_READ:
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rc = sfxge_nvram_rw(sc, ip, type, B_FALSE);
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break;
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case SFXGE_NVRAM_OP_WRITE:
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rc = sfxge_nvram_rw(sc, ip, type, B_TRUE);
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break;
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case SFXGE_NVRAM_OP_ERASE:
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rc = sfxge_nvram_erase(sc, type);
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break;
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case SFXGE_NVRAM_OP_GET_VER:
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rc = efx_nvram_get_version(enp, type, &ip->u.nvram.subtype,
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&ip->u.nvram.version[0]);
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break;
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case SFXGE_NVRAM_OP_SET_VER:
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rc = efx_nvram_set_version(enp, type, &ip->u.nvram.version[0]);
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break;
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default:
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rc = EOPNOTSUPP;
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break;
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}
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return (rc);
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}
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