217 lines
5.3 KiB
C
217 lines
5.3 KiB
C
/*-
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* Copyright (c) 2009 Oleksandr Tymoshenko
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <machine/cpuregs.h>
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#include <mips/sentry5/s5reg.h>
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/cons.h>
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#include <sys/kdb.h>
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#include <vm/vm.h>
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#include <vm/vm_page.h>
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#include <net/ethernet.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/hwfunc.h>
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#include <machine/md_var.h>
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#include <machine/trap.h>
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#include <machine/vmparam.h>
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#include <mips/atheros/ar71xxreg.h>
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extern int *edata;
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extern int *end;
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uint32_t ar711_base_mac[ETHER_ADDR_LEN];
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void
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platform_halt(void)
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{
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}
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void
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platform_identify(void)
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{
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}
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void
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platform_reset(void)
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{
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uint32_t reg = ATH_READ_REG(AR71XX_RST_RESET);
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ATH_WRITE_REG(AR71XX_RST_RESET, reg | RST_RESET_FULL_CHIP);
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/* Wait for reset */
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while(1)
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;
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}
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void
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platform_trap_enter(void)
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{
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}
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void
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platform_trap_exit(void)
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{
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}
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void
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platform_start(__register_t a0 __unused, __register_t a1 __unused,
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__register_t a2 __unused, __register_t a3 __unused)
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{
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vm_offset_t kernend;
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uint64_t platform_counter_freq, freq;
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uint32_t reg, div, pll_config;
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int argc, i, count = 0;
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char **argv, **envp;
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/* clear the BSS and SBSS segments */
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kernend = round_page((vm_offset_t)&end);
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memset(&edata, 0, kernend - (vm_offset_t)(&edata));
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argc = a0;
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argv = (char**)a1;
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envp = (char**)a2;
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/*
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* Protect ourselves from garbage in registers
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*/
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if (MIPS_IS_VALID_PTR(envp)) {
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for (i = 0; envp[i]; i += 2)
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{
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if (strcmp(envp[i], "memsize") == 0)
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realmem = btoc(strtoul(envp[i+1], NULL, 16));
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else if (strcmp(envp[i], "ethaddr") == 0) {
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count = sscanf(envp[i+1], "%x.%x.%x.%x.%x.%x",
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&ar711_base_mac[0], &ar711_base_mac[1],
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&ar711_base_mac[2], &ar711_base_mac[3],
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&ar711_base_mac[4], &ar711_base_mac[5]);
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if (count < 6)
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memset(ar711_base_mac, 0,
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sizeof(ar711_base_mac));
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}
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}
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}
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/*
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* Just wild guess. RedBoot let us down and didn't reported
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* memory size
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*/
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if (realmem == 0)
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realmem = btoc(32*1024*1024);
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/* phys_avail regions are in bytes */
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phys_avail[0] = MIPS_KSEG0_TO_PHYS((vm_offset_t)&end);
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phys_avail[1] = ctob(realmem);
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physmem = realmem;
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/*
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* ns8250 uart code uses DELAY so ticker should be inititalized
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* before cninit. And tick_init_params refers to hz, so * init_param1
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* should be called first.
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*/
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init_param1();
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pll_config = ATH_READ_REG(AR71XX_PLL_CPU_CONFIG);
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div = ((pll_config >> PLL_FB_SHIFT) & PLL_FB_MASK) + 1;
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freq = div * AR71XX_BASE_FREQ;
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div = ((pll_config >> PLL_CPU_DIV_SEL_SHIFT) & PLL_CPU_DIV_SEL_MASK)
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+ 1;
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platform_counter_freq = freq / div;
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mips_timer_init_params(platform_counter_freq, 1);
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cninit();
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printf("platform frequency: %lld\n", platform_counter_freq);
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printf("arguments: \n");
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printf(" a0 = %08x\n", a0);
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printf(" a1 = %08x\n", a1);
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printf(" a2 = %08x\n", a2);
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printf(" a3 = %08x\n", a3);
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printf("Cmd line:");
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if (MIPS_IS_VALID_PTR(argv)) {
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for (i = 0; i < argc; i++)
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printf(" %s", argv[i]);
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}
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else
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printf ("argv is invalid");
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printf("\n");
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printf("Environment:\n");
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if (MIPS_IS_VALID_PTR(envp)) {
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for (i = 0; envp[i]; i+=2)
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printf(" %s = %s\n", envp[i], envp[i+1]);
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}
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else
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printf ("envp is invalid\n");
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init_param2(physmem);
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mips_cpu_init();
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pmap_bootstrap();
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mips_proc0_init();
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mutex_init();
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/*
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* Reset USB devices
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*/
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reg = ATH_READ_REG(AR71XX_RST_RESET);
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reg |=
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RST_RESET_USB_OHCI_DLL | RST_RESET_USB_HOST | RST_RESET_USB_PHY;
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ATH_WRITE_REG(AR71XX_RST_RESET, reg);
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DELAY(1000);
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reg &=
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~(RST_RESET_USB_OHCI_DLL | RST_RESET_USB_HOST | RST_RESET_USB_PHY);
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ATH_WRITE_REG(AR71XX_RST_RESET, reg);
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ATH_WRITE_REG(AR71XX_USB_CTRL_CONFIG,
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USB_CTRL_CONFIG_OHCI_DES_SWAP | USB_CTRL_CONFIG_OHCI_BUF_SWAP |
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USB_CTRL_CONFIG_EHCI_DES_SWAP | USB_CTRL_CONFIG_EHCI_BUF_SWAP);
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ATH_WRITE_REG(AR71XX_USB_CTRL_FLADJ,
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(32 << USB_CTRL_FLADJ_HOST_SHIFT) | (3 << USB_CTRL_FLADJ_A5_SHIFT));
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DELAY(1000);
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#ifdef DDB
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kdb_init();
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#endif
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}
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