a3f2a9c57e
Per the Intel manuals, CPUID is supposed to unconditionally zero the upper 32 bits of the involved (rax/rbx/rcx/rdx) registers. Previously, the emulation would cast pointers to the 64-bit register values down to `uint32_t`, which while properly manipulating the lower bits, would leave any garbage in the upper bits uncleared. While no existing guest OSes seem to stumble over this in practice, the bhyve emulation should match x86 expectations. This was discovered through alignment warnings emitted by gcc9, while testing it against SmartOS/bhyve. SmartOS bug: https://smartos.org/bugview/OS-8168 Submitted by: Patrick Mooney Reviewed by: rgrimes Differential Revision: https://reviews.freebsd.org/D24727
84 lines
2.7 KiB
C
84 lines
2.7 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _X86_H_
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#define _X86_H_
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#define CPUID_0000_0000 (0x0)
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#define CPUID_0000_0001 (0x1)
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#define CPUID_0000_0002 (0x2)
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#define CPUID_0000_0003 (0x3)
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#define CPUID_0000_0004 (0x4)
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#define CPUID_0000_0006 (0x6)
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#define CPUID_0000_0007 (0x7)
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#define CPUID_0000_000A (0xA)
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#define CPUID_0000_000B (0xB)
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#define CPUID_0000_000D (0xD)
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#define CPUID_0000_0015 (0x15)
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#define CPUID_8000_0000 (0x80000000)
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#define CPUID_8000_0001 (0x80000001)
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#define CPUID_8000_0002 (0x80000002)
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#define CPUID_8000_0003 (0x80000003)
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#define CPUID_8000_0004 (0x80000004)
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#define CPUID_8000_0006 (0x80000006)
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#define CPUID_8000_0007 (0x80000007)
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#define CPUID_8000_0008 (0x80000008)
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#define CPUID_8000_001D (0x8000001D)
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#define CPUID_8000_001E (0x8000001E)
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/*
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* CPUID instruction Fn0000_0001:
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*/
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#define CPUID_0000_0001_APICID_MASK (0xff<<24)
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#define CPUID_0000_0001_APICID_SHIFT 24
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/*
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* CPUID instruction Fn0000_0001 ECX
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*/
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#define CPUID_0000_0001_FEAT0_VMX (1<<5)
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int x86_emulate_cpuid(struct vm *vm, int vcpu_id, uint64_t *rax, uint64_t *rbx,
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uint64_t *rcx, uint64_t *rdx);
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enum vm_cpuid_capability {
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VCC_NONE,
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VCC_NO_EXECUTE,
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VCC_FFXSR,
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VCC_TCE,
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VCC_LAST
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};
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/*
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* Return 'true' if the capability 'cap' is enabled in this virtual cpu
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* and 'false' otherwise.
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*/
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bool vm_cpuid_capability(struct vm *vm, int vcpuid, enum vm_cpuid_capability);
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#endif
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