b949475db0
Promoting base pages to superpages can increase TLB coverage and allow for efficient use of page table entries. This development provides FreeBSD/ARM with superpages management mechanism roughly equivalent to what we have for i386 and amd64 architectures. 1. Add mechanism for automatic promotion of 4KB page mappings to 1MB section mappings (and demotion when not needed, respectively). 2. Managed and non-kernel mappings are now superpages-aware. 3. The functionality can be enabled by setting "vm.pmap.sp_enabled" tunable to a non-zero value (either in loader.conf or by modifying "sp_enabled" variable in pmap-v6.c file). By default, automatic promotion is currently disabled. Submitted by: Zbigniew Bodek <zbb@semihalf.com> Reviewed by: alc Sponsored by: The FreeBSD Foundation, Semihalf
149 lines
4.7 KiB
C
149 lines
4.7 KiB
C
/*-
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* Copyright (c) 2001 David E. O'Brien
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)param.h 5.8 (Berkeley) 6/28/91
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* $FreeBSD$
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*/
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#ifndef _ARM_INCLUDE_PARAM_H_
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#define _ARM_INCLUDE_PARAM_H_
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/*
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* Machine dependent constants for StrongARM
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*/
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#include <machine/_align.h>
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#define STACKALIGNBYTES (8 - 1)
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#define STACKALIGN(p) ((u_int)(p) & ~STACKALIGNBYTES)
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#define __PCI_REROUTE_INTERRUPT
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#ifndef MACHINE
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#define MACHINE "arm"
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#endif
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#ifndef MACHINE_ARCH
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#if defined(__FreeBSD_ARCH_armv6__) || (defined(__ARM_ARCH) && __ARM_ARCH >= 6)
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#ifdef __ARMEB__
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#define MACHINE_ARCH "armv6eb"
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#else
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#define MACHINE_ARCH "armv6"
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#endif
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#else
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#ifdef __ARMEB__
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#define MACHINE_ARCH "armeb"
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#else
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#define MACHINE_ARCH "arm"
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#endif
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#endif
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#endif
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#define MID_MACHINE MID_ARM6
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#if defined(SMP) || defined(KLD_MODULE)
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#ifndef MAXCPU
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#define MAXCPU 4
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#endif
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#else
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#define MAXCPU 1
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#endif /* SMP || KLD_MODULE */
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#ifndef MAXMEMDOM
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#define MAXMEMDOM 1
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#endif
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#define ALIGNBYTES _ALIGNBYTES
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#define ALIGN(p) _ALIGN(p)
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/*
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* ALIGNED_POINTER is a boolean macro that checks whether an address
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* is valid to fetch data elements of type t from on this architecture.
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* This does not reflect the optimal alignment, just the possibility
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* (within reasonable limits).
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*/
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#define ALIGNED_POINTER(p, t) ((((unsigned)(p)) & (sizeof(t)-1)) == 0)
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/*
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* CACHE_LINE_SIZE is the compile-time maximum cache line size for an
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* architecture. It should be used with appropriate caution.
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*/
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#define CACHE_LINE_SHIFT 6
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#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
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#define PAGE_SHIFT 12
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#define PAGE_SIZE (1 << PAGE_SHIFT) /* Page size */
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#define PAGE_MASK (PAGE_SIZE - 1)
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#define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t)))
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#define PDR_SHIFT 20 /* log2(NBPDR) */
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#define NBPDR (1 << PDR_SHIFT)
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#define PDRMASK (NBPDR - 1)
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#define NPDEPG (1 << (32 - PDR_SHIFT))
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#define MAXPAGESIZES 2 /* maximum number of supported page sizes */
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#ifndef KSTACK_PAGES
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#define KSTACK_PAGES 2
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#endif /* !KSTACK_PAGES */
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#ifndef FPCONTEXTSIZE
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#define FPCONTEXTSIZE (0x100)
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#endif
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#ifndef KSTACK_GUARD_PAGES
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#define KSTACK_GUARD_PAGES 1
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#endif /* !KSTACK_GUARD_PAGES */
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#define USPACE_SVC_STACK_TOP KSTACK_PAGES * PAGE_SIZE
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#define USPACE_SVC_STACK_BOTTOM (USPACE_SVC_STACK_TOP - 0x1000)
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#define USPACE_UNDEF_STACK_TOP (USPACE_SVC_STACK_BOTTOM - 0x10)
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#define USPACE_UNDEF_STACK_BOTTOM (FPCONTEXTSIZE + 10)
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/*
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* Mach derived conversion macros
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*/
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#define trunc_page(x) ((x) & ~PAGE_MASK)
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#define round_page(x) (((x) + PAGE_MASK) & ~PAGE_MASK)
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#define trunc_1mpage(x) ((unsigned)(x) & ~PDRMASK)
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#define round_1mpage(x) ((((unsigned)(x)) + PDRMASK) & ~PDRMASK)
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#define atop(x) ((unsigned)(x) >> PAGE_SHIFT)
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#define ptoa(x) ((unsigned)(x) << PAGE_SHIFT)
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#define arm32_btop(x) ((unsigned)(x) >> PAGE_SHIFT)
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#define arm32_ptob(x) ((unsigned)(x) << PAGE_SHIFT)
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#define pgtok(x) ((x) * (PAGE_SIZE / 1024))
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#endif /* !_ARM_INCLUDE_PARAM_H_ */
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