04b6fa8330
facilities as well as support for the Octeon 2 family of SoCs.
XXX Note that with our antediluvian assembler, we can't support some Octeon 2
instructions and fall back to using the old ones instead.
135 lines
4.1 KiB
C
135 lines
4.1 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* Module to support operations on bitmap of cores. Coremask can be used to
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* select a specific core, a group of cores, or all available cores, for
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* initialization and differentiation of roles within a single shared binary
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* executable image.
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*
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* <hr>$Revision: 49448 $<hr>
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*
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*/
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#include "cvmx-config.h"
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#include "cvmx.h"
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#include "cvmx-spinlock.h"
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#include "cvmx-coremask.h"
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#define CVMX_COREMASK_MAX_SYNCS 20 /* maximum number of coremasks for barrier sync */
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/**
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* This structure defines the private state maintained by coremask module.
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*
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*/
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CVMX_SHARED static struct {
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cvmx_spinlock_t lock; /**< mutex spinlock */
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struct {
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unsigned int coremask; /**< coremask specified for barrier */
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unsigned int checkin; /**< bitmask of cores checking in */
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volatile unsigned int exit; /**< variable to poll for exit condition */
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} s[CVMX_COREMASK_MAX_SYNCS];
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} state = {
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{ CVMX_SPINLOCK_UNLOCKED_VAL },
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{ { 0, 0, 0 } },
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};
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/**
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* Wait (stall) until all cores in the given coremask has reached this point
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* in the program execution before proceeding.
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*
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* @param coremask the group of cores performing the barrier sync
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*
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*/
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void cvmx_coremask_barrier_sync(unsigned int coremask)
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{
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int i;
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unsigned int target;
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assert(coremask != 0);
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cvmx_spinlock_lock(&state.lock);
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for (i = 0; i < CVMX_COREMASK_MAX_SYNCS; i++) {
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if (state.s[i].coremask == 0) {
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/* end of existing coremask list, create new entry, fall-thru */
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state.s[i].coremask = coremask;
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}
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if (state.s[i].coremask == coremask) {
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target = state.s[i].exit + 1; /* wrap-around at 32b */
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state.s[i].checkin |= cvmx_coremask_core(cvmx_get_core_num());
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if (state.s[i].checkin == coremask) {
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state.s[i].checkin = 0;
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state.s[i].exit = target; /* signal exit condition */
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}
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cvmx_spinlock_unlock(&state.lock);
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while (state.s[i].exit != target)
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;
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return;
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}
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}
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/* error condition - coremask array overflowed */
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cvmx_spinlock_unlock(&state.lock);
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assert(0);
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}
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