1fce3f9560
Reviewed by: Mike Spengler <mks@networkcs.com> Submitted by: phk
143 lines
3.6 KiB
C
143 lines
3.6 KiB
C
/*
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*
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* ===================================
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* HARP | Host ATM Research Platform
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* ===================================
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*
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*
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* This Host ATM Research Platform ("HARP") file (the "Software") is
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* made available by Network Computing Services, Inc. ("NetworkCS")
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* "AS IS". NetworkCS does not provide maintenance, improvements or
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* support of any kind.
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*
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* NETWORKCS MAKES NO WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED,
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* INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE, AS TO ANY ELEMENT OF THE
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* SOFTWARE OR ANY SUPPORT PROVIDED IN CONNECTION WITH THIS SOFTWARE.
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* In no event shall NetworkCS be responsible for any damages, including
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* but not limited to consequential damages, arising from or relating to
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* any use of the Software or related support.
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*
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* Copyright 1994-1998 Network Computing Services, Inc.
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*
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* Copies of this Software may be made, however, the above copyright
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* notice must be reproduced on all copies.
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*
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* @(#) $Id: eni_init.c,v 1.1 1998/09/15 08:22:53 phk Exp $
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*
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*/
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/*
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* Efficient ENI Adapter Support
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* -----------------------------
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*
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* Driver initialization support
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*
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*/
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#include <netatm/kern_include.h>
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#include <dev/hea/eni_stats.h>
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#include <dev/hea/eni.h>
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#include <dev/hea/eni_var.h>
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#ifndef lint
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__RCSID("@(#) $Id: eni_init.c,v 1.1 1998/09/15 08:22:53 phk Exp $");
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#endif
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/*
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* Initialize adapter for PDU processing
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*
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* Enable interrupts, set master control, initialize TX buffer,
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* set initial pointers, etc.
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*
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* Arguments:
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* eup pointer to device unit structure
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*
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* Returns:
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* 0 successful
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* error error condition
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*/
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int
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eni_init ( eup )
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Eni_unit *eup;
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{
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u_long words, order;
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/*
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* Allocate one large TX buffer. Currently we use only one
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* channel with full cell rate which all VCs will use.
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* This will (probably) have to change (alot) when we
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* implement QoS.
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*/
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/*
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* Server cards, which have more then 512KB of RAM, will
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* allocate a 128KB TX buffer, while client cards, with
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* 512KB or less will allocate a 32KB TX buffer.
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*/
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words = ( eup->eu_ramsize > MAX_CLIENT_RAM * ENI_BUF_PGSZ ?
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TX_LARGE_BSIZE : TX_SMALL_BSIZE ) * ENI_BUF_PGSZ;
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if ( ( eup->eu_txbuf = eni_allocate_buffer ( eup, &words ) ) ==
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(caddr_t)NULL ) {
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return ENOMEM;
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}
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eup->eu_txsize = words >> 2; /* Bytes to words */
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words >>= ENI_LOC_PREDIV; /* Predivide by 256 words */
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for ( order = -1; words; order++ )
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words >>= 1;
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eup->eu_midway[MIDWAY_TXPLACE] =
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(order << TXSIZE_SHIFT) | ((int)eup->eu_txbuf >> ENI_LOC_PREDIV);
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eup->eu_txpos = eup->eu_midway[MIDWAY_DESCR] & 0x7FFF;
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/*
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* Set first word of unack'ed data to start
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*/
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eup->eu_txfirst = eup->eu_txpos;
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/*
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* Set initial values of local DMA pointer used to prevent wraps
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*/
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eup->eu_txdmawr = 0;
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eup->eu_rxdmawr = 0;
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/*
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* Initialize queue's for receive/transmit pdus
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*/
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eup->eu_txqueue.ifq_maxlen = ENI_IFQ_MAXLEN;
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eup->eu_rxqueue.ifq_maxlen = ENI_IFQ_MAXLEN;
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/*
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* Acknowledge any interrupts
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*/
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(void) eup->eu_midway[MIDWAY_ISA];
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/*
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* "Zero" Sonet error counters
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*/
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eni_zero_stats ( eup );
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/*
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* Set master control register
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*
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* IntSel1 | LOCK_MODE | DMA_ENABLE | TX_ENABLE | RX_ENABLE
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*
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*/
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eup->eu_midway[MIDWAY_MASTER] = 1 << ENI_ISEL_SHIFT |
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ENI_M_DMAENABLE | ENI_M_TXENABLE | ENI_M_RXENABLE;
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/*
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* Enable interrupts
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*/
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eup->eu_midway[MIDWAY_IE] = ENI_INT_SERVICE | ENI_INT_RX_DMA |
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ENI_INT_TX_DMA | ENI_INT_DMA_ERR | ENI_INT_DMA_LERR |
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ENI_INT_IDEN | ENI_INT_DMA_OVFL;
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/*
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* Last thing to do is to indicate that we've finished initializing
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* this unit.
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*/
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eup->eu_flags |= CUF_INITED;
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return 0;
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}
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