f3935b5a79
Also disable one usb module in LINT due to fatal compilation errors, temporary.
824 lines
19 KiB
C
824 lines
19 KiB
C
/*
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*
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* ===================================
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* HARP | Host ATM Research Platform
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* ===================================
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*
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*
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* This Host ATM Research Platform ("HARP") file (the "Software") is
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* made available by Network Computing Services, Inc. ("NetworkCS")
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* "AS IS". NetworkCS does not provide maintenance, improvements or
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* support of any kind.
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*
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* NETWORKCS MAKES NO WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED,
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* INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE, AS TO ANY ELEMENT OF THE
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* SOFTWARE OR ANY SUPPORT PROVIDED IN CONNECTION WITH THIS SOFTWARE.
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* In no event shall NetworkCS be responsible for any damages, including
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* but not limited to consequential damages, arising from or relating to
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* any use of the Software or related support.
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*
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* Copyright 1994-1998 Network Computing Services, Inc.
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*
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* Copies of this Software may be made, however, the above copyright
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* notice must be reproduced on all copies.
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*
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* @(#) $Id: eni_transmit.c,v 1.3 1998/10/31 20:06:45 phk Exp $
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*
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*/
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/*
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* Efficient ENI Adapter Support
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* -----------------------------
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*
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* Transmit queue management and PDU output processing
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*
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*/
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#include <netatm/kern_include.h>
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#include <dev/hea/eni_stats.h>
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#include <dev/hea/eni.h>
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#include <dev/hea/eni_var.h>
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#ifndef lint
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__RCSID("@(#) $Id: eni_transmit.c,v 1.3 1998/10/31 20:06:45 phk Exp $");
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#endif
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/*
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* Make a variable which controls printing of PDUs
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* as they travel through the driver.
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*/
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#ifdef DIAGNOSTIC
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int eni_pdu_print = 0;
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#endif
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/*
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* Some PCI chipsets do not handle one or more of the 8WORD or
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* 4WORD DMA transfer sizes. Default to using only 1WORD transfer
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* sizes unless the user wishes to experiment.
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*
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* Make sure that these have to be changed here in this module.
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*/
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#define DMA_USE_8WORD
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#define DMA_USE_4WORD
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/*
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* Create a DMA list entry
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*
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* DMA entries consist of a control word and a physical address.
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* Control words are comprised of a DMA type, a count of type transfers
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* to occur, and a variable which for TX requests is the TX channel
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* number and for RX requests is the VCC number.
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*
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* Arguments:
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* eup pointer to unit structure
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* rx set if receiving
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* dma_list pointer to DMA list structure
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* list_size length of DMA list structure
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* idx pointer to current list entry
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* val TX channel or RX vcc
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* addr virtual DMA address of data buffer
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* size size in bytes of DMA request to be built
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*
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* Returns:
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* dma_list updated with new entries
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* idx points to next list entry
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* -1 no room in DMA list structure or DMA_GET_ADDR failed
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*/
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int
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eni_set_dma ( eup, rx, dma_list, list_size, idx, val, addr, size )
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Eni_unit *eup;
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u_long *dma_list;
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int list_size;
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long *idx;
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int val;
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u_long addr;
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int size;
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{
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int dsize; /* Size of current DMA request */
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/*
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* Round up to multiple of word and convert to number
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* of words rather then number of bytes.
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*/
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size = ( size + 3 ) >> 2;
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#ifdef DMA_USE_8WORD
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/*
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* Check for room in DMA list - we need two entires
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*/
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if ( *idx + 2 >= list_size )
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return ( -1 );
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/*
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* Here is the big win. Move as much data possible with
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* n 8WORD DMAs.
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*/
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/*
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* Check if we can do one or more 8WORD DMAs
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*/
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dsize = size & ~7;
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if ( dsize ) {
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dma_list[(*idx)++] = ( dsize >> 3 ) << DMA_COUNT_SHIFT |
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val << DMA_VCC_SHIFT | DMA_8WORD;
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dma_list[*idx] = (u_long)DMA_GET_ADDR ( addr, dsize, 0, 0 );
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if ( dma_list[*idx] == NULL ) {
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if ( rx )
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eup->eu_stats.eni_st_drv.drv_rv_segdma++;
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else
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eup->eu_stats.eni_st_drv.drv_xm_segdma++;
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return ( -1 ); /* DMA_GET_ADDR failed */
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} else
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(*idx)++; /* increment index */
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/*
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* Adjust addr and size
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*/
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addr += dsize << 2;
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size &= 7;
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}
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#endif /* DMA_USE_8WORD */
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#ifdef DMA_USE_4WORD
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/*
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* Check for room in DMA list - we need two entries
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*/
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if ( *idx + 2 >= list_size )
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return ( -1 );
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/*
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* Kindof a tossup from this point on. Since we hacked as many
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* 8WORD DMAs off as possible, we are left with 0-7 words
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* of remaining data. We could do upto one 4WORD with 0-3
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* words left, or upto three 2WORDS with 0-1 words left,
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* or upto seven WORDS with nothing left. Someday we should
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* experiment with performance and see if any particular
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* combination is a better win then some other...
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*/
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/*
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* Check if we can do one or more 4WORD DMAs
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*/
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dsize = size & ~3;
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if ( dsize ) {
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dma_list[(*idx)++] = ( dsize >> 2 ) << DMA_COUNT_SHIFT |
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val << DMA_VCC_SHIFT | DMA_4WORD;
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dma_list[*idx] = (u_long)DMA_GET_ADDR ( addr, dsize, 0, 0 );
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if ( dma_list[*idx] == NULL ) {
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if ( rx )
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eup->eu_stats.eni_st_drv.drv_rv_segdma++;
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else
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eup->eu_stats.eni_st_drv.drv_xm_segdma++;
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return ( -1 ); /* DMA_GET_ADDR failed */
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} else
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(*idx)++; /* increment index */
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/*
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* Adjust addr and size
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*/
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addr += dsize << 2;
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size &= 3;
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}
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#endif /* DMA_USE_4WORD */
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/*
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* Check for room in DMA list - we need two entries
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*/
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if ( *idx + 2 >= list_size )
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return ( -1 );
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/*
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* Hard to know if one 2WORD and 0/1 WORD DMA would be better
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* then 2/3 WORD DMAs. For now, skip 2WORD DMAs in favor of
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* WORD DMAs.
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*/
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/*
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* Finish remaining size a 1WORD DMAs
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*/
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if ( size ) {
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dma_list[(*idx)++] = ( size ) << DMA_COUNT_SHIFT |
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val << DMA_VCC_SHIFT | DMA_WORD;
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dma_list[*idx] = (u_long)DMA_GET_ADDR ( addr, size, 0, 0 );
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if ( dma_list[*idx] == NULL ) {
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if ( rx )
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eup->eu_stats.eni_st_drv.drv_rv_segdma++;
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else
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eup->eu_stats.eni_st_drv.drv_xm_segdma++;
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return ( -1 ); /* DMA_GET_ADDR failed */
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} else
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(*idx)++; /* increment index */
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}
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/*
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* Inserted descriptor okay
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*/
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return 0;
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}
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/*
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* Drain Transmit queue
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*
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* As PDUs are given to the adapter to be transmitted, we
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* place them into a private ifqueue so that we can free
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* any resources AFTER we know they've been successfully DMAed.
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* As part of the output processing, we record the PDUs start
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* and stop entries in the DMA list, and prevent wrapping. When
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* we pull the top element off, we simply check that the current
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* DMA location is outside this PDU and if so, it's okay to free
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* things.
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*
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* PDUs are always in ascending order in the queue.
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*
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* Arguments:
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* eup pointer to device unit structure
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*
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* Returns:
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* none
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*
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*/
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void
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eni_xmit_drain ( eup )
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Eni_unit *eup;
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{
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KBuffer *m;
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Eni_vcc *evp;
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struct vccb *vcp;
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u_long pdulen;
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u_long start, stop;
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u_long dmap;
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int s = splimp();
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/*
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* Pull the top element (PDU) off
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*/
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IF_DEQUEUE ( &eup->eu_txqueue, m );
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/*
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* As long as there are valid elements
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*/
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while ( m ) {
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u_long *up;
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/*
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* Find start of buffer
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*/
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KB_DATASTART ( m, up, u_long * );
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/*
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* First word is the VCC for this PDU
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*/
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/*
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* NOTE: There is a potential problem here in that
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* if the VCC is closed after this buffer was transmitted
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* but before we get here, that while evp is non-null,
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* it will not reference a valid vccb. We need to either
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* delay closing the VCC until all references are removed
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* from the drain stacks, actually go through the drain
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* stacks and remove any references, or find someway of
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* indicating that this vccb is nolonger usable.
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*/
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evp = (Eni_vcc *)*up++;
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/*
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* Second word is the start and stop DMA pointers
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*/
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start = *up >> 16;
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stop = *up++ & 0xffff;
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/*
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* Find out where the TX engine is at
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*/
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dmap = eup->eu_midway[MIDWAY_TX_RD];
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/*
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* Check to see if TX engine has processed this
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* PDU yet. Remember that everything is circular
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* and that stop might be less than start numerically.
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*/
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if ( start > stop ) {
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if ( !(dmap >= stop && dmap < start) ) {
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/*
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* Haven't finished this PDU yet - replace
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* it as the head of list.
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*/
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IF_PREPEND ( &eup->eu_txqueue, m );
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/*
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* If this one isn't done, none of the others
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* are either.
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*/
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(void) splx(s);
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return;
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}
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} else {
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if ( dmap < stop && dmap >= start ) {
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/*
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* Haven't finished this PDU yet - replace
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* it as the head of list.
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*/
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IF_PREPEND ( &eup->eu_txqueue, m );
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/*
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* If this one isn't done, none of the others
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* are either.
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*/
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(void) splx(s);
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return;
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}
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}
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/*
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* Count the PDU stats for this interface
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*/
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eup->eu_pif.pif_opdus++;
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/*
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* Third word is PDU length from eni_output().
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*/
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pdulen = *up++;
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eup->eu_txfirst = (eup->eu_txfirst + *up) &
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(eup->eu_txsize - 1);
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eup->eu_pif.pif_obytes += pdulen;
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/*
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* Now lookup the VCC entry and counts the stats for
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* this VC.
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*/
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if ( evp ) {
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vcp = evp->ev_connvc->cvc_vcc;
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if ( vcp ) {
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vcp->vc_opdus++;
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vcp->vc_obytes += pdulen;
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/*
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* If we also have a network interface, count the PDU
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* there also.
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*/
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if ( vcp->vc_nif ) {
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vcp->vc_nif->nif_obytes += pdulen;
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vcp->vc_nif->nif_if.if_opackets++;
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#if (defined(BSD) && (BSD >= 199103))
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vcp->vc_nif->nif_if.if_obytes += pdulen;
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#endif
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}
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}
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}
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/*
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* Free the buffer chain
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*/
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KB_FREEALL ( m );
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/*
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* Advance DMA write okay pointer
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*/
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eup->eu_txdmawr = stop;
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/*
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* Look for next completed transmit PDU
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*/
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IF_DEQUEUE ( &eup->eu_txqueue, m );
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}
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/*
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* We've drained the queue...
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*/
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(void) splx(s);
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return;
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}
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/*
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* Output a PDU
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*
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* This function is called via the common driver code after receiving a
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* stack *_DATA* command. The common code has already validated most of
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* the request so we just need to check a few more ENI-specific details.
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* Then we just build a segmentation structure for the PDU and place the
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* address into the DMA_Transmit_queue.
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*
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* Arguments:
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* cup pointer to device common unit
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* cvp pointer to common VCC entry
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* m pointer to output PDU buffer chain head
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*
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* Returns:
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* none
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*
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*/
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void
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eni_output ( cup, cvp, m )
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Cmn_unit *cup;
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Cmn_vcc *cvp;
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KBuffer *m;
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{
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Eni_unit *eup = (Eni_unit *)cup;
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Eni_vcc *evp = (Eni_vcc *)cvp;
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int s, s2;
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int pdulen = 0;
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u_long size;
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u_long buf_avail;
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u_long dma_rd, dma_wr;
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u_long dma[TEMP_DMA_SIZE];
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int aal5, i;
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long j;
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u_long dma_avail;
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u_long dma_start;
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Eni_mem tx_send;
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u_long *up;
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KBuffer *m0 = m, *m1, *mprev = NULL;
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caddr_t cp, bfr;
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u_int len, align;
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int compressed = 0;
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#ifdef DIAGNOSTIC
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if ( eni_pdu_print )
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atm_dev_pdu_print ( cup, cvp, m, "eni output" );
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#endif
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/*
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* Re-entry point for after buffer compression (if needed)
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*/
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retry:
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/*
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* We can avoid traversing the buffer list twice by building
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* the middle (minus header and trailer) dma list at the
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* same time we massage address and size alignments. Since
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* this list remains local until we determine we've enough
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* room, we're not going to trash anything by not checking
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* sizes, etc. yet. Skip first entry to be used later to skip
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* descriptor word.
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*/
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j = 2;
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/*
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* Do data positioning for address and length alignment
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*/
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while ( m ) {
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u_long buf_addr; /* For passing addr to eni_set_dma() */
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/*
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* Get rid of any zero length buffers
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*/
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if ( KB_LEN ( m ) == 0 ) {
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if ( mprev ) {
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KB_UNLINK ( m, mprev, m1 );
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} else {
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KB_UNLINKHEAD ( m, m1 );
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m0 = m1;
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}
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m = m1;
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continue;
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}
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/*
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* Get start of data onto full-word alignment
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*/
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KB_DATASTART ( m, cp, caddr_t );
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if ((align = ((u_int)cp) & (sizeof(u_long)-1)) != 0) {
|
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/*
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* Gotta slide the data up
|
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*/
|
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eup->eu_stats.eni_st_drv.drv_xm_segnoal++;
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bfr = cp - align;
|
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KM_COPY ( cp, bfr, KB_LEN ( m ) );
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KB_HEADMOVE ( m, -align );
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} else {
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/*
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* Data already aligned
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*/
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bfr = cp;
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}
|
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/*
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* Now work on getting the data length correct
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*/
|
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len = KB_LEN ( m );
|
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while ( ( align = ( len & (sizeof(u_long)-1))) &&
|
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(m1 = KB_NEXT ( m ) ) ) {
|
|
|
|
/*
|
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* Have to move some data from following buffer(s)
|
|
* to word-fill this buffer
|
|
*/
|
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u_int ncopy = MIN ( sizeof(u_long) - align,
|
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KB_LEN ( m1 ) );
|
|
|
|
if ( ncopy ) {
|
|
/*
|
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* Move data to current buffer
|
|
*/
|
|
caddr_t dest;
|
|
|
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eup->eu_stats.eni_st_drv.drv_xm_seglen++;
|
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KB_DATASTART ( m1, cp, caddr_t );
|
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dest = bfr + len;
|
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KB_HEADADJ ( m1, -ncopy );
|
|
KB_TAILADJ ( m, ncopy );
|
|
len += ncopy;
|
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while ( ncopy-- ) {
|
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*dest++ = *cp++;
|
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}
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}
|
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|
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/*
|
|
* If we've drained the buffer, free it
|
|
*/
|
|
if ( KB_LEN ( m1 ) == 0 ) {
|
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KBuffer *m2;
|
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KB_UNLINK ( m1, m, m2 );
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}
|
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}
|
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|
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/*
|
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* Address and size are now aligned. Build dma list
|
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* using TX channel 0. Also, round length up to a word
|
|
* size which should only effect the last buffer in the
|
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* chain. This works because the PDU length is maintained
|
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* seperately and we're not really adjusting the buffer's
|
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* idea of its length.
|
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*/
|
|
KB_DATASTART ( m, buf_addr, u_long );
|
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if ( eni_set_dma ( eup, 0, dma, TEMP_DMA_SIZE, &j, 0,
|
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buf_addr, KB_LEN ( m ) ) < 0 ) {
|
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/*
|
|
* Failed to build DMA list. First, we'll try to
|
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* compress the buffer chain into a smaller number
|
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* of buffers. After compressing, we'll try to send
|
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* the new buffer chain. If we still fail, then
|
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* we'll drop the pdu.
|
|
*/
|
|
if ( compressed ) {
|
|
#ifdef DO_LOG
|
|
log ( LOG_ERR,
|
|
"eni_output: eni_set_dma failed\n" );
|
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#endif
|
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eup->eu_pif.pif_oerrors++;
|
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KB_FREEALL ( m0 );
|
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return;
|
|
}
|
|
|
|
eup->eu_stats.eni_st_drv.drv_xm_maxpdu++;
|
|
|
|
m = atm_dev_compress ( m0 );
|
|
if ( m == NULL ) {
|
|
#ifdef DO_LOG
|
|
log ( LOG_ERR,
|
|
"eni_output: atm_dev_compress() failed\n" );
|
|
#endif
|
|
eup->eu_pif.pif_oerrors++;
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Reset to new head of buffer chain
|
|
*/
|
|
m0 = m;
|
|
|
|
/*
|
|
* Indicate we've been through here
|
|
*/
|
|
compressed = 1;
|
|
|
|
/*
|
|
* Retry to build the DMA descriptors for the newly
|
|
* compressed buffer chain
|
|
*/
|
|
goto retry;
|
|
|
|
}
|
|
|
|
/*
|
|
* Now count the length
|
|
*/
|
|
pdulen += KB_LEN ( m );
|
|
|
|
/*
|
|
* Bump counters and get ready for next buffer
|
|
*/
|
|
mprev = m;
|
|
m = KB_NEXT ( m );
|
|
}
|
|
|
|
/*
|
|
* Get a buffer to use in a private queue so that we can
|
|
* reclaim resources after the DMA has finished.
|
|
*/
|
|
KB_ALLOC ( m, ENI_SMALL_BSIZE, KB_F_NOWAIT, KB_T_DATA );
|
|
if ( m ) {
|
|
/*
|
|
* Link the PDU onto our new head
|
|
*/
|
|
KB_NEXT ( m ) = m0;
|
|
} else {
|
|
/*
|
|
* Drop this PDU and let the sender try again.
|
|
*/
|
|
eup->eu_stats.eni_st_drv.drv_xm_norsc++;
|
|
#ifdef DO_LOG
|
|
log(LOG_ERR, "eni_output: Unable to allocate drain buffer.\n");
|
|
#endif
|
|
eup->eu_pif.pif_oerrors++;
|
|
KB_FREEALL ( m0 );
|
|
return;
|
|
}
|
|
|
|
s = splnet();
|
|
|
|
/*
|
|
* Calculate size of buffer necessary to store PDU. If this
|
|
* is an AAL5 PDU, we'll need to know where to stuff the length
|
|
* value in the trailer.
|
|
*/
|
|
/*
|
|
* AAL5 PDUs need an extra two words for control/length and
|
|
* CRC. Check for AAL5 and add requirements here.
|
|
*/
|
|
if ((aal5 = (evp->ev_connvc->cvc_attr.aal.type == ATM_AAL5)) != 0)
|
|
size = pdulen + 2 * sizeof(long);
|
|
else
|
|
size = pdulen;
|
|
/*
|
|
* Pad to next complete cell boundary
|
|
*/
|
|
size += (BYTES_PER_CELL - 1);
|
|
size -= size % BYTES_PER_CELL;
|
|
/*
|
|
* Convert size to words and add 2 words overhead for every
|
|
* PDU (descriptor and cell header).
|
|
*/
|
|
size = (size >> 2) + 2;
|
|
|
|
/*
|
|
* First, check to see if there's enough buffer space to
|
|
* store the PDU. We do this by checking to see if the size
|
|
* required crosses the eu_txfirst pointer. However, we don't
|
|
* want to exactly fill the buffer, because we won't be able to
|
|
* distinguish between a full and empty buffer.
|
|
*/
|
|
if ( eup->eu_txpos == eup->eu_txfirst )
|
|
buf_avail = eup->eu_txsize;
|
|
else
|
|
if ( eup->eu_txpos > eup->eu_txfirst )
|
|
buf_avail = eup->eu_txsize - ( eup->eu_txpos - eup->eu_txfirst );
|
|
else
|
|
buf_avail = eup->eu_txfirst - eup->eu_txpos;
|
|
|
|
if ( size >= buf_avail )
|
|
{
|
|
/*
|
|
* No buffer space in the adapter to store this PDU.
|
|
* Drop PDU and return.
|
|
*/
|
|
eup->eu_stats.eni_st_drv.drv_xm_nobuf++;
|
|
#ifdef DO_LOG
|
|
log ( LOG_ERR,
|
|
"eni_output: not enough room in buffer\n" );
|
|
#endif
|
|
eup->eu_pif.pif_oerrors++;
|
|
KB_FREEALL ( m );
|
|
(void) splx(s);
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Find out where current DMA pointers are at
|
|
*/
|
|
dma_start = dma_wr = eup->eu_midway[MIDWAY_TX_WR];
|
|
dma_rd = eup->eu_midway[MIDWAY_TX_RD];
|
|
|
|
/*
|
|
* Figure out how much DMA room we have available
|
|
*/
|
|
if ( dma_rd == dma_wr ) { /* Queue is empty */
|
|
dma_avail = DMA_LIST_SIZE;
|
|
} else {
|
|
dma_avail = ( dma_rd + DMA_LIST_SIZE - dma_wr )
|
|
& ( DMA_LIST_SIZE - 1 );
|
|
}
|
|
/*
|
|
* Check to see if we can describe this PDU or if we're:
|
|
* out of room, will wrap past recovered resources.
|
|
*/
|
|
if ( dma_avail < (j / 2 + 4) ||
|
|
( dma_wr + (j / 2 + 4) > eup->eu_txdmawr + DMA_LIST_SIZE ) ) {
|
|
/*
|
|
* No space to insert DMA list into queue. Drop this PDU.
|
|
*/
|
|
eup->eu_stats.eni_st_drv.drv_xm_nodma++;
|
|
#ifdef DO_LOG
|
|
log ( LOG_ERR,
|
|
"eni_output: not enough room in DMA queue\n" );
|
|
#endif
|
|
eup->eu_pif.pif_oerrors++;
|
|
KB_FREEALL( m );
|
|
(void) splx(s);
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Create DMA descriptor for header. There is a descriptor word
|
|
* and also a cell header word which we'll set manually.
|
|
*/
|
|
dma[0] = (((int)(eup->eu_txpos + 2) & (eup->eu_txsize-1)) <<
|
|
DMA_COUNT_SHIFT) | DMA_JK;
|
|
dma[1] = 0;
|
|
|
|
/*
|
|
* JK for AAL5 trailer. Set END bit as well.
|
|
*/
|
|
if ( aal5 ) {
|
|
dma[j++] = (((int)(eup->eu_txpos+size) & (eup->eu_txsize-1)) <<
|
|
DMA_COUNT_SHIFT) | DMA_END_BIT | DMA_JK;
|
|
dma[j++] = 0;
|
|
} else {
|
|
dma[j-2] |= DMA_END_BIT; /* Backup and set END bit */
|
|
}
|
|
|
|
/*
|
|
* Find out where in adapter memory this TX buffer starts.
|
|
*/
|
|
tx_send = (Eni_mem)
|
|
((((int)eup->eu_midway[MIDWAY_TXPLACE] & 0x7ff) << ENI_LOC_PREDIV) +
|
|
(int)eup->eu_ram);
|
|
|
|
/*
|
|
* Set descriptor word
|
|
*/
|
|
tx_send[eup->eu_txpos] =
|
|
(MIDWAY_UNQ_ID << 28) | (aal5 ? 1 << 27 : 0)
|
|
| (size / WORDS_PER_CELL);
|
|
/*
|
|
* Set cell header
|
|
*/
|
|
tx_send[(eup->eu_txpos+1)&(eup->eu_txsize-1)] =
|
|
evp->ev_connvc->cvc_vcc->vc_vci << 4;
|
|
|
|
/*
|
|
* We've got all our resources, count the stats
|
|
*/
|
|
if ( aal5 ) {
|
|
/*
|
|
* If this is an AAL5 PDU, we need to set the length
|
|
*/
|
|
tx_send[(eup->eu_txpos+size-2) &
|
|
(eup->eu_txsize-1)] = pdulen;
|
|
/*
|
|
* Increment AAL5 stats
|
|
*/
|
|
eup->eu_stats.eni_st_aal5.aal5_pdu_xmit++;
|
|
eup->eu_stats.eni_st_aal5.aal5_xmit += (size - 2) / WORDS_PER_CELL;
|
|
} else {
|
|
/*
|
|
* Increment AAL0 stats
|
|
*/
|
|
eup->eu_stats.eni_st_aal0.aal0_xmit += (size - 2) / WORDS_PER_CELL;
|
|
}
|
|
/*
|
|
* Increment ATM stats
|
|
*/
|
|
eup->eu_stats.eni_st_atm.atm_xmit += (size - 2) / WORDS_PER_CELL;
|
|
|
|
/*
|
|
* Store the DMA list
|
|
*/
|
|
j = j >> 1;
|
|
for ( i = 0; i < j; i++ ) {
|
|
eup->eu_txdma[dma_wr*2] = dma[i*2];
|
|
eup->eu_txdma[dma_wr*2+1] = dma[i*2+1];
|
|
dma_wr = (dma_wr+1) & (DMA_LIST_SIZE-1);
|
|
}
|
|
|
|
/*
|
|
* Build drain buffer
|
|
*
|
|
* We toss four words in to help keep track of this
|
|
* PDU. The first is a pointer to the VC control block
|
|
* so we can find which VCI this went out on, the second
|
|
* is the start and stop pointers for the DMA list which
|
|
* describes this PDU, the third is the PDU length
|
|
* since we'll want to know that for stats gathering,
|
|
* and the fourth is the number of DMA words.
|
|
*/
|
|
KB_DATASTART ( m, up, u_long * );
|
|
*up++ = (u_long)cvp;
|
|
*up++ = dma_start << 16 | dma_wr;
|
|
*up++ = pdulen;
|
|
*up = size;
|
|
|
|
/*
|
|
* Set length of our buffer
|
|
*/
|
|
KB_LEN ( m ) = 4 * sizeof ( long );
|
|
|
|
/*
|
|
* Place buffers onto transmit queue for draining
|
|
*/
|
|
s2 = splimp();
|
|
IF_ENQUEUE ( &eup->eu_txqueue, m );
|
|
(void) splx(s2);
|
|
|
|
/*
|
|
* Update next word to be stored
|
|
*/
|
|
eup->eu_txpos = ((eup->eu_txpos + size) & (eup->eu_txsize - 1));
|
|
|
|
/*
|
|
* Update MIDWAY_TX_WR pointer
|
|
*/
|
|
eup->eu_midway[MIDWAY_TX_WR] = dma_wr;
|
|
|
|
(void) splx ( s );
|
|
|
|
return;
|
|
}
|
|
|