fc7682b17f
Sync the e1000 shared code with DPDK shared code "cid-gigabit.2020.06.05.tar.gz released by ND" Primary focus was on client platforms (ich8lan). More work remains here but we need an Intel contact for client networking. Reviewed by: grehan, Intel Networking (erj, earlier rev) Obtained from: DPDK <http://git.dpdk.org/dpdk/tree/drivers/net/e1000/base> MFC after: 1 week Sponsored by: me Differential Revision: https://reviews.freebsd.org/D31547
274 lines
8.9 KiB
C
274 lines
8.9 KiB
C
/******************************************************************************
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SPDX-License-Identifier: BSD-3-Clause
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Copyright (c) 2001-2020, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#ifndef _FREEBSD_OS_H_
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#define _FREEBSD_OS_H_
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/proc.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/mbuf.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/iflib.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/clock.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#define ASSERT(x) if(!(x)) panic("EM: x")
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#define us_scale(x) max(1, (x/(1000000/hz)))
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static inline int
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ms_scale(int x) {
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if (hz == 1000) {
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return (x);
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} else if (hz > 1000) {
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return (x*(hz/1000));
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} else {
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return (max(1, x/(1000/hz)));
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}
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}
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static inline void
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safe_pause_us(int x) {
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if (cold) {
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DELAY(x);
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} else {
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pause("e1000_delay", max(1, x/(1000000/hz)));
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}
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}
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static inline void
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safe_pause_ms(int x) {
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if (cold) {
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DELAY(x*1000);
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} else {
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pause("e1000_delay", ms_scale(x));
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}
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}
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#define usec_delay(x) safe_pause_us(x)
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#define usec_delay_irq(x) usec_delay(x)
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#define msec_delay(x) safe_pause_ms(x)
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#define msec_delay_irq(x) msec_delay(x)
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/* Enable/disable debugging statements in shared code */
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#define DBG 0
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#define DEBUGOUT(...) \
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do { if (DBG) printf(__VA_ARGS__); } while (0)
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#define DEBUGOUT1(...) DEBUGOUT(__VA_ARGS__)
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#define DEBUGOUT2(...) DEBUGOUT(__VA_ARGS__)
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#define DEBUGOUT3(...) DEBUGOUT(__VA_ARGS__)
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#define DEBUGOUT7(...) DEBUGOUT(__VA_ARGS__)
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#define DEBUGFUNC(F) DEBUGOUT(F "\n")
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#define STATIC static
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#define FALSE 0
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#define TRUE 1
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#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
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#define PCI_COMMAND_REGISTER PCIR_COMMAND
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typedef uint64_t u64;
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typedef uint32_t u32;
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typedef uint16_t u16;
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typedef uint8_t u8;
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typedef int64_t s64;
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typedef int32_t s32;
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typedef int16_t s16;
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typedef int8_t s8;
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#define __le16 u16
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#define __le32 u32
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#define __le64 u64
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#if __FreeBSD_version < 800000
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#if defined(__i386__) || defined(__amd64__)
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#define mb() __asm volatile("mfence" ::: "memory")
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#define wmb() __asm volatile("sfence" ::: "memory")
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#define rmb() __asm volatile("lfence" ::: "memory")
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#else
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#define mb()
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#define rmb()
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#define wmb()
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#endif
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#endif /*__FreeBSD_version < 800000 */
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#ifdef INVARIANTS
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#define ASSERT_CTX_LOCK_HELD(hw) (sx_assert(iflib_ctx_lock_get(((struct e1000_osdep *)hw->back)->ctx), SX_XLOCKED))
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#else
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#define ASSERT_CTX_LOCK_HELD(hw)
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#endif
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#if defined(__i386__) || defined(__amd64__)
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static __inline
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void prefetch(void *x)
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{
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__asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
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}
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#else
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#define prefetch(x)
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#endif
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struct e1000_osdep
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{
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bus_space_tag_t mem_bus_space_tag;
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bus_space_handle_t mem_bus_space_handle;
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bus_space_tag_t io_bus_space_tag;
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bus_space_handle_t io_bus_space_handle;
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bus_space_tag_t flash_bus_space_tag;
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bus_space_handle_t flash_bus_space_handle;
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device_t dev;
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if_ctx_t ctx;
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};
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#define E1000_REGISTER(hw, reg) (((hw)->mac.type >= e1000_82543) \
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? reg : e1000_translate_register_82542(reg))
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#define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
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/* Read from an absolute offset in the adapter's memory space */
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#define E1000_READ_OFFSET(hw, offset) \
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bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, offset)
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/* Write to an absolute offset in the adapter's memory space */
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#define E1000_WRITE_OFFSET(hw, offset, value) \
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bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, offset, value)
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/* Register READ/WRITE macros */
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#define E1000_READ_REG(hw, reg) \
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bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
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E1000_REGISTER(hw, reg))
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#define E1000_WRITE_REG(hw, reg, value) \
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bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
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E1000_REGISTER(hw, reg), value)
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#define E1000_READ_REG_ARRAY(hw, reg, index) \
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bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
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E1000_REGISTER(hw, reg) + ((index)<< 2))
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#define E1000_WRITE_REG_ARRAY(hw, reg, index, value) \
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bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
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E1000_REGISTER(hw, reg) + ((index)<< 2), value)
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#define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
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#define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
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#define E1000_READ_REG_ARRAY_BYTE(hw, reg, index) \
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bus_space_read_1(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
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E1000_REGISTER(hw, reg) + index)
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#define E1000_WRITE_REG_ARRAY_BYTE(hw, reg, index, value) \
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bus_space_write_1(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
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E1000_REGISTER(hw, reg) + index, value)
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#define E1000_WRITE_REG_ARRAY_WORD(hw, reg, index, value) \
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bus_space_write_2(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \
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E1000_REGISTER(hw, reg) + (index << 1), value)
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#define E1000_WRITE_REG_IO(hw, reg, value) do {\
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bus_space_write_4(((struct e1000_osdep *)(hw)->back)->io_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->io_bus_space_handle, \
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(hw)->io_base, reg); \
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bus_space_write_4(((struct e1000_osdep *)(hw)->back)->io_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->io_bus_space_handle, \
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(hw)->io_base + 4, value); } while (0)
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#define E1000_READ_FLASH_REG(hw, reg) \
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bus_space_read_4(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg)
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#define E1000_READ_FLASH_REG16(hw, reg) \
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bus_space_read_2(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg)
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#define E1000_WRITE_FLASH_REG(hw, reg, value) \
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bus_space_write_4(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg, value)
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#define E1000_WRITE_FLASH_REG16(hw, reg, value) \
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bus_space_write_2(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
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((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg, value)
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#if defined(INVARIANTS)
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#include <sys/proc.h>
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#define ASSERT_NO_LOCKS() \
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do { \
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int unknown_locks = curthread->td_locks - mtx_owned(&Giant); \
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if (unknown_locks > 0) { \
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WITNESS_WARN(WARN_GIANTOK|WARN_SLEEPOK|WARN_PANIC, NULL, "unexpected non-sleepable lock"); \
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} \
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MPASS(curthread->td_rw_rlocks == 0); \
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MPASS(curthread->td_lk_slocks == 0); \
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} while (0)
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#else
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#define ASSERT_NO_LOCKS()
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#endif
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#endif /* _FREEBSD_OS_H_ */
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