7a7f91f61b
cannot set baud rate as they did in 6.4, this hoses things and we loose our 38400 default term. We now lock somewhere in tcinit.
114 lines
4.2 KiB
C
114 lines
4.2 KiB
C
/*-
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* Copyright (c) 2003-2009 RMI Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of RMI Corporation, nor the names of its contributors,
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RMI_BSD */
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#ifndef _RMI_IOMAP_H_
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#define _RMI_IOMAP_H_
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#include <machine/endian.h>
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#define XLR_DEVICE_REGISTER_BASE 0x1EF00000
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#define DEFAULT_XLR_IO_BASE 0xffffffffbef00000ULL
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#define XLR_IO_SIZE 0x1000
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#define XLR_IO_BRIDGE_OFFSET 0x00000
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#define XLR_IO_DDR2_CHN0_OFFSET 0x01000
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#define XLR_IO_DDR2_CHN1_OFFSET 0x02000
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#define XLR_IO_DDR2_CHN2_OFFSET 0x03000
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#define XLR_IO_DDR2_CHN3_OFFSET 0x04000
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#define XLR_IO_RLD2_CHN0_OFFSET 0x05000
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#define XLR_IO_RLD2_CHN1_OFFSET 0x06000
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#define XLR_IO_SRAM_OFFSET 0x07000
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#define XLR_IO_PIC_OFFSET 0x08000
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#define XLR_IO_PCIX_OFFSET 0x09000
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#define XLR_IO_HT_OFFSET 0x0A000
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#define XLR_IO_SECURITY_OFFSET 0x0B000
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#define XLR_IO_GMAC_0_OFFSET 0x0C000
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#define XLR_IO_GMAC_1_OFFSET 0x0D000
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#define XLR_IO_GMAC_2_OFFSET 0x0E000
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#define XLR_IO_GMAC_3_OFFSET 0x0F000
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#define XLR_IO_SPI4_0_OFFSET 0x10000
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#define XLR_IO_XGMAC_0_OFFSET 0x11000
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#define XLR_IO_SPI4_1_OFFSET 0x12000
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#define XLR_IO_XGMAC_1_OFFSET 0x13000
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#define XLR_IO_UART_0_OFFSET 0x14000
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#define XLR_IO_UART_1_OFFSET 0x15000
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#define XLR_UART0ADDR (XLR_IO_UART_0_OFFSET+XLR_DEVICE_REGISTER_BASE)
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#define XLR_IO_I2C_0_OFFSET 0x16000
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#define XLR_IO_I2C_1_OFFSET 0x17000
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#define XLR_IO_GPIO_OFFSET 0x18000
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#define XLR_IO_FLASH_OFFSET 0x19000
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#define XLR_IO_TB_OFFSET 0x1C000
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#define XLR_IO_GMAC_4_OFFSET 0x20000
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#define XLR_IO_GMAC_5_OFFSET 0x21000
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#define XLR_IO_GMAC_6_OFFSET 0x22000
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#define XLR_IO_GMAC_7_OFFSET 0x23000
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#define XLR_IO_PCIE_0_OFFSET 0x1E000
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#define XLR_IO_PCIE_1_OFFSET 0x1F000
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#define XLR_IO_USB_0_OFFSET 0x24000
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#define XLR_IO_USB_1_OFFSET 0x25000
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#define XLR_IO_COMP_OFFSET 0x1d000
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/* Base Address (Virtual) of the PCI Config address space
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* For now, choose 256M phys in kseg1 = 0xA0000000 + (1<<28)
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* Config space spans 256 (num of buses) * 256 (num functions) * 256 bytes
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* ie 1<<24 = 16M
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*/
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#define DEFAULT_PCI_CONFIG_BASE 0x18000000
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#define DEFAULT_HT_TYPE0_CFG_BASE 0x16000000
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#define DEFAULT_HT_TYPE1_CFG_BASE 0x17000000
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typedef volatile __uint32_t xlr_reg_t;
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extern unsigned long xlr_io_base;
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#define xlr_io_mmio(offset) ((xlr_reg_t *)(xlr_io_base+(offset)))
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#define xlr_read_reg(base, offset) (__ntohl((base)[(offset)]))
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#define xlr_write_reg(base, offset, value) ((base)[(offset)] = __htonl((value)))
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extern void on_chip_init(void);
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#endif /* _RMI_IOMAP_H_ */
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