188 lines
4.9 KiB
Plaintext
188 lines
4.9 KiB
Plaintext
/*-
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* Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/ {
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compatible = "samsung,exynos5250";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&GIC>;
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aliases {
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soc = &SOC;
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serial0 = &serial0;
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serial1 = &serial1;
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clk0 = &clk0;
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dp0 = &dp0;
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fimd0 = &fimd0;
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};
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SOC: Exynos5@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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bus-frequency = <0>;
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GIC: interrupt-controller@10481000 {
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compatible = "arm,gic";
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reg = < 0x10481000 0x1000 >, /* Distributor Registers */
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< 0x10482000 0x2000 >; /* CPU Interface Registers */
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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};
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clk0: clk@10010000 {
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compatible = "exynos,clk";
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reg = < 0x10020000 0x20000 >;
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};
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mct {
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compatible = "exynos,mct";
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reg = < 0x101C0000 0x1000 >;
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clock-frequency = <24000000>;
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};
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generic_timer {
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compatible = "arm,armv7-timer";
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clock-frequency = <24000000>;
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};
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pwm {
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compatible = "samsung,s3c24x0-timer";
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reg = <0x12DD0000 0x1000>;
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interrupts = < 71 >;
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interrupt-parent = <&GIC>;
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clock-frequency = <24000000>;
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};
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usb@12110000 {
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compatible = "exynos,usb-ehci", "usb-ehci";
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reg = <0x12110000 0x1000>, /* EHCI */
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<0x12130000 0x1000>, /* EHCI host ctrl */
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<0x10040000 0x1000>, /* Power */
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<0x10050230 0x10>, /* Sysreg */
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<0x11400C60 0x10>; /* GPIO left */
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interrupts = < 103 >;
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interrupt-parent = <&GIC>;
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};
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usb@12120000 {
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compatible = "exynos,usb-ohci", "usb-ohci";
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reg = <0x12120000 0x10000>;
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interrupts = < 103 >;
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interrupt-parent = <&GIC>;
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};
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sdhci@12200000 {
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compatible = "sdhci_generic";
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reg = <0x12200000 0x1000>;
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interrupts = <107>;
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interrupt-parent = <&GIC>;
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clock-frequency = <24000000>; /* TODO: verify freq */
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};
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sdhci@12210000 {
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compatible = "sdhci_generic";
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reg = <0x12210000 0x1000>;
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interrupts = <108>;
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interrupt-parent = <&GIC>;
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clock-frequency = <24000000>;
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};
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sdhci@12220000 {
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compatible = "sdhci_generic";
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reg = <0x12220000 0x1000>;
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interrupts = <109>;
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interrupt-parent = <&GIC>;
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clock-frequency = <24000000>;
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};
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sdhci@12230000 {
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compatible = "sdhci_generic";
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reg = <0x12230000 0x1000>;
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interrupts = <110>;
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interrupt-parent = <&GIC>;
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clock-frequency = <24000000>;
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};
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serial0: serial@12C00000 {
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compatible = "exynos";
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reg = <0x12C00000 0x100>;
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interrupts = < 83 >;
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interrupt-parent = <&GIC>;
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clock-frequency = < 100000000 >;
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current-speed = <115200>;
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};
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serial1: serial@12C10000 {
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compatible = "exynos";
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reg = <0x12C10000 0x100>;
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interrupts = < 84 >;
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interrupt-parent = <&GIC>;
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clock-frequency = < 100000000 >;
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current-speed = <115200>;
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};
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serial2: serial@12C20000 {
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compatible = "exynos";
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reg = <0x12C20000 0x100>;
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interrupts = < 85 >;
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interrupt-parent = <&GIC>;
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clock-frequency = < 100000000 >;
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current-speed = <115200>;
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};
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serial3: serial@12C30000 {
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compatible = "exynos";
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reg = <0x12C30000 0x100>;
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interrupts = < 86 >;
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interrupt-parent = <&GIC>;
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clock-frequency = < 100000000 >;
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current-speed = <115200>;
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};
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fimd0: fimd@14400000 {
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compatible = "exynos,fimd";
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status = "disabled";
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reg = < 0x14400000 0x10000 >, /* fimd */
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< 0x14420000 0x10000 >, /* disp */
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< 0x10050000 0x220 >; /* sysreg */
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interrupt-parent = <&GIC>;
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};
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dp0: dp@145B0000 {
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compatible = "exynos,dp";
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status = "disabled";
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reg = < 0x145B0000 0x10000 >,
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< 0x10040720 0x10 >; /* PHY */
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interrupt-parent = <&GIC>;
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};
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};
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};
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