d0a97c000f
With multicast chaining, if e.g. a specific multicast filter is inserted and the multicast mis-match filter is then inserted, both may match a packet and cause it to be delivered. Copy the behaviour of the Linux driver, which is to remove the old filters first, on the basis that customers are more likely to be able to handle drops than duplicates (see bug49178 comment 4). Submitted by: Mark Spender <mspender at solarflare.com> Sponsored by: Solarflare Communications, Inc. MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D6331
1129 lines
24 KiB
C
1129 lines
24 KiB
C
/*-
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* Copyright (c) 2012-2015 Solarflare Communications Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are
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* those of the authors and should not be interpreted as representing official
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* policies, either expressed or implied, of the FreeBSD Project.
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*
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* $FreeBSD$
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*/
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#ifndef _SYS_HUNT_IMPL_H
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#define _SYS_HUNT_IMPL_H
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#include "efx.h"
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#include "efx_regs.h"
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#include "efx_regs_ef10.h"
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#include "efx_mcdi.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could
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* possibly be increased, or the write size reported by newer firmware used
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* instead.
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*/
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#define EF10_NVRAM_CHUNK 0x80
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/* Alignment requirement for value written to RX WPTR:
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* the WPTR must be aligned to an 8 descriptor boundary
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*/
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#define EF10_RX_WPTR_ALIGN 8
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/*
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* Max byte offset into the packet the TCP header must start for the hardware
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* to be able to parse the packet correctly.
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* FIXME: Move to ef10_impl.h when it is included in all driver builds.
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*/
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#define EF10_TCP_HEADER_OFFSET_LIMIT 208
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/* Invalid RSS context handle */
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#define EF10_RSS_CONTEXT_INVALID (0xffffffff)
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/* EV */
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__checkReturn efx_rc_t
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ef10_ev_init(
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__in efx_nic_t *enp);
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void
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ef10_ev_fini(
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__in efx_nic_t *enp);
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__checkReturn efx_rc_t
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ef10_ev_qcreate(
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__in efx_nic_t *enp,
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__in unsigned int index,
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__in efsys_mem_t *esmp,
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__in size_t n,
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__in uint32_t id,
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__in efx_evq_t *eep);
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void
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ef10_ev_qdestroy(
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__in efx_evq_t *eep);
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__checkReturn efx_rc_t
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ef10_ev_qprime(
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__in efx_evq_t *eep,
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__in unsigned int count);
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void
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ef10_ev_qpost(
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__in efx_evq_t *eep,
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__in uint16_t data);
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__checkReturn efx_rc_t
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ef10_ev_qmoderate(
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__in efx_evq_t *eep,
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__in unsigned int us);
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#if EFSYS_OPT_QSTATS
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void
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ef10_ev_qstats_update(
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__in efx_evq_t *eep,
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__inout_ecount(EV_NQSTATS) efsys_stat_t *stat);
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#endif /* EFSYS_OPT_QSTATS */
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void
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ef10_ev_rxlabel_init(
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__in efx_evq_t *eep,
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__in efx_rxq_t *erp,
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__in unsigned int label);
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void
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ef10_ev_rxlabel_fini(
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__in efx_evq_t *eep,
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__in unsigned int label);
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/* INTR */
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__checkReturn efx_rc_t
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ef10_intr_init(
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__in efx_nic_t *enp,
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__in efx_intr_type_t type,
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__in efsys_mem_t *esmp);
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void
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ef10_intr_enable(
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__in efx_nic_t *enp);
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void
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ef10_intr_disable(
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__in efx_nic_t *enp);
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void
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ef10_intr_disable_unlocked(
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__in efx_nic_t *enp);
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__checkReturn efx_rc_t
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ef10_intr_trigger(
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__in efx_nic_t *enp,
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__in unsigned int level);
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void
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ef10_intr_status_line(
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__in efx_nic_t *enp,
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__out boolean_t *fatalp,
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__out uint32_t *qmaskp);
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void
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ef10_intr_status_message(
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__in efx_nic_t *enp,
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__in unsigned int message,
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__out boolean_t *fatalp);
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void
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ef10_intr_fatal(
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__in efx_nic_t *enp);
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void
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ef10_intr_fini(
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__in efx_nic_t *enp);
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/* NIC */
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extern __checkReturn efx_rc_t
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ef10_nic_probe(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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hunt_board_cfg(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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ef10_nic_set_drv_limits(
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__inout efx_nic_t *enp,
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__in efx_drv_limits_t *edlp);
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extern __checkReturn efx_rc_t
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ef10_nic_get_vi_pool(
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__in efx_nic_t *enp,
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__out uint32_t *vi_countp);
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extern __checkReturn efx_rc_t
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ef10_nic_get_bar_region(
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__in efx_nic_t *enp,
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__in efx_nic_region_t region,
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__out uint32_t *offsetp,
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__out size_t *sizep);
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extern __checkReturn efx_rc_t
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ef10_nic_reset(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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ef10_nic_init(
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__in efx_nic_t *enp);
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#if EFSYS_OPT_DIAG
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extern __checkReturn efx_rc_t
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ef10_nic_register_test(
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__in efx_nic_t *enp);
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#endif /* EFSYS_OPT_DIAG */
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extern void
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ef10_nic_fini(
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__in efx_nic_t *enp);
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extern void
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ef10_nic_unprobe(
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__in efx_nic_t *enp);
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/* MAC */
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extern __checkReturn efx_rc_t
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ef10_mac_poll(
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__in efx_nic_t *enp,
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__out efx_link_mode_t *link_modep);
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extern __checkReturn efx_rc_t
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ef10_mac_up(
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__in efx_nic_t *enp,
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__out boolean_t *mac_upp);
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extern __checkReturn efx_rc_t
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ef10_mac_addr_set(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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ef10_mac_pdu_set(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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ef10_mac_reconfigure(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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ef10_mac_multicast_list_set(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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ef10_mac_filter_default_rxq_set(
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__in efx_nic_t *enp,
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__in efx_rxq_t *erp,
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__in boolean_t using_rss);
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extern void
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ef10_mac_filter_default_rxq_clear(
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__in efx_nic_t *enp);
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#if EFSYS_OPT_LOOPBACK
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extern __checkReturn efx_rc_t
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ef10_mac_loopback_set(
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__in efx_nic_t *enp,
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__in efx_link_mode_t link_mode,
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__in efx_loopback_type_t loopback_type);
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#endif /* EFSYS_OPT_LOOPBACK */
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#if EFSYS_OPT_MAC_STATS
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extern __checkReturn efx_rc_t
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ef10_mac_stats_update(
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__in efx_nic_t *enp,
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__in efsys_mem_t *esmp,
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__inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
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__inout_opt uint32_t *generationp);
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#endif /* EFSYS_OPT_MAC_STATS */
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/* MCDI */
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#if EFSYS_OPT_MCDI
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extern __checkReturn efx_rc_t
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ef10_mcdi_init(
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__in efx_nic_t *enp,
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__in const efx_mcdi_transport_t *mtp);
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extern void
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ef10_mcdi_fini(
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__in efx_nic_t *enp);
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extern void
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ef10_mcdi_send_request(
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__in efx_nic_t *enp,
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__in void *hdrp,
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__in size_t hdr_len,
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__in void *sdup,
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__in size_t sdu_len);
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extern __checkReturn boolean_t
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ef10_mcdi_poll_response(
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__in efx_nic_t *enp);
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extern void
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ef10_mcdi_read_response(
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__in efx_nic_t *enp,
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__out_bcount(length) void *bufferp,
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__in size_t offset,
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__in size_t length);
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extern efx_rc_t
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ef10_mcdi_poll_reboot(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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ef10_mcdi_feature_supported(
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__in efx_nic_t *enp,
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__in efx_mcdi_feature_id_t id,
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__out boolean_t *supportedp);
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#endif /* EFSYS_OPT_MCDI */
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/* NVRAM */
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#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
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extern __checkReturn efx_rc_t
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ef10_nvram_buf_read_tlv(
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__in efx_nic_t *enp,
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__in_bcount(max_seg_size) caddr_t seg_data,
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__in size_t max_seg_size,
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__in uint32_t tag,
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__deref_out_bcount_opt(*sizep) caddr_t *datap,
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__out size_t *sizep);
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extern __checkReturn efx_rc_t
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ef10_nvram_buf_write_tlv(
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__inout_bcount(partn_size) caddr_t partn_data,
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__in size_t partn_size,
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__in uint32_t tag,
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__in_bcount(tag_size) caddr_t tag_data,
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__in size_t tag_size,
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__out size_t *total_lengthp);
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extern __checkReturn efx_rc_t
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ef10_nvram_partn_read_tlv(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in uint32_t tag,
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__deref_out_bcount_opt(*sizep) caddr_t *datap,
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__out size_t *sizep);
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extern __checkReturn efx_rc_t
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ef10_nvram_partn_write_tlv(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in uint32_t tag,
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__in_bcount(size) caddr_t data,
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__in size_t size);
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extern __checkReturn efx_rc_t
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ef10_nvram_partn_write_segment_tlv(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in uint32_t tag,
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__in_bcount(size) caddr_t data,
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__in size_t size,
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__in boolean_t all_segments);
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extern __checkReturn efx_rc_t
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ef10_nvram_partn_lock(
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__in efx_nic_t *enp,
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__in uint32_t partn);
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extern void
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ef10_nvram_partn_unlock(
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__in efx_nic_t *enp,
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__in uint32_t partn);
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#endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */
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#if EFSYS_OPT_NVRAM
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#if EFSYS_OPT_DIAG
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extern __checkReturn efx_rc_t
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ef10_nvram_test(
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__in efx_nic_t *enp);
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#endif /* EFSYS_OPT_DIAG */
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extern __checkReturn efx_rc_t
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ef10_nvram_type_to_partn(
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__in efx_nic_t *enp,
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__in efx_nvram_type_t type,
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__out uint32_t *partnp);
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extern __checkReturn efx_rc_t
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ef10_nvram_partn_size(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__out size_t *sizep);
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extern __checkReturn efx_rc_t
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ef10_nvram_partn_rw_start(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__out size_t *chunk_sizep);
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extern __checkReturn efx_rc_t
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ef10_nvram_partn_read_mode(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in unsigned int offset,
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__out_bcount(size) caddr_t data,
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__in size_t size,
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__in uint32_t mode);
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extern __checkReturn efx_rc_t
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ef10_nvram_partn_read(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in unsigned int offset,
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__out_bcount(size) caddr_t data,
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__in size_t size);
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extern __checkReturn efx_rc_t
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ef10_nvram_partn_erase(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in unsigned int offset,
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__in size_t size);
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extern __checkReturn efx_rc_t
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ef10_nvram_partn_write(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in unsigned int offset,
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__out_bcount(size) caddr_t data,
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__in size_t size);
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extern void
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ef10_nvram_partn_rw_finish(
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__in efx_nic_t *enp,
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__in uint32_t partn);
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extern __checkReturn efx_rc_t
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ef10_nvram_partn_get_version(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__out uint32_t *subtypep,
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__out_ecount(4) uint16_t version[4]);
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extern __checkReturn efx_rc_t
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ef10_nvram_partn_set_version(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in_ecount(4) uint16_t version[4]);
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extern __checkReturn efx_rc_t
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ef10_nvram_buffer_validate(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in_bcount(buffer_size)
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caddr_t bufferp,
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__in size_t buffer_size);
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extern __checkReturn efx_rc_t
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ef10_nvram_buffer_create(
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__in efx_nic_t *enp,
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__in uint16_t partn_type,
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__in_bcount(buffer_size)
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caddr_t bufferp,
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__in size_t buffer_size);
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extern __checkReturn efx_rc_t
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ef10_nvram_buffer_find_item_start(
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__in_bcount(buffer_size)
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caddr_t bufferp,
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__in size_t buffer_size,
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__out uint32_t *startp
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);
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extern __checkReturn efx_rc_t
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ef10_nvram_buffer_find_end(
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__in_bcount(buffer_size)
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caddr_t bufferp,
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__in size_t buffer_size,
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__in uint32_t offset,
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__out uint32_t *endp
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);
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extern __checkReturn __success(return != B_FALSE) boolean_t
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ef10_nvram_buffer_find_item(
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__in_bcount(buffer_size)
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caddr_t bufferp,
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__in size_t buffer_size,
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__in uint32_t offset,
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__out uint32_t *startp,
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__out uint32_t *lengthp
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);
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extern __checkReturn efx_rc_t
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ef10_nvram_buffer_get_item(
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__in_bcount(buffer_size)
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caddr_t bufferp,
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__in size_t buffer_size,
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__in uint32_t offset,
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__in uint32_t length,
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__out_bcount_part(item_max_size, *lengthp)
|
|
caddr_t itemp,
|
|
__in size_t item_max_size,
|
|
__out uint32_t *lengthp
|
|
);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_nvram_buffer_insert_item(
|
|
__in_bcount(buffer_size)
|
|
caddr_t bufferp,
|
|
__in size_t buffer_size,
|
|
__in uint32_t offset,
|
|
__in_bcount(length) caddr_t keyp,
|
|
__in uint32_t length,
|
|
__out uint32_t *lengthp
|
|
);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_nvram_buffer_delete_item(
|
|
__in_bcount(buffer_size)
|
|
caddr_t bufferp,
|
|
__in size_t buffer_size,
|
|
__in uint32_t offset,
|
|
__in uint32_t length,
|
|
__in uint32_t end
|
|
);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_nvram_buffer_finish(
|
|
__in_bcount(buffer_size)
|
|
caddr_t bufferp,
|
|
__in size_t buffer_size
|
|
);
|
|
|
|
#endif /* EFSYS_OPT_NVRAM */
|
|
|
|
|
|
/* PHY */
|
|
|
|
typedef struct ef10_link_state_s {
|
|
uint32_t els_adv_cap_mask;
|
|
uint32_t els_lp_cap_mask;
|
|
unsigned int els_fcntl;
|
|
efx_link_mode_t els_link_mode;
|
|
#if EFSYS_OPT_LOOPBACK
|
|
efx_loopback_type_t els_loopback;
|
|
#endif
|
|
boolean_t els_mac_up;
|
|
} ef10_link_state_t;
|
|
|
|
extern void
|
|
ef10_phy_link_ev(
|
|
__in efx_nic_t *enp,
|
|
__in efx_qword_t *eqp,
|
|
__out efx_link_mode_t *link_modep);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_phy_get_link(
|
|
__in efx_nic_t *enp,
|
|
__out ef10_link_state_t *elsp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_phy_power(
|
|
__in efx_nic_t *enp,
|
|
__in boolean_t on);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_phy_reconfigure(
|
|
__in efx_nic_t *enp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_phy_verify(
|
|
__in efx_nic_t *enp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_phy_oui_get(
|
|
__in efx_nic_t *enp,
|
|
__out uint32_t *ouip);
|
|
|
|
#if EFSYS_OPT_PHY_STATS
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_phy_stats_update(
|
|
__in efx_nic_t *enp,
|
|
__in efsys_mem_t *esmp,
|
|
__inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
|
|
|
|
#endif /* EFSYS_OPT_PHY_STATS */
|
|
|
|
#if EFSYS_OPT_PHY_PROPS
|
|
|
|
#if EFSYS_OPT_NAMES
|
|
|
|
extern const char *
|
|
ef10_phy_prop_name(
|
|
__in efx_nic_t *enp,
|
|
__in unsigned int id);
|
|
|
|
#endif /* EFSYS_OPT_NAMES */
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_phy_prop_get(
|
|
__in efx_nic_t *enp,
|
|
__in unsigned int id,
|
|
__in uint32_t flags,
|
|
__out uint32_t *valp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_phy_prop_set(
|
|
__in efx_nic_t *enp,
|
|
__in unsigned int id,
|
|
__in uint32_t val);
|
|
|
|
#endif /* EFSYS_OPT_PHY_PROPS */
|
|
|
|
#if EFSYS_OPT_BIST
|
|
|
|
extern __checkReturn efx_rc_t
|
|
hunt_bist_enable_offline(
|
|
__in efx_nic_t *enp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
hunt_bist_start(
|
|
__in efx_nic_t *enp,
|
|
__in efx_bist_type_t type);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
hunt_bist_poll(
|
|
__in efx_nic_t *enp,
|
|
__in efx_bist_type_t type,
|
|
__out efx_bist_result_t *resultp,
|
|
__out_opt __drv_when(count > 0, __notnull)
|
|
uint32_t *value_maskp,
|
|
__out_ecount_opt(count) __drv_when(count > 0, __notnull)
|
|
unsigned long *valuesp,
|
|
__in size_t count);
|
|
|
|
extern void
|
|
hunt_bist_stop(
|
|
__in efx_nic_t *enp,
|
|
__in efx_bist_type_t type);
|
|
|
|
#endif /* EFSYS_OPT_BIST */
|
|
|
|
|
|
/* TX */
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_tx_init(
|
|
__in efx_nic_t *enp);
|
|
|
|
extern void
|
|
ef10_tx_fini(
|
|
__in efx_nic_t *enp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_tx_qcreate(
|
|
__in efx_nic_t *enp,
|
|
__in unsigned int index,
|
|
__in unsigned int label,
|
|
__in efsys_mem_t *esmp,
|
|
__in size_t n,
|
|
__in uint32_t id,
|
|
__in uint16_t flags,
|
|
__in efx_evq_t *eep,
|
|
__in efx_txq_t *etp,
|
|
__out unsigned int *addedp);
|
|
|
|
extern void
|
|
ef10_tx_qdestroy(
|
|
__in efx_txq_t *etp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_tx_qpost(
|
|
__in efx_txq_t *etp,
|
|
__in_ecount(n) efx_buffer_t *eb,
|
|
__in unsigned int n,
|
|
__in unsigned int completed,
|
|
__inout unsigned int *addedp);
|
|
|
|
extern void
|
|
ef10_tx_qpush(
|
|
__in efx_txq_t *etp,
|
|
__in unsigned int added,
|
|
__in unsigned int pushed);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_tx_qpace(
|
|
__in efx_txq_t *etp,
|
|
__in unsigned int ns);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_tx_qflush(
|
|
__in efx_txq_t *etp);
|
|
|
|
extern void
|
|
ef10_tx_qenable(
|
|
__in efx_txq_t *etp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_tx_qpio_enable(
|
|
__in efx_txq_t *etp);
|
|
|
|
extern void
|
|
ef10_tx_qpio_disable(
|
|
__in efx_txq_t *etp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_tx_qpio_write(
|
|
__in efx_txq_t *etp,
|
|
__in_ecount(buf_length) uint8_t *buffer,
|
|
__in size_t buf_length,
|
|
__in size_t pio_buf_offset);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_tx_qpio_post(
|
|
__in efx_txq_t *etp,
|
|
__in size_t pkt_length,
|
|
__in unsigned int completed,
|
|
__inout unsigned int *addedp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_tx_qdesc_post(
|
|
__in efx_txq_t *etp,
|
|
__in_ecount(n) efx_desc_t *ed,
|
|
__in unsigned int n,
|
|
__in unsigned int completed,
|
|
__inout unsigned int *addedp);
|
|
|
|
extern void
|
|
ef10_tx_qdesc_dma_create(
|
|
__in efx_txq_t *etp,
|
|
__in efsys_dma_addr_t addr,
|
|
__in size_t size,
|
|
__in boolean_t eop,
|
|
__out efx_desc_t *edp);
|
|
|
|
extern void
|
|
hunt_tx_qdesc_tso_create(
|
|
__in efx_txq_t *etp,
|
|
__in uint16_t ipv4_id,
|
|
__in uint32_t tcp_seq,
|
|
__in uint8_t tcp_flags,
|
|
__out efx_desc_t *edp);
|
|
|
|
extern void
|
|
ef10_tx_qdesc_tso2_create(
|
|
__in efx_txq_t *etp,
|
|
__in uint16_t ipv4_id,
|
|
__in uint32_t tcp_seq,
|
|
__in uint16_t tcp_mss,
|
|
__out_ecount(count) efx_desc_t *edp,
|
|
__in int count);
|
|
|
|
extern void
|
|
ef10_tx_qdesc_vlantci_create(
|
|
__in efx_txq_t *etp,
|
|
__in uint16_t vlan_tci,
|
|
__out efx_desc_t *edp);
|
|
|
|
|
|
#if EFSYS_OPT_QSTATS
|
|
|
|
extern void
|
|
ef10_tx_qstats_update(
|
|
__in efx_txq_t *etp,
|
|
__inout_ecount(TX_NQSTATS) efsys_stat_t *stat);
|
|
|
|
#endif /* EFSYS_OPT_QSTATS */
|
|
|
|
/* PIO */
|
|
|
|
/* Missing register definitions */
|
|
#ifndef ER_DZ_TX_PIOBUF_OFST
|
|
#define ER_DZ_TX_PIOBUF_OFST 0x00001000
|
|
#endif
|
|
#ifndef ER_DZ_TX_PIOBUF_STEP
|
|
#define ER_DZ_TX_PIOBUF_STEP 8192
|
|
#endif
|
|
#ifndef ER_DZ_TX_PIOBUF_ROWS
|
|
#define ER_DZ_TX_PIOBUF_ROWS 2048
|
|
#endif
|
|
|
|
#ifndef ER_DZ_TX_PIOBUF_SIZE
|
|
#define ER_DZ_TX_PIOBUF_SIZE 2048
|
|
#endif
|
|
|
|
#define HUNT_PIOBUF_NBUFS (16)
|
|
#define HUNT_PIOBUF_SIZE (ER_DZ_TX_PIOBUF_SIZE)
|
|
|
|
#define HUNT_MIN_PIO_ALLOC_SIZE (HUNT_PIOBUF_SIZE / 32)
|
|
|
|
#define EF10_LEGACY_PF_PRIVILEGE_MASK \
|
|
(MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN | \
|
|
MC_CMD_PRIVILEGE_MASK_IN_GRP_LINK | \
|
|
MC_CMD_PRIVILEGE_MASK_IN_GRP_ONLOAD | \
|
|
MC_CMD_PRIVILEGE_MASK_IN_GRP_PTP | \
|
|
MC_CMD_PRIVILEGE_MASK_IN_GRP_INSECURE_FILTERS | \
|
|
MC_CMD_PRIVILEGE_MASK_IN_GRP_MAC_SPOOFING | \
|
|
MC_CMD_PRIVILEGE_MASK_IN_GRP_UNICAST | \
|
|
MC_CMD_PRIVILEGE_MASK_IN_GRP_MULTICAST | \
|
|
MC_CMD_PRIVILEGE_MASK_IN_GRP_BROADCAST | \
|
|
MC_CMD_PRIVILEGE_MASK_IN_GRP_ALL_MULTICAST | \
|
|
MC_CMD_PRIVILEGE_MASK_IN_GRP_PROMISCUOUS)
|
|
|
|
#define EF10_LEGACY_VF_PRIVILEGE_MASK 0
|
|
|
|
typedef uint32_t efx_piobuf_handle_t;
|
|
|
|
#define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1)
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_nic_pio_alloc(
|
|
__inout efx_nic_t *enp,
|
|
__out uint32_t *bufnump,
|
|
__out efx_piobuf_handle_t *handlep,
|
|
__out uint32_t *blknump,
|
|
__out uint32_t *offsetp,
|
|
__out size_t *sizep);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_nic_pio_free(
|
|
__inout efx_nic_t *enp,
|
|
__in uint32_t bufnum,
|
|
__in uint32_t blknum);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_nic_pio_link(
|
|
__inout efx_nic_t *enp,
|
|
__in uint32_t vi_index,
|
|
__in efx_piobuf_handle_t handle);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_nic_pio_unlink(
|
|
__inout efx_nic_t *enp,
|
|
__in uint32_t vi_index);
|
|
|
|
|
|
/* VPD */
|
|
|
|
#if EFSYS_OPT_VPD
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_vpd_init(
|
|
__in efx_nic_t *enp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_vpd_size(
|
|
__in efx_nic_t *enp,
|
|
__out size_t *sizep);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_vpd_read(
|
|
__in efx_nic_t *enp,
|
|
__out_bcount(size) caddr_t data,
|
|
__in size_t size);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_vpd_verify(
|
|
__in efx_nic_t *enp,
|
|
__in_bcount(size) caddr_t data,
|
|
__in size_t size);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_vpd_reinit(
|
|
__in efx_nic_t *enp,
|
|
__in_bcount(size) caddr_t data,
|
|
__in size_t size);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_vpd_get(
|
|
__in efx_nic_t *enp,
|
|
__in_bcount(size) caddr_t data,
|
|
__in size_t size,
|
|
__inout efx_vpd_value_t *evvp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_vpd_set(
|
|
__in efx_nic_t *enp,
|
|
__in_bcount(size) caddr_t data,
|
|
__in size_t size,
|
|
__in efx_vpd_value_t *evvp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_vpd_next(
|
|
__in efx_nic_t *enp,
|
|
__in_bcount(size) caddr_t data,
|
|
__in size_t size,
|
|
__out efx_vpd_value_t *evvp,
|
|
__inout unsigned int *contp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_vpd_write(
|
|
__in efx_nic_t *enp,
|
|
__in_bcount(size) caddr_t data,
|
|
__in size_t size);
|
|
|
|
extern void
|
|
ef10_vpd_fini(
|
|
__in efx_nic_t *enp);
|
|
|
|
#endif /* EFSYS_OPT_VPD */
|
|
|
|
|
|
/* RX */
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_rx_init(
|
|
__in efx_nic_t *enp);
|
|
|
|
#if EFSYS_OPT_RX_SCATTER
|
|
extern __checkReturn efx_rc_t
|
|
ef10_rx_scatter_enable(
|
|
__in efx_nic_t *enp,
|
|
__in unsigned int buf_size);
|
|
#endif /* EFSYS_OPT_RX_SCATTER */
|
|
|
|
|
|
#if EFSYS_OPT_RX_SCALE
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_rx_scale_mode_set(
|
|
__in efx_nic_t *enp,
|
|
__in efx_rx_hash_alg_t alg,
|
|
__in efx_rx_hash_type_t type,
|
|
__in boolean_t insert);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_rx_scale_key_set(
|
|
__in efx_nic_t *enp,
|
|
__in_ecount(n) uint8_t *key,
|
|
__in size_t n);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_rx_scale_tbl_set(
|
|
__in efx_nic_t *enp,
|
|
__in_ecount(n) unsigned int *table,
|
|
__in size_t n);
|
|
|
|
extern __checkReturn uint32_t
|
|
ef10_rx_prefix_hash(
|
|
__in efx_nic_t *enp,
|
|
__in efx_rx_hash_alg_t func,
|
|
__in uint8_t *buffer);
|
|
|
|
#endif /* EFSYS_OPT_RX_SCALE */
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_rx_prefix_pktlen(
|
|
__in efx_nic_t *enp,
|
|
__in uint8_t *buffer,
|
|
__out uint16_t *lengthp);
|
|
|
|
extern void
|
|
ef10_rx_qpost(
|
|
__in efx_rxq_t *erp,
|
|
__in_ecount(n) efsys_dma_addr_t *addrp,
|
|
__in size_t size,
|
|
__in unsigned int n,
|
|
__in unsigned int completed,
|
|
__in unsigned int added);
|
|
|
|
extern void
|
|
ef10_rx_qpush(
|
|
__in efx_rxq_t *erp,
|
|
__in unsigned int added,
|
|
__inout unsigned int *pushedp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_rx_qflush(
|
|
__in efx_rxq_t *erp);
|
|
|
|
extern void
|
|
ef10_rx_qenable(
|
|
__in efx_rxq_t *erp);
|
|
|
|
extern __checkReturn efx_rc_t
|
|
ef10_rx_qcreate(
|
|
__in efx_nic_t *enp,
|
|
__in unsigned int index,
|
|
__in unsigned int label,
|
|
__in efx_rxq_type_t type,
|
|
__in efsys_mem_t *esmp,
|
|
__in size_t n,
|
|
__in uint32_t id,
|
|
__in efx_evq_t *eep,
|
|
__in efx_rxq_t *erp);
|
|
|
|
extern void
|
|
ef10_rx_qdestroy(
|
|
__in efx_rxq_t *erp);
|
|
|
|
extern void
|
|
ef10_rx_fini(
|
|
__in efx_nic_t *enp);
|
|
|
|
#if EFSYS_OPT_FILTER
|
|
|
|
typedef struct ef10_filter_handle_s {
|
|
uint32_t efh_lo;
|
|
uint32_t efh_hi;
|
|
} ef10_filter_handle_t;
|
|
|
|
typedef struct ef10_filter_entry_s {
|
|
uintptr_t efe_spec; /* pointer to filter spec plus busy bit */
|
|
ef10_filter_handle_t efe_handle;
|
|
} ef10_filter_entry_t;
|
|
|
|
/*
|
|
* BUSY flag indicates that an update is in progress.
|
|
* AUTO_OLD flag is used to mark and sweep MAC packet filters.
|
|
*/
|
|
#define EFX_EF10_FILTER_FLAG_BUSY 1U
|
|
#define EFX_EF10_FILTER_FLAG_AUTO_OLD 2U
|
|
#define EFX_EF10_FILTER_FLAGS 3U
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/*
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* Size of the hash table used by the driver. Doesn't need to be the
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* same size as the hardware's table.
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*/
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#define EFX_EF10_FILTER_TBL_ROWS 8192
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/* Only need to allow for one directed and one unknown unicast filter */
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#define EFX_EF10_FILTER_UNICAST_FILTERS_MAX 2
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/* Allow for the broadcast address to be added to the multicast list */
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#define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1)
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typedef struct ef10_filter_table_s {
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ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS];
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efx_rxq_t * eft_default_rxq;
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boolean_t eft_using_rss;
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uint32_t eft_unicst_filter_indexes[
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EFX_EF10_FILTER_UNICAST_FILTERS_MAX];
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boolean_t eft_unicst_filter_count;
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uint32_t eft_mulcst_filter_indexes[
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EFX_EF10_FILTER_MULTICAST_FILTERS_MAX];
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uint32_t eft_mulcst_filter_count;
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boolean_t eft_using_all_mulcst;
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} ef10_filter_table_t;
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__checkReturn efx_rc_t
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ef10_filter_init(
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__in efx_nic_t *enp);
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void
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ef10_filter_fini(
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__in efx_nic_t *enp);
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__checkReturn efx_rc_t
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ef10_filter_restore(
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__in efx_nic_t *enp);
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__checkReturn efx_rc_t
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ef10_filter_add(
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__in efx_nic_t *enp,
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__inout efx_filter_spec_t *spec,
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__in boolean_t may_replace);
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__checkReturn efx_rc_t
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ef10_filter_delete(
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__in efx_nic_t *enp,
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__inout efx_filter_spec_t *spec);
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extern __checkReturn efx_rc_t
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ef10_filter_supported_filters(
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__in efx_nic_t *enp,
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__out uint32_t *list,
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__out size_t *length);
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extern __checkReturn efx_rc_t
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ef10_filter_reconfigure(
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__in efx_nic_t *enp,
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__in_ecount(6) uint8_t const *mac_addr,
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__in boolean_t all_unicst,
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__in boolean_t mulcst,
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__in boolean_t all_mulcst,
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__in boolean_t brdcst,
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__in_ecount(6*count) uint8_t const *addrs,
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__in uint32_t count);
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extern void
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ef10_filter_get_default_rxq(
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__in efx_nic_t *enp,
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__out efx_rxq_t **erpp,
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__out boolean_t *using_rss);
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extern void
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ef10_filter_default_rxq_set(
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__in efx_nic_t *enp,
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__in efx_rxq_t *erp,
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__in boolean_t using_rss);
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extern void
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ef10_filter_default_rxq_clear(
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__in efx_nic_t *enp);
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#endif /* EFSYS_OPT_FILTER */
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extern __checkReturn efx_rc_t
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efx_mcdi_get_function_info(
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__in efx_nic_t *enp,
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__out uint32_t *pfp,
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__out_opt uint32_t *vfp);
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extern __checkReturn efx_rc_t
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efx_mcdi_privilege_mask(
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__in efx_nic_t *enp,
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__in uint32_t pf,
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__in uint32_t vf,
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__out uint32_t *maskp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SYS_HUNT_IMPL_H */
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