fed20d2081
cycle mode as timecounter just works fine. My best guess is that a firmware update has fixed this, check at run-time whether it advances and use a positive quality if it does. The latter will cause this timecounter to be used instead of the tick counter based one, which just sucks for SMP. - Remove a redundant NULL assignment from the timecounter initialization. |
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.. | ||
apb.c | ||
fire.c | ||
firereg.h | ||
firevar.h | ||
ofw_pci_if.m | ||
ofw_pci.h | ||
ofw_pcib_subr.c | ||
ofw_pcib_subr.h | ||
ofw_pcib.c | ||
ofw_pcibus.c | ||
psycho.c | ||
psychoreg.h | ||
psychovar.h | ||
sbbc.c | ||
schizo.c | ||
schizoreg.h | ||
schizovar.h |