8cc6cc81dd
Copy sys/dev/rmi to sys/mips/rmi/dev [sic]. For devices that are on only one SoC, or family of SoC, we place them under sys/<vendor>/dev. I'll fix the build problems this causes as best I can since rmi kernel require external toolchains due to lack of support for rmi op-codes in the ancient binutils we have in the tree.
54 lines
2.2 KiB
C
54 lines
2.2 KiB
C
/*-
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* Copyright (c) 2003-2009 RMI Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of RMI Corporation, nor the names of its contributors,
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RMI_BSD */
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#ifndef _RMI_ATX_CPLD_H_
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#define _RMI_ATX_CPLD_H_
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/*
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* bit_0 : xgs0 phy reset, bit_1 : xgs1 phy reset, bit_2 : HT reset, bit_3 :
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* RTC reset, bit_4 : gmac phy soft reset, bit_5 : gmac phy hard reset, bit_6
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* : board reset, bit_7 : reserved
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*/
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#define ATX_CPLD_RESET_1 2
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/*
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* bit_0_2 : reserved, bit_3 : turn off xpak_0 tx, bit_4 : turn off xpak_1
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* tx, bit_5 : HT stop (active low), bit_6 : flash program enable, bit_7 :
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* compact flash io mode
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*/
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#define ATX_CPLD_MISC_CTRL 8
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/*
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* bit_0 : reset tcam, bit_1 : reset xpak_0 module, bit_2 : reset xpak_1
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* module, bit_3_7 : reserved
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*/
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#define ATX_CPLD_RESET_2 9
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#endif /* _RMI_ATX_CPLD_H_ */
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