2002-04-27 20:47:57 +00:00
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/* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*-
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* Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
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*
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* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Rickard E. (Rik) Faith <faith@valinux.com>
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* Jeff Hartmann <jhartmann@valinux.com>
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2003-03-09 02:08:30 +00:00
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* Keith Whitwell <keith@tungstengraphics.com>
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2002-04-27 20:47:57 +00:00
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*
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* Rewritten by:
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* Gareth Hughes <gareth@valinux.com>
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*
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* $FreeBSD$
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*/
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#include "dev/drm/mga.h"
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#include "dev/drm/drmP.h"
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2003-03-09 02:08:30 +00:00
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#include "dev/drm/drm.h"
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2002-04-29 18:18:42 +00:00
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#include "dev/drm/mga_drm.h"
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2002-04-27 20:47:57 +00:00
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#include "dev/drm/mga_drv.h"
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#define MGA_DEFAULT_USEC_TIMEOUT 10000
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#define MGA_FREELIST_DEBUG 0
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/* ================================================================
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* Engine control
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*/
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int mga_do_wait_for_idle( drm_mga_private_t *dev_priv )
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{
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u32 status = 0;
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int i;
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2003-03-09 02:08:30 +00:00
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DRM_DEBUG( "\n" );
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2002-04-27 20:47:57 +00:00
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for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
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status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
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if ( status == MGA_ENDPRDMASTS ) {
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MGA_WRITE8( MGA_CRTC_INDEX, 0 );
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return 0;
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}
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2003-03-09 02:08:30 +00:00
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DRM_UDELAY( 1 );
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2002-04-27 20:47:57 +00:00
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}
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#if MGA_DMA_DEBUG
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DRM_ERROR( "failed!\n" );
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DRM_INFO( " status=0x%08x\n", status );
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#endif
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2003-03-09 02:08:30 +00:00
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return DRM_ERR(EBUSY);
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2002-04-27 20:47:57 +00:00
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}
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int mga_do_dma_idle( drm_mga_private_t *dev_priv )
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{
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u32 status = 0;
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int i;
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2003-03-09 02:08:30 +00:00
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DRM_DEBUG( "\n" );
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2002-04-27 20:47:57 +00:00
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for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
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status = MGA_READ( MGA_STATUS ) & MGA_DMA_IDLE_MASK;
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if ( status == MGA_ENDPRDMASTS ) return 0;
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2003-03-09 02:08:30 +00:00
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DRM_UDELAY( 1 );
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2002-04-27 20:47:57 +00:00
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}
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#if MGA_DMA_DEBUG
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DRM_ERROR( "failed! status=0x%08x\n", status );
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#endif
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2003-03-09 02:08:30 +00:00
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return DRM_ERR(EBUSY);
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2002-04-27 20:47:57 +00:00
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}
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int mga_do_dma_reset( drm_mga_private_t *dev_priv )
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{
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drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
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drm_mga_primary_buffer_t *primary = &dev_priv->prim;
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2003-03-09 02:08:30 +00:00
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DRM_DEBUG( "\n" );
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2002-04-27 20:47:57 +00:00
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/* The primary DMA stream should look like new right about now.
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*/
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primary->tail = 0;
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primary->space = primary->size;
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primary->last_flush = 0;
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sarea_priv->last_wrap = 0;
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/* FIXME: Reset counters, buffer ages etc...
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*/
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/* FIXME: What else do we need to reinitialize? WARP stuff?
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*/
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return 0;
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}
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int mga_do_engine_reset( drm_mga_private_t *dev_priv )
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{
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2003-03-09 02:08:30 +00:00
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DRM_DEBUG( "\n" );
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2002-04-27 20:47:57 +00:00
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/* Okay, so we've completely screwed up and locked the engine.
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* How about we clean up after ourselves?
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*/
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MGA_WRITE( MGA_RST, MGA_SOFTRESET );
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2003-03-09 02:08:30 +00:00
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DRM_UDELAY( 15 ); /* Wait at least 10 usecs */
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2002-04-27 20:47:57 +00:00
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MGA_WRITE( MGA_RST, 0 );
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/* Initialize the registers that get clobbered by the soft
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* reset. Many of the core register values survive a reset,
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* but the drawing registers are basically all gone.
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*
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* 3D clients should probably die after calling this. The X
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* server should reset the engine state to known values.
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*/
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#if 0
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MGA_WRITE( MGA_PRIMPTR,
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virt_to_bus((void *)dev_priv->prim.status_page) |
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MGA_PRIMPTREN0 |
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MGA_PRIMPTREN1 );
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#endif
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MGA_WRITE( MGA_ICLEAR, MGA_SOFTRAPICLR );
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MGA_WRITE( MGA_IEN, MGA_SOFTRAPIEN );
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/* The primary DMA stream should look like new right about now.
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*/
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mga_do_dma_reset( dev_priv );
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/* This bad boy will never fail.
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*/
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return 0;
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}
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/* ================================================================
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* Primary DMA stream
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*/
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void mga_do_dma_flush( drm_mga_private_t *dev_priv )
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{
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drm_mga_primary_buffer_t *primary = &dev_priv->prim;
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u32 head, tail;
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2003-03-09 02:08:30 +00:00
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u32 status = 0;
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int i;
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DMA_LOCALS;
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DRM_DEBUG( "\n" );
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/* We need to wait so that we can do an safe flush */
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for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
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status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
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if ( status == MGA_ENDPRDMASTS ) break;
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DRM_UDELAY( 1 );
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}
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2002-04-27 20:47:57 +00:00
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if ( primary->tail == primary->last_flush ) {
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DRM_DEBUG( " bailing out...\n" );
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return;
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}
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tail = primary->tail + dev_priv->primary->offset;
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/* We need to pad the stream between flushes, as the card
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* actually (partially?) reads the first of these commands.
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* See page 4-16 in the G400 manual, middle of the page or so.
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*/
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BEGIN_DMA( 1 );
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DMA_BLOCK( MGA_DMAPAD, 0x00000000,
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MGA_DMAPAD, 0x00000000,
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MGA_DMAPAD, 0x00000000,
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MGA_DMAPAD, 0x00000000 );
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ADVANCE_DMA();
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primary->last_flush = primary->tail;
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head = MGA_READ( MGA_PRIMADDRESS );
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if ( head <= tail ) {
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primary->space = primary->size - primary->tail;
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} else {
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primary->space = head - tail;
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}
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DRM_DEBUG( " head = 0x%06lx\n", head - dev_priv->primary->offset );
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DRM_DEBUG( " tail = 0x%06lx\n", tail - dev_priv->primary->offset );
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DRM_DEBUG( " space = 0x%06x\n", primary->space );
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mga_flush_write_combine();
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MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
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2003-03-09 02:08:30 +00:00
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DRM_DEBUG( "done.\n" );
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2002-04-27 20:47:57 +00:00
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}
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void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv )
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{
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drm_mga_primary_buffer_t *primary = &dev_priv->prim;
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u32 head, tail;
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DMA_LOCALS;
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2003-03-09 02:08:30 +00:00
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DRM_DEBUG( "\n" );
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2002-04-27 20:47:57 +00:00
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BEGIN_DMA_WRAP();
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DMA_BLOCK( MGA_DMAPAD, 0x00000000,
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MGA_DMAPAD, 0x00000000,
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MGA_DMAPAD, 0x00000000,
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MGA_DMAPAD, 0x00000000 );
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ADVANCE_DMA();
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tail = primary->tail + dev_priv->primary->offset;
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primary->tail = 0;
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primary->last_flush = 0;
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primary->last_wrap++;
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head = MGA_READ( MGA_PRIMADDRESS );
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if ( head == dev_priv->primary->offset ) {
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primary->space = primary->size;
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} else {
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primary->space = head - dev_priv->primary->offset;
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}
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DRM_DEBUG( " head = 0x%06lx\n",
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head - dev_priv->primary->offset );
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DRM_DEBUG( " tail = 0x%06x\n", primary->tail );
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DRM_DEBUG( " wrap = %d\n", primary->last_wrap );
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DRM_DEBUG( " space = 0x%06x\n", primary->space );
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mga_flush_write_combine();
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MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
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set_bit( 0, &primary->wrapped );
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2003-03-09 02:08:30 +00:00
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DRM_DEBUG( "done.\n" );
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2002-04-27 20:47:57 +00:00
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}
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void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv )
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{
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drm_mga_primary_buffer_t *primary = &dev_priv->prim;
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drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
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u32 head = dev_priv->primary->offset;
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2003-03-09 02:08:30 +00:00
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DRM_DEBUG( "\n" );
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2002-04-27 20:47:57 +00:00
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sarea_priv->last_wrap++;
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DRM_DEBUG( " wrap = %d\n", sarea_priv->last_wrap );
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mga_flush_write_combine();
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MGA_WRITE( MGA_PRIMADDRESS, head | MGA_DMA_GENERAL );
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clear_bit( 0, &primary->wrapped );
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2003-03-09 02:08:30 +00:00
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DRM_DEBUG( "done.\n" );
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2002-04-27 20:47:57 +00:00
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}
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/* ================================================================
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* Freelist management
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*/
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#define MGA_BUFFER_USED ~0
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#define MGA_BUFFER_FREE 0
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#if MGA_FREELIST_DEBUG
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static void mga_freelist_print( drm_device_t *dev )
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{
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drm_mga_private_t *dev_priv = dev->dev_private;
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drm_mga_freelist_t *entry;
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DRM_INFO( "\n" );
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DRM_INFO( "current dispatch: last=0x%x done=0x%x\n",
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dev_priv->sarea_priv->last_dispatch,
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(unsigned int)(MGA_READ( MGA_PRIMADDRESS ) -
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dev_priv->primary->offset) );
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DRM_INFO( "current freelist:\n" );
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for ( entry = dev_priv->head->next ; entry ; entry = entry->next ) {
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DRM_INFO( " %p idx=%2d age=0x%x 0x%06lx\n",
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entry, entry->buf->idx, entry->age.head,
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entry->age.head - dev_priv->primary->offset );
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}
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DRM_INFO( "\n" );
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}
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#endif
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static int mga_freelist_init( drm_device_t *dev, drm_mga_private_t *dev_priv )
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{
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drm_device_dma_t *dma = dev->dma;
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drm_buf_t *buf;
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drm_mga_buf_priv_t *buf_priv;
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drm_mga_freelist_t *entry;
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int i;
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2003-03-09 02:08:30 +00:00
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DRM_DEBUG( "count=%d\n", dma->buf_count );
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2002-04-27 20:47:57 +00:00
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dev_priv->head = DRM(alloc)( sizeof(drm_mga_freelist_t),
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DRM_MEM_DRIVER );
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if ( dev_priv->head == NULL )
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2003-03-09 02:08:30 +00:00
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return DRM_ERR(ENOMEM);
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2002-04-27 20:47:57 +00:00
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memset( dev_priv->head, 0, sizeof(drm_mga_freelist_t) );
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SET_AGE( &dev_priv->head->age, MGA_BUFFER_USED, 0 );
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for ( i = 0 ; i < dma->buf_count ; i++ ) {
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buf = dma->buflist[i];
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buf_priv = buf->dev_private;
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entry = DRM(alloc)( sizeof(drm_mga_freelist_t),
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DRM_MEM_DRIVER );
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if ( entry == NULL )
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2003-03-09 02:08:30 +00:00
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return DRM_ERR(ENOMEM);
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2002-04-27 20:47:57 +00:00
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memset( entry, 0, sizeof(drm_mga_freelist_t) );
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entry->next = dev_priv->head->next;
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entry->prev = dev_priv->head;
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SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
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entry->buf = buf;
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if ( dev_priv->head->next != NULL )
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|
|
dev_priv->head->next->prev = entry;
|
|
|
|
if ( entry->next == NULL )
|
|
|
|
dev_priv->tail = entry;
|
|
|
|
|
|
|
|
buf_priv->list_entry = entry;
|
|
|
|
buf_priv->discard = 0;
|
|
|
|
buf_priv->dispatched = 0;
|
|
|
|
|
|
|
|
dev_priv->head->next = entry;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mga_freelist_cleanup( drm_device_t *dev )
|
|
|
|
{
|
|
|
|
drm_mga_private_t *dev_priv = dev->dev_private;
|
|
|
|
drm_mga_freelist_t *entry;
|
|
|
|
drm_mga_freelist_t *next;
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_DEBUG( "\n" );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
|
|
|
entry = dev_priv->head;
|
|
|
|
while ( entry ) {
|
|
|
|
next = entry->next;
|
|
|
|
DRM(free)( entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER );
|
|
|
|
entry = next;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_priv->head = dev_priv->tail = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
/* FIXME: Still needed?
|
|
|
|
*/
|
|
|
|
static void mga_freelist_reset( drm_device_t *dev )
|
|
|
|
{
|
|
|
|
drm_device_dma_t *dma = dev->dma;
|
|
|
|
drm_buf_t *buf;
|
|
|
|
drm_mga_buf_priv_t *buf_priv;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for ( i = 0 ; i < dma->buf_count ; i++ ) {
|
|
|
|
buf = dma->buflist[i];
|
|
|
|
buf_priv = buf->dev_private;
|
|
|
|
SET_AGE( &buf_priv->list_entry->age,
|
|
|
|
MGA_BUFFER_FREE, 0 );
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static drm_buf_t *mga_freelist_get( drm_device_t *dev )
|
|
|
|
{
|
|
|
|
drm_mga_private_t *dev_priv = dev->dev_private;
|
|
|
|
drm_mga_freelist_t *next;
|
|
|
|
drm_mga_freelist_t *prev;
|
|
|
|
drm_mga_freelist_t *tail = dev_priv->tail;
|
|
|
|
u32 head, wrap;
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_DEBUG( "\n" );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
|
|
|
head = MGA_READ( MGA_PRIMADDRESS );
|
|
|
|
wrap = dev_priv->sarea_priv->last_wrap;
|
|
|
|
|
|
|
|
DRM_DEBUG( " tail=0x%06lx %d\n",
|
|
|
|
tail->age.head ?
|
|
|
|
tail->age.head - dev_priv->primary->offset : 0,
|
|
|
|
tail->age.wrap );
|
|
|
|
DRM_DEBUG( " head=0x%06lx %d\n",
|
|
|
|
head - dev_priv->primary->offset, wrap );
|
|
|
|
|
|
|
|
if ( TEST_AGE( &tail->age, head, wrap ) ) {
|
|
|
|
prev = dev_priv->tail->prev;
|
|
|
|
next = dev_priv->tail;
|
|
|
|
prev->next = NULL;
|
|
|
|
next->prev = next->next = NULL;
|
|
|
|
dev_priv->tail = prev;
|
|
|
|
SET_AGE( &next->age, MGA_BUFFER_USED, 0 );
|
|
|
|
return next->buf;
|
|
|
|
}
|
|
|
|
|
|
|
|
DRM_DEBUG( "returning NULL!\n" );
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf )
|
|
|
|
{
|
|
|
|
drm_mga_private_t *dev_priv = dev->dev_private;
|
|
|
|
drm_mga_buf_priv_t *buf_priv = buf->dev_private;
|
|
|
|
drm_mga_freelist_t *head, *entry, *prev;
|
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_DEBUG( "age=0x%06lx wrap=%d\n",
|
2002-04-27 20:47:57 +00:00
|
|
|
buf_priv->list_entry->age.head -
|
|
|
|
dev_priv->primary->offset,
|
|
|
|
buf_priv->list_entry->age.wrap );
|
|
|
|
|
|
|
|
entry = buf_priv->list_entry;
|
|
|
|
head = dev_priv->head;
|
|
|
|
|
|
|
|
if ( buf_priv->list_entry->age.head == MGA_BUFFER_USED ) {
|
|
|
|
SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
|
|
|
|
prev = dev_priv->tail;
|
|
|
|
prev->next = entry;
|
|
|
|
entry->prev = prev;
|
|
|
|
entry->next = NULL;
|
|
|
|
} else {
|
|
|
|
prev = head->next;
|
|
|
|
head->next = entry;
|
|
|
|
prev->prev = entry;
|
|
|
|
entry->prev = head;
|
|
|
|
entry->next = prev;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* ================================================================
|
|
|
|
* DMA initialization, cleanup
|
|
|
|
*/
|
|
|
|
|
|
|
|
static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
|
|
|
|
{
|
|
|
|
drm_mga_private_t *dev_priv;
|
|
|
|
int ret;
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_DEBUG( "\n" );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
|
|
|
dev_priv = DRM(alloc)( sizeof(drm_mga_private_t), DRM_MEM_DRIVER );
|
|
|
|
if ( !dev_priv )
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(ENOMEM);
|
2002-04-27 20:47:57 +00:00
|
|
|
|
|
|
|
memset( dev_priv, 0, sizeof(drm_mga_private_t) );
|
|
|
|
|
|
|
|
dev_priv->chipset = init->chipset;
|
|
|
|
|
|
|
|
dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT;
|
|
|
|
|
|
|
|
if ( init->sgram ) {
|
|
|
|
dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
|
|
|
|
} else {
|
|
|
|
dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
|
|
|
|
}
|
|
|
|
dev_priv->maccess = init->maccess;
|
|
|
|
|
|
|
|
dev_priv->fb_cpp = init->fb_cpp;
|
|
|
|
dev_priv->front_offset = init->front_offset;
|
|
|
|
dev_priv->front_pitch = init->front_pitch;
|
|
|
|
dev_priv->back_offset = init->back_offset;
|
|
|
|
dev_priv->back_pitch = init->back_pitch;
|
|
|
|
|
|
|
|
dev_priv->depth_cpp = init->depth_cpp;
|
|
|
|
dev_priv->depth_offset = init->depth_offset;
|
|
|
|
dev_priv->depth_pitch = init->depth_pitch;
|
|
|
|
|
|
|
|
/* FIXME: Need to support AGP textures...
|
|
|
|
*/
|
|
|
|
dev_priv->texture_offset = init->texture_offset[0];
|
|
|
|
dev_priv->texture_size = init->texture_size[0];
|
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_GETSAREA();
|
2002-04-27 20:47:57 +00:00
|
|
|
|
|
|
|
if(!dev_priv->sarea) {
|
|
|
|
DRM_ERROR( "failed to find sarea!\n" );
|
|
|
|
/* Assign dev_private so we can do cleanup. */
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
mga_do_cleanup_dma( dev );
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(EINVAL);
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
DRM_FIND_MAP( dev_priv->fb, init->fb_offset );
|
|
|
|
if(!dev_priv->fb) {
|
|
|
|
DRM_ERROR( "failed to find framebuffer!\n" );
|
|
|
|
/* Assign dev_private so we can do cleanup. */
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
mga_do_cleanup_dma( dev );
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(EINVAL);
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
|
|
|
|
if(!dev_priv->mmio) {
|
|
|
|
DRM_ERROR( "failed to find mmio region!\n" );
|
|
|
|
/* Assign dev_private so we can do cleanup. */
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
mga_do_cleanup_dma( dev );
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(EINVAL);
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
DRM_FIND_MAP( dev_priv->status, init->status_offset );
|
|
|
|
if(!dev_priv->status) {
|
|
|
|
DRM_ERROR( "failed to find status page!\n" );
|
|
|
|
/* Assign dev_private so we can do cleanup. */
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
mga_do_cleanup_dma( dev );
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(EINVAL);
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
2003-03-09 02:08:30 +00:00
|
|
|
|
2002-04-27 20:47:57 +00:00
|
|
|
DRM_FIND_MAP( dev_priv->warp, init->warp_offset );
|
|
|
|
if(!dev_priv->warp) {
|
|
|
|
DRM_ERROR( "failed to find warp microcode region!\n" );
|
|
|
|
/* Assign dev_private so we can do cleanup. */
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
mga_do_cleanup_dma( dev );
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(EINVAL);
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
DRM_FIND_MAP( dev_priv->primary, init->primary_offset );
|
|
|
|
if(!dev_priv->primary) {
|
|
|
|
DRM_ERROR( "failed to find primary dma region!\n" );
|
|
|
|
/* Assign dev_private so we can do cleanup. */
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
mga_do_cleanup_dma( dev );
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(EINVAL);
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
|
|
|
|
if(!dev_priv->buffers) {
|
|
|
|
DRM_ERROR( "failed to find dma buffer region!\n" );
|
|
|
|
/* Assign dev_private so we can do cleanup. */
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
mga_do_cleanup_dma( dev );
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(EINVAL);
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
dev_priv->sarea_priv =
|
|
|
|
(drm_mga_sarea_t *)((u8 *)dev_priv->sarea->handle +
|
|
|
|
init->sarea_priv_offset);
|
|
|
|
|
2003-08-19 02:57:31 +00:00
|
|
|
DRM_IOREMAP( dev_priv->warp, dev );
|
|
|
|
DRM_IOREMAP( dev_priv->primary, dev );
|
|
|
|
DRM_IOREMAP( dev_priv->buffers, dev );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
|
|
|
if(!dev_priv->warp->handle ||
|
|
|
|
!dev_priv->primary->handle ||
|
|
|
|
!dev_priv->buffers->handle ) {
|
|
|
|
DRM_ERROR( "failed to ioremap agp regions!\n" );
|
|
|
|
/* Assign dev_private so we can do cleanup. */
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
mga_do_cleanup_dma( dev );
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(ENOMEM);
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
ret = mga_warp_install_microcode( dev_priv );
|
2003-03-09 02:08:30 +00:00
|
|
|
if ( ret < 0 ) {
|
2002-04-27 20:47:57 +00:00
|
|
|
DRM_ERROR( "failed to install WARP ucode!\n" );
|
|
|
|
/* Assign dev_private so we can do cleanup. */
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
mga_do_cleanup_dma( dev );
|
2003-03-09 02:08:30 +00:00
|
|
|
return ret;
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
ret = mga_warp_init( dev_priv );
|
2003-03-09 02:08:30 +00:00
|
|
|
if ( ret < 0 ) {
|
2002-04-27 20:47:57 +00:00
|
|
|
DRM_ERROR( "failed to init WARP engine!\n" );
|
|
|
|
/* Assign dev_private so we can do cleanup. */
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
mga_do_cleanup_dma( dev );
|
2003-03-09 02:08:30 +00:00
|
|
|
return ret;
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
dev_priv->prim.status = (u32 *)dev_priv->status->handle;
|
|
|
|
|
|
|
|
mga_do_wait_for_idle( dev_priv );
|
|
|
|
|
|
|
|
/* Init the primary DMA registers.
|
|
|
|
*/
|
|
|
|
MGA_WRITE( MGA_PRIMADDRESS,
|
|
|
|
dev_priv->primary->offset | MGA_DMA_GENERAL );
|
|
|
|
#if 0
|
|
|
|
MGA_WRITE( MGA_PRIMPTR,
|
|
|
|
virt_to_bus((void *)dev_priv->prim.status) |
|
|
|
|
MGA_PRIMPTREN0 | /* Soft trap, SECEND, SETUPEND */
|
|
|
|
MGA_PRIMPTREN1 ); /* DWGSYNC */
|
|
|
|
#endif
|
|
|
|
|
|
|
|
dev_priv->prim.start = (u8 *)dev_priv->primary->handle;
|
|
|
|
dev_priv->prim.end = ((u8 *)dev_priv->primary->handle
|
|
|
|
+ dev_priv->primary->size);
|
|
|
|
dev_priv->prim.size = dev_priv->primary->size;
|
|
|
|
|
|
|
|
dev_priv->prim.tail = 0;
|
|
|
|
dev_priv->prim.space = dev_priv->prim.size;
|
|
|
|
dev_priv->prim.wrapped = 0;
|
|
|
|
|
|
|
|
dev_priv->prim.last_flush = 0;
|
|
|
|
dev_priv->prim.last_wrap = 0;
|
|
|
|
|
|
|
|
dev_priv->prim.high_mark = 256 * DMA_BLOCK_SIZE;
|
|
|
|
|
|
|
|
dev_priv->prim.status[0] = dev_priv->primary->offset;
|
|
|
|
dev_priv->prim.status[1] = 0;
|
|
|
|
|
|
|
|
dev_priv->sarea_priv->last_wrap = 0;
|
|
|
|
dev_priv->sarea_priv->last_frame.head = 0;
|
|
|
|
dev_priv->sarea_priv->last_frame.wrap = 0;
|
|
|
|
|
|
|
|
if ( mga_freelist_init( dev, dev_priv ) < 0 ) {
|
|
|
|
DRM_ERROR( "could not initialize freelist\n" );
|
|
|
|
/* Assign dev_private so we can do cleanup. */
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
mga_do_cleanup_dma( dev );
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(ENOMEM);
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Make dev_private visable to others. */
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int mga_do_cleanup_dma( drm_device_t *dev )
|
|
|
|
{
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_DEBUG( "\n" );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
2003-08-19 02:57:31 +00:00
|
|
|
#if _HAVE_DMA_IRQ
|
|
|
|
/* Make sure interrupts are disabled here because the uninstall ioctl
|
|
|
|
* may not have been called from userspace and after dev_private
|
|
|
|
* is freed, it's too late.
|
|
|
|
*/
|
|
|
|
if ( dev->irq ) DRM(irq_uninstall)(dev);
|
|
|
|
#endif
|
|
|
|
|
2002-04-27 20:47:57 +00:00
|
|
|
if ( dev->dev_private ) {
|
|
|
|
drm_mga_private_t *dev_priv = dev->dev_private;
|
|
|
|
|
2003-04-25 01:18:47 +00:00
|
|
|
if ( dev_priv->warp != NULL )
|
2003-08-19 02:57:31 +00:00
|
|
|
DRM_IOREMAPFREE( dev_priv->warp, dev );
|
2003-04-25 01:18:47 +00:00
|
|
|
if ( dev_priv->primary != NULL )
|
2003-08-19 02:57:31 +00:00
|
|
|
DRM_IOREMAPFREE( dev_priv->primary, dev );
|
2003-04-25 01:18:47 +00:00
|
|
|
if ( dev_priv->buffers != NULL )
|
2003-08-19 02:57:31 +00:00
|
|
|
DRM_IOREMAPFREE( dev_priv->buffers, dev );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
|
|
|
if ( dev_priv->head != NULL ) {
|
|
|
|
mga_freelist_cleanup( dev );
|
|
|
|
}
|
|
|
|
|
|
|
|
DRM(free)( dev->dev_private, sizeof(drm_mga_private_t),
|
|
|
|
DRM_MEM_DRIVER );
|
|
|
|
dev->dev_private = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
int mga_dma_init( DRM_IOCTL_ARGS )
|
2002-04-27 20:47:57 +00:00
|
|
|
{
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_DEVICE;
|
2002-04-27 20:47:57 +00:00
|
|
|
drm_mga_init_t init;
|
|
|
|
|
2003-08-19 02:57:31 +00:00
|
|
|
LOCK_TEST_WITH_RETURN( dev, filp );
|
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_COPY_FROM_USER_IOCTL( init, (drm_mga_init_t *)data, sizeof(init) );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
|
|
|
switch ( init.func ) {
|
|
|
|
case MGA_INIT_DMA:
|
|
|
|
return mga_do_init_dma( dev, &init );
|
|
|
|
case MGA_CLEANUP_DMA:
|
|
|
|
return mga_do_cleanup_dma( dev );
|
|
|
|
}
|
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(EINVAL);
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* ================================================================
|
|
|
|
* Primary DMA stream management
|
|
|
|
*/
|
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
int mga_dma_flush( DRM_IOCTL_ARGS )
|
2002-04-27 20:47:57 +00:00
|
|
|
{
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_DEVICE;
|
2002-04-27 20:47:57 +00:00
|
|
|
drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
|
|
|
|
drm_lock_t lock;
|
|
|
|
|
2003-04-25 01:18:47 +00:00
|
|
|
LOCK_TEST_WITH_RETURN( dev, filp );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_DEBUG( "%s%s%s\n",
|
2002-04-27 20:47:57 +00:00
|
|
|
(lock.flags & _DRM_LOCK_FLUSH) ? "flush, " : "",
|
|
|
|
(lock.flags & _DRM_LOCK_FLUSH_ALL) ? "flush all, " : "",
|
|
|
|
(lock.flags & _DRM_LOCK_QUIESCENT) ? "idle, " : "" );
|
|
|
|
|
|
|
|
WRAP_WAIT_WITH_RETURN( dev_priv );
|
|
|
|
|
|
|
|
if ( lock.flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL) ) {
|
|
|
|
mga_do_dma_flush( dev_priv );
|
|
|
|
}
|
|
|
|
|
|
|
|
if ( lock.flags & _DRM_LOCK_QUIESCENT ) {
|
|
|
|
#if MGA_DMA_DEBUG
|
|
|
|
int ret = mga_do_wait_for_idle( dev_priv );
|
2003-03-09 02:08:30 +00:00
|
|
|
if ( ret < 0 )
|
|
|
|
DRM_INFO( "%s: -EBUSY\n", __FUNCTION__ );
|
2002-04-27 20:47:57 +00:00
|
|
|
return ret;
|
|
|
|
#else
|
|
|
|
return mga_do_wait_for_idle( dev_priv );
|
|
|
|
#endif
|
|
|
|
} else {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
int mga_dma_reset( DRM_IOCTL_ARGS )
|
2002-04-27 20:47:57 +00:00
|
|
|
{
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_DEVICE;
|
2002-04-27 20:47:57 +00:00
|
|
|
drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
|
|
|
|
|
2003-04-25 01:18:47 +00:00
|
|
|
LOCK_TEST_WITH_RETURN( dev, filp );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
|
|
|
return mga_do_dma_reset( dev_priv );
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* ================================================================
|
|
|
|
* DMA buffer management
|
|
|
|
*/
|
|
|
|
|
2003-04-25 01:18:47 +00:00
|
|
|
static int mga_dma_get_buffers( DRMFILE filp,
|
|
|
|
drm_device_t *dev, drm_dma_t *d )
|
2002-04-27 20:47:57 +00:00
|
|
|
{
|
|
|
|
drm_buf_t *buf;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for ( i = d->granted_count ; i < d->request_count ; i++ ) {
|
|
|
|
buf = mga_freelist_get( dev );
|
2003-03-09 02:08:30 +00:00
|
|
|
if ( !buf ) return DRM_ERR(EAGAIN);
|
2002-04-27 20:47:57 +00:00
|
|
|
|
2003-04-25 01:18:47 +00:00
|
|
|
buf->filp = filp;
|
2002-04-27 20:47:57 +00:00
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
if ( DRM_COPY_TO_USER( &d->request_indices[i],
|
2002-04-27 20:47:57 +00:00
|
|
|
&buf->idx, sizeof(buf->idx) ) )
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(EFAULT);
|
|
|
|
if ( DRM_COPY_TO_USER( &d->request_sizes[i],
|
2002-04-27 20:47:57 +00:00
|
|
|
&buf->total, sizeof(buf->total) ) )
|
2003-03-09 02:08:30 +00:00
|
|
|
return DRM_ERR(EFAULT);
|
2002-04-27 20:47:57 +00:00
|
|
|
|
|
|
|
d->granted_count++;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
int mga_dma_buffers( DRM_IOCTL_ARGS )
|
2002-04-27 20:47:57 +00:00
|
|
|
{
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_DEVICE;
|
2002-04-27 20:47:57 +00:00
|
|
|
drm_device_dma_t *dma = dev->dma;
|
|
|
|
drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
|
|
|
|
drm_dma_t d;
|
|
|
|
int ret = 0;
|
|
|
|
|
2003-04-25 01:18:47 +00:00
|
|
|
LOCK_TEST_WITH_RETURN( dev, filp );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_COPY_FROM_USER_IOCTL( d, (drm_dma_t *)data, sizeof(d) );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
|
|
|
/* Please don't send us buffers.
|
|
|
|
*/
|
|
|
|
if ( d.send_count != 0 ) {
|
|
|
|
DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_CURRENTPID, d.send_count );
|
|
|
|
return DRM_ERR(EINVAL);
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* We'll send you buffers.
|
|
|
|
*/
|
|
|
|
if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
|
|
|
|
DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_CURRENTPID, d.request_count, dma->buf_count );
|
|
|
|
return DRM_ERR(EINVAL);
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
WRAP_TEST_WITH_RETURN( dev_priv );
|
|
|
|
|
|
|
|
d.granted_count = 0;
|
|
|
|
|
|
|
|
if ( d.request_count ) {
|
2003-04-25 01:18:47 +00:00
|
|
|
ret = mga_dma_get_buffers( filp, dev, &d );
|
2002-04-27 20:47:57 +00:00
|
|
|
}
|
|
|
|
|
2003-03-09 02:08:30 +00:00
|
|
|
DRM_COPY_TO_USER_IOCTL( (drm_dma_t *)data, d, sizeof(d) );
|
2002-04-27 20:47:57 +00:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|