1999-08-28 01:08:13 +00:00
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/* $FreeBSD$ */
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1998-04-22 17:54:58 +00:00
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/*
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2001-07-25 04:21:53 +00:00
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* Qlogic ISP SCSI Host Adapter FreeBSD Wrapper Definitions
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2001-06-05 17:11:06 +00:00
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* Copyright (c) 1997, 1998, 1999, 2000, 2001 by Matthew Jacob
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1998-04-22 17:54:58 +00:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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2000-09-21 20:16:04 +00:00
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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1998-04-22 17:54:58 +00:00
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _ISP_FREEBSD_H
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#define _ISP_FREEBSD_H
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2000-03-15 18:49:44 +00:00
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#define ISP_PLATFORM_VERSION_MAJOR 5
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2001-07-25 04:21:53 +00:00
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#define ISP_PLATFORM_VERSION_MINOR 9
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1998-09-15 08:42:56 +00:00
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1999-07-02 23:10:34 +00:00
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#include <sys/param.h>
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1998-04-22 17:54:58 +00:00
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#include <sys/systm.h>
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2002-04-26 22:48:23 +00:00
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#include <sys/endian.h>
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1999-07-02 23:10:34 +00:00
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#include <sys/kernel.h>
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#include <sys/queue.h>
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2001-03-28 09:17:56 +00:00
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#include <sys/lock.h>
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2000-04-21 02:05:13 +00:00
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#include <sys/malloc.h>
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2000-10-20 07:58:15 +00:00
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#include <sys/mutex.h>
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Spring MegaChange #1.
----
Make a device for each ISP- really usable only with devfs and add an ioctl
entry point (this can be used to (re)set debug levels, reset the HBA,
rescan the fabric, issue lips, etc).
----
Add in a kernel thread for Fibre Channel cards. The purpose of this
thread is to be woken up to clean up after Fibre Channel events
block things. Basically, any FC event that casts doubt on the
location or identify of FC devices blocks the queues. When, and
if, we get the PORT DATABASE CHANGED or NAME SERVER DATABASE CHANGED
async event, we activate the kthread which will then, in full thread
context, re-evaluate the local loop and/or the fabric. When it's
satisfied that things are stable, it can then release the blocked
queues and let commands flow again.
The prior mechanism was a lazy evaluation. That is, the next command
to come down the pipe after change events would pay the full price
for re-evaluation. And if this was done off of a softcall, it really
could hang up the system.
These changes brings the FreeBSD port more in line with the Solaris,
Linux and NetBSD ports. It also, more importantly, gets us being
more proactive about topology changes which could then be reflected
upwards to CAM so that the periph driver can be informed sooner
rather than later when things arrive or depart.
---
Add in the (correct) usage of locking macros- we now have lock transition
macros which allow us to transition from holding the CAM lock (Giant)
and grabbing the softc lock and vice versa. Switch over to having this
HBA do real locking. Some folks claim this won't be a win. They're right.
But you have to start somewhere, and this will begin to teach us how
to DTRT for HBAs, etc.
--
Start putting in prototype 2300 support. Add back in LIP
and Loop Reset as async events that each platform will handle.
Add in another int_bogus instrumentation point.
Do some more substantial target mode cleanups.
MFC after: 8 weeks
2001-05-28 21:20:43 +00:00
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#include <sys/condvar.h>
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2000-07-04 01:04:35 +00:00
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#include <sys/proc.h>
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2001-03-01 02:15:58 +00:00
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#include <sys/bus.h>
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1998-04-22 17:54:58 +00:00
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1999-07-02 23:10:34 +00:00
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#include <machine/bus_memio.h>
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#include <machine/bus_pio.h>
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#include <machine/bus.h>
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1998-04-22 17:54:58 +00:00
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#include <machine/clock.h>
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2000-07-04 01:04:35 +00:00
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#include <machine/cpu.h>
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1998-04-22 17:54:58 +00:00
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1999-07-02 23:10:34 +00:00
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#include <cam/cam.h>
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#include <cam/cam_debug.h>
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#include <cam/cam_ccb.h>
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#include <cam/cam_sim.h>
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#include <cam/cam_xpt.h>
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#include <cam/cam_xpt_sim.h>
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#include <cam/cam_debug.h>
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#include <cam/scsi/scsi_all.h>
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#include <cam/scsi/scsi_message.h>
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1999-10-17 18:48:16 +00:00
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#include "opt_ddb.h"
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1999-07-02 23:10:34 +00:00
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#include "opt_isp.h"
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Major restructuring for swizzling to the request queue and unswizzling from
the response queue. Instead of the ad hoc ISP_SWIZZLE_REQUEST, we now have
a complete set of inline functions in isp_inline.h. Each platform is
responsible for providing just one of a set of ISP_IOX_{GET,PUT}{8,16,32}
macros.
The reason this needs to be done is that we need to have a single set of
functions that will work correctly on multiple architectures for both little
and big endian machines. It also needs to work correctly in the case that
we have the request or response queues in memory that has to be treated
specially (e.g., have ddi_dma_sync called on it for Solaris after we update
it or before we read from it). It also has to handle the SBus cards (for
platforms that have them) which, while on a Big Endian machine, do *not*
require *most* of the request/response queue entry fields to be swizzled
or unswizzled.
One thing that falls out of this is that we no longer build requests in the
request queue itself. Instead, we build the request locally (e.g., on the
stack) and then as part of the swizzling operation, copy it to the request
queue entry we've allocated. I thought long and hard about whether this was
too expensive a change to make as it in a lot of cases requires an extra
copy. On balance, the flexbility is worth it. With any luck, the entry that
we build locally stays in a processor writeback cache (after all, it's only
64 bytes) so that the cost of actually flushing it to the memory area that is
the shared queue with the PCI device is not all that expensive. We may examine
this again and try to get clever in the future to try and avoid copies.
Another change that falls out of this is that MEMORYBARRIER should be taken
a lot more seriously. The macro ISP_ADD_REQUEST does a MEMORYBARRIER on the
entry being added. But there had been many other places this had been missing.
It's now very important that it be done.
Additional changes:
Fix a longstanding buglet of sorts. When we get an entry via isp_getrqentry,
the iptr value that gets returned is the value we intend to eventually plug
into the ISP registers as the entry *one past* the last one we've written-
*not* the current entry we're updating. All along we've been calling sync
functions on the wrong index value. Argh. The 'fix' here is to rename all
'iptr' variables as 'nxti' to remember that this is the 'next' pointer-
not the current pointer.
Devote a single bit to mboxbsy- and set aside bits for output mbox registers
that we need to pick up- we can have at least one command which does not
have any defined output registers (MBOX_EXECUTE_FIRMWARE).
MFC after: 2 weeks
2001-12-11 00:18:45 +00:00
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/*
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* Efficiency- get rid of SBus code && tests unless we need them.
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*/
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2002-04-02 23:36:14 +00:00
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#if _MACHINE_ARCH == sparc64
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Major restructuring for swizzling to the request queue and unswizzling from
the response queue. Instead of the ad hoc ISP_SWIZZLE_REQUEST, we now have
a complete set of inline functions in isp_inline.h. Each platform is
responsible for providing just one of a set of ISP_IOX_{GET,PUT}{8,16,32}
macros.
The reason this needs to be done is that we need to have a single set of
functions that will work correctly on multiple architectures for both little
and big endian machines. It also needs to work correctly in the case that
we have the request or response queues in memory that has to be treated
specially (e.g., have ddi_dma_sync called on it for Solaris after we update
it or before we read from it). It also has to handle the SBus cards (for
platforms that have them) which, while on a Big Endian machine, do *not*
require *most* of the request/response queue entry fields to be swizzled
or unswizzled.
One thing that falls out of this is that we no longer build requests in the
request queue itself. Instead, we build the request locally (e.g., on the
stack) and then as part of the swizzling operation, copy it to the request
queue entry we've allocated. I thought long and hard about whether this was
too expensive a change to make as it in a lot of cases requires an extra
copy. On balance, the flexbility is worth it. With any luck, the entry that
we build locally stays in a processor writeback cache (after all, it's only
64 bytes) so that the cost of actually flushing it to the memory area that is
the shared queue with the PCI device is not all that expensive. We may examine
this again and try to get clever in the future to try and avoid copies.
Another change that falls out of this is that MEMORYBARRIER should be taken
a lot more seriously. The macro ISP_ADD_REQUEST does a MEMORYBARRIER on the
entry being added. But there had been many other places this had been missing.
It's now very important that it be done.
Additional changes:
Fix a longstanding buglet of sorts. When we get an entry via isp_getrqentry,
the iptr value that gets returned is the value we intend to eventually plug
into the ISP registers as the entry *one past* the last one we've written-
*not* the current entry we're updating. All along we've been calling sync
functions on the wrong index value. Argh. The 'fix' here is to rename all
'iptr' variables as 'nxti' to remember that this is the 'next' pointer-
not the current pointer.
Devote a single bit to mboxbsy- and set aside bits for output mbox registers
that we need to pick up- we can have at least one command which does not
have any defined output registers (MBOX_EXECUTE_FIRMWARE).
MFC after: 2 weeks
2001-12-11 00:18:45 +00:00
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#define ISP_SBUS_SUPPORTED 1
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#else
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#define ISP_SBUS_SUPPORTED 0
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#endif
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1999-04-04 01:34:06 +00:00
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Spring MegaChange #1.
----
Make a device for each ISP- really usable only with devfs and add an ioctl
entry point (this can be used to (re)set debug levels, reset the HBA,
rescan the fabric, issue lips, etc).
----
Add in a kernel thread for Fibre Channel cards. The purpose of this
thread is to be woken up to clean up after Fibre Channel events
block things. Basically, any FC event that casts doubt on the
location or identify of FC devices blocks the queues. When, and
if, we get the PORT DATABASE CHANGED or NAME SERVER DATABASE CHANGED
async event, we activate the kthread which will then, in full thread
context, re-evaluate the local loop and/or the fabric. When it's
satisfied that things are stable, it can then release the blocked
queues and let commands flow again.
The prior mechanism was a lazy evaluation. That is, the next command
to come down the pipe after change events would pay the full price
for re-evaluation. And if this was done off of a softcall, it really
could hang up the system.
These changes brings the FreeBSD port more in line with the Solaris,
Linux and NetBSD ports. It also, more importantly, gets us being
more proactive about topology changes which could then be reflected
upwards to CAM so that the periph driver can be informed sooner
rather than later when things arrive or depart.
---
Add in the (correct) usage of locking macros- we now have lock transition
macros which allow us to transition from holding the CAM lock (Giant)
and grabbing the softc lock and vice versa. Switch over to having this
HBA do real locking. Some folks claim this won't be a win. They're right.
But you have to start somewhere, and this will begin to teach us how
to DTRT for HBAs, etc.
--
Start putting in prototype 2300 support. Add back in LIP
and Loop Reset as async events that each platform will handle.
Add in another int_bogus instrumentation point.
Do some more substantial target mode cleanups.
MFC after: 8 weeks
2001-05-28 21:20:43 +00:00
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#define HANDLE_LOOPSTATE_IN_OUTER_LAYERS 1
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2002-03-20 02:08:01 +00:00
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typedef void ispfwfunc(int, int, int, u_int16_t **);
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2000-01-03 22:15:16 +00:00
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#ifdef ISP_TARGET_MODE
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Major restructuring for swizzling to the request queue and unswizzling from
the response queue. Instead of the ad hoc ISP_SWIZZLE_REQUEST, we now have
a complete set of inline functions in isp_inline.h. Each platform is
responsible for providing just one of a set of ISP_IOX_{GET,PUT}{8,16,32}
macros.
The reason this needs to be done is that we need to have a single set of
functions that will work correctly on multiple architectures for both little
and big endian machines. It also needs to work correctly in the case that
we have the request or response queues in memory that has to be treated
specially (e.g., have ddi_dma_sync called on it for Solaris after we update
it or before we read from it). It also has to handle the SBus cards (for
platforms that have them) which, while on a Big Endian machine, do *not*
require *most* of the request/response queue entry fields to be swizzled
or unswizzled.
One thing that falls out of this is that we no longer build requests in the
request queue itself. Instead, we build the request locally (e.g., on the
stack) and then as part of the swizzling operation, copy it to the request
queue entry we've allocated. I thought long and hard about whether this was
too expensive a change to make as it in a lot of cases requires an extra
copy. On balance, the flexbility is worth it. With any luck, the entry that
we build locally stays in a processor writeback cache (after all, it's only
64 bytes) so that the cost of actually flushing it to the memory area that is
the shared queue with the PCI device is not all that expensive. We may examine
this again and try to get clever in the future to try and avoid copies.
Another change that falls out of this is that MEMORYBARRIER should be taken
a lot more seriously. The macro ISP_ADD_REQUEST does a MEMORYBARRIER on the
entry being added. But there had been many other places this had been missing.
It's now very important that it be done.
Additional changes:
Fix a longstanding buglet of sorts. When we get an entry via isp_getrqentry,
the iptr value that gets returned is the value we intend to eventually plug
into the ISP registers as the entry *one past* the last one we've written-
*not* the current entry we're updating. All along we've been calling sync
functions on the wrong index value. Argh. The 'fix' here is to rename all
'iptr' variables as 'nxti' to remember that this is the 'next' pointer-
not the current pointer.
Devote a single bit to mboxbsy- and set aside bits for output mbox registers
that we need to pick up- we can have at least one command which does not
have any defined output registers (MBOX_EXECUTE_FIRMWARE).
MFC after: 2 weeks
2001-12-11 00:18:45 +00:00
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#define ISP_TARGET_FUNCTIONS 1
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2001-10-01 03:48:42 +00:00
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#define ATPDPSIZE 256
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typedef struct {
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u_int32_t orig_datalen;
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u_int32_t bytes_xfered;
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u_int32_t last_xframt;
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u_int32_t tag;
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} atio_private_data_t;
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2000-01-03 22:15:16 +00:00
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typedef struct tstate {
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struct tstate *next;
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struct cam_path *owner;
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struct ccb_hdr_slist atios;
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struct ccb_hdr_slist inots;
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lun_id_t lun;
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2001-04-04 21:56:15 +00:00
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int bus;
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2000-01-03 22:15:16 +00:00
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u_int32_t hold;
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} tstate_t;
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2001-04-04 21:56:15 +00:00
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#define LUN_HASH_SIZE 32
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#define LUN_HASH_FUNC(isp, port, lun) \
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((IS_DUALBUS(isp)) ? \
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(((lun) & ((LUN_HASH_SIZE >> 1) - 1)) << (port)) : \
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((lun) & (LUN_HASH_SIZE - 1)))
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2000-01-03 22:15:16 +00:00
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#endif
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1998-04-22 17:54:58 +00:00
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struct isposinfo {
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2000-01-03 22:15:16 +00:00
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struct ispsoftc * next;
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2001-03-01 02:15:58 +00:00
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u_int64_t default_port_wwn;
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u_int64_t default_node_wwn;
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device_t dev;
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1999-07-02 23:10:34 +00:00
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struct cam_sim *sim;
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struct cam_path *path;
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struct cam_sim *sim2;
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struct cam_path *path2;
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2000-07-04 01:04:35 +00:00
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struct intr_config_hook ehook;
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u_int8_t mboxwaiting;
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u_int8_t simqfrozen;
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2000-08-27 23:38:44 +00:00
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u_int8_t drain;
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u_int8_t intsok;
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2000-10-17 18:18:14 +00:00
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struct mtx lock;
|
Spring MegaChange #1.
----
Make a device for each ISP- really usable only with devfs and add an ioctl
entry point (this can be used to (re)set debug levels, reset the HBA,
rescan the fabric, issue lips, etc).
----
Add in a kernel thread for Fibre Channel cards. The purpose of this
thread is to be woken up to clean up after Fibre Channel events
block things. Basically, any FC event that casts doubt on the
location or identify of FC devices blocks the queues. When, and
if, we get the PORT DATABASE CHANGED or NAME SERVER DATABASE CHANGED
async event, we activate the kthread which will then, in full thread
context, re-evaluate the local loop and/or the fabric. When it's
satisfied that things are stable, it can then release the blocked
queues and let commands flow again.
The prior mechanism was a lazy evaluation. That is, the next command
to come down the pipe after change events would pay the full price
for re-evaluation. And if this was done off of a softcall, it really
could hang up the system.
These changes brings the FreeBSD port more in line with the Solaris,
Linux and NetBSD ports. It also, more importantly, gets us being
more proactive about topology changes which could then be reflected
upwards to CAM so that the periph driver can be informed sooner
rather than later when things arrive or depart.
---
Add in the (correct) usage of locking macros- we now have lock transition
macros which allow us to transition from holding the CAM lock (Giant)
and grabbing the softc lock and vice versa. Switch over to having this
HBA do real locking. Some folks claim this won't be a win. They're right.
But you have to start somewhere, and this will begin to teach us how
to DTRT for HBAs, etc.
--
Start putting in prototype 2300 support. Add back in LIP
and Loop Reset as async events that each platform will handle.
Add in another int_bogus instrumentation point.
Do some more substantial target mode cleanups.
MFC after: 8 weeks
2001-05-28 21:20:43 +00:00
|
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struct cv kthread_cv;
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struct proc *kproc;
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2002-04-02 23:36:14 +00:00
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bus_dma_tag_t cdmat;
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bus_dmamap_t cdmap;
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#define isp_cdmat isp_osinfo.cdmat
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#define isp_cdmap isp_osinfo.cdmap
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2000-01-03 22:15:16 +00:00
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#ifdef ISP_TARGET_MODE
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2001-04-04 21:56:15 +00:00
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#define TM_WANTED 0x80
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#define TM_BUSY 0x40
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2001-09-04 21:33:06 +00:00
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#define TM_WILDCARD_ENABLED 0x02
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#define TM_TMODE_ENABLED 0x01
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struct cv tgtcv0[2]; /* two busses */
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struct cv tgtcv1[2]; /* two busses */
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u_int8_t tmflags[2]; /* two busses */
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u_int8_t rstatus[2]; /* two bussed */
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2000-01-03 22:15:16 +00:00
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u_int16_t rollinfo;
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2001-04-04 21:56:15 +00:00
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tstate_t tsdflt[2]; /* two busses */
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2000-01-03 22:15:16 +00:00
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tstate_t *lun_hash[LUN_HASH_SIZE];
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2001-10-01 03:48:42 +00:00
|
|
|
atio_private_data_t atpdp[ATPDPSIZE];
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2000-01-03 22:15:16 +00:00
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#endif
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1998-04-22 17:54:58 +00:00
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};
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1999-07-02 23:10:34 +00:00
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Spring MegaChange #1.
----
Make a device for each ISP- really usable only with devfs and add an ioctl
entry point (this can be used to (re)set debug levels, reset the HBA,
rescan the fabric, issue lips, etc).
----
Add in a kernel thread for Fibre Channel cards. The purpose of this
thread is to be woken up to clean up after Fibre Channel events
block things. Basically, any FC event that casts doubt on the
location or identify of FC devices blocks the queues. When, and
if, we get the PORT DATABASE CHANGED or NAME SERVER DATABASE CHANGED
async event, we activate the kthread which will then, in full thread
context, re-evaluate the local loop and/or the fabric. When it's
satisfied that things are stable, it can then release the blocked
queues and let commands flow again.
The prior mechanism was a lazy evaluation. That is, the next command
to come down the pipe after change events would pay the full price
for re-evaluation. And if this was done off of a softcall, it really
could hang up the system.
These changes brings the FreeBSD port more in line with the Solaris,
Linux and NetBSD ports. It also, more importantly, gets us being
more proactive about topology changes which could then be reflected
upwards to CAM so that the periph driver can be informed sooner
rather than later when things arrive or depart.
---
Add in the (correct) usage of locking macros- we now have lock transition
macros which allow us to transition from holding the CAM lock (Giant)
and grabbing the softc lock and vice versa. Switch over to having this
HBA do real locking. Some folks claim this won't be a win. They're right.
But you have to start somewhere, and this will begin to teach us how
to DTRT for HBAs, etc.
--
Start putting in prototype 2300 support. Add back in LIP
and Loop Reset as async events that each platform will handle.
Add in another int_bogus instrumentation point.
Do some more substantial target mode cleanups.
MFC after: 8 weeks
2001-05-28 21:20:43 +00:00
|
|
|
#define isp_lock isp_osinfo.lock
|
|
|
|
|
|
2000-12-02 18:33:29 +00:00
|
|
|
/*
|
|
|
|
|
* Locking macros...
|
|
|
|
|
*/
|
|
|
|
|
|
Spring MegaChange #1.
----
Make a device for each ISP- really usable only with devfs and add an ioctl
entry point (this can be used to (re)set debug levels, reset the HBA,
rescan the fabric, issue lips, etc).
----
Add in a kernel thread for Fibre Channel cards. The purpose of this
thread is to be woken up to clean up after Fibre Channel events
block things. Basically, any FC event that casts doubt on the
location or identify of FC devices blocks the queues. When, and
if, we get the PORT DATABASE CHANGED or NAME SERVER DATABASE CHANGED
async event, we activate the kthread which will then, in full thread
context, re-evaluate the local loop and/or the fabric. When it's
satisfied that things are stable, it can then release the blocked
queues and let commands flow again.
The prior mechanism was a lazy evaluation. That is, the next command
to come down the pipe after change events would pay the full price
for re-evaluation. And if this was done off of a softcall, it really
could hang up the system.
These changes brings the FreeBSD port more in line with the Solaris,
Linux and NetBSD ports. It also, more importantly, gets us being
more proactive about topology changes which could then be reflected
upwards to CAM so that the periph driver can be informed sooner
rather than later when things arrive or depart.
---
Add in the (correct) usage of locking macros- we now have lock transition
macros which allow us to transition from holding the CAM lock (Giant)
and grabbing the softc lock and vice versa. Switch over to having this
HBA do real locking. Some folks claim this won't be a win. They're right.
But you have to start somewhere, and this will begin to teach us how
to DTRT for HBAs, etc.
--
Start putting in prototype 2300 support. Add back in LIP
and Loop Reset as async events that each platform will handle.
Add in another int_bogus instrumentation point.
Do some more substantial target mode cleanups.
MFC after: 8 weeks
2001-05-28 21:20:43 +00:00
|
|
|
#define ISP_LOCK(x) mtx_lock(&(x)->isp_lock)
|
|
|
|
|
#define ISP_UNLOCK(x) mtx_unlock(&(x)->isp_lock)
|
|
|
|
|
#define ISPLOCK_2_CAMLOCK(isp) \
|
|
|
|
|
mtx_unlock(&(isp)->isp_lock); mtx_lock(&Giant)
|
|
|
|
|
#define CAMLOCK_2_ISPLOCK(isp) \
|
|
|
|
|
mtx_unlock(&Giant); mtx_lock(&(isp)->isp_lock)
|
2000-12-02 18:33:29 +00:00
|
|
|
|
2000-08-01 06:29:55 +00:00
|
|
|
/*
|
|
|
|
|
* Required Macros/Defines
|
|
|
|
|
*/
|
1998-09-15 08:42:56 +00:00
|
|
|
|
2000-08-01 06:29:55 +00:00
|
|
|
#define INLINE __inline
|
1999-04-04 01:34:06 +00:00
|
|
|
|
2002-04-04 23:46:01 +00:00
|
|
|
#define ISP2100_SCRLEN 0x800
|
2000-07-04 01:04:35 +00:00
|
|
|
|
2000-08-01 06:29:55 +00:00
|
|
|
#define MEMZERO bzero
|
|
|
|
|
#define MEMCPY(dst, src, amt) bcopy((src), (dst), (amt))
|
|
|
|
|
#define SNPRINTF snprintf
|
|
|
|
|
#define STRNCAT strncat
|
|
|
|
|
#define USEC_DELAY DELAY
|
2000-12-05 07:41:53 +00:00
|
|
|
#define USEC_SLEEP(isp, x) \
|
|
|
|
|
if (isp->isp_osinfo.intsok) \
|
|
|
|
|
ISP_UNLOCK(isp); \
|
|
|
|
|
DELAY(x); \
|
|
|
|
|
if (isp->isp_osinfo.intsok) \
|
|
|
|
|
ISP_LOCK(isp)
|
2000-07-04 01:04:35 +00:00
|
|
|
|
2000-08-01 06:29:55 +00:00
|
|
|
#define NANOTIME_T struct timespec
|
|
|
|
|
#define GET_NANOTIME nanotime
|
|
|
|
|
#define GET_NANOSEC(x) ((x)->tv_sec * 1000000000 + (x)->tv_nsec)
|
|
|
|
|
#define NANOTIME_SUB nanotime_sub
|
2000-07-04 01:04:35 +00:00
|
|
|
|
2000-08-01 06:29:55 +00:00
|
|
|
#define MAXISPREQUEST(isp) 256
|
2000-07-04 01:04:35 +00:00
|
|
|
|
2002-04-02 23:36:14 +00:00
|
|
|
#define MEMORYBARRIER(isp, type, offset, size) \
|
|
|
|
|
switch (type) { \
|
|
|
|
|
case SYNC_SFORDEV: \
|
|
|
|
|
case SYNC_REQUEST: \
|
|
|
|
|
bus_dmamap_sync(isp->isp_cdmat, isp->isp_cdmap, \
|
|
|
|
|
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \
|
|
|
|
|
break; \
|
|
|
|
|
case SYNC_SFORCPU: \
|
|
|
|
|
case SYNC_RESULT: \
|
|
|
|
|
bus_dmamap_sync(isp->isp_cdmat, isp->isp_cdmap, \
|
|
|
|
|
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \
|
|
|
|
|
break; \
|
|
|
|
|
default: \
|
|
|
|
|
break; \
|
|
|
|
|
}
|
2000-07-04 01:04:35 +00:00
|
|
|
|
2000-08-01 06:29:55 +00:00
|
|
|
#define MBOX_ACQUIRE(isp)
|
|
|
|
|
#define MBOX_WAIT_COMPLETE isp_mbox_wait_complete
|
2000-07-04 01:04:35 +00:00
|
|
|
#define MBOX_NOTIFY_COMPLETE(isp) \
|
|
|
|
|
if (isp->isp_osinfo.mboxwaiting) { \
|
|
|
|
|
isp->isp_osinfo.mboxwaiting = 0; \
|
|
|
|
|
wakeup(&isp->isp_osinfo.mboxwaiting); \
|
|
|
|
|
} \
|
|
|
|
|
isp->isp_mboxbsy = 0
|
2000-08-01 06:29:55 +00:00
|
|
|
#define MBOX_RELEASE(isp)
|
1999-07-02 23:10:34 +00:00
|
|
|
|
2002-02-04 21:04:25 +00:00
|
|
|
#define FC_SCRATCH_ACQUIRE(isp)
|
|
|
|
|
#define FC_SCRATCH_RELEASE(isp)
|
|
|
|
|
|
2000-08-01 06:29:55 +00:00
|
|
|
#ifndef SCSI_GOOD
|
|
|
|
|
#define SCSI_GOOD SCSI_STATUS_OK
|
|
|
|
|
#endif
|
|
|
|
|
#ifndef SCSI_CHECK
|
|
|
|
|
#define SCSI_CHECK SCSI_STATUS_CHECK_COND
|
|
|
|
|
#endif
|
|
|
|
|
#ifndef SCSI_BUSY
|
|
|
|
|
#define SCSI_BUSY SCSI_STATUS_BUSY
|
|
|
|
|
#endif
|
|
|
|
|
#ifndef SCSI_QFULL
|
|
|
|
|
#define SCSI_QFULL SCSI_STATUS_QUEUE_FULL
|
|
|
|
|
#endif
|
1999-07-02 23:10:34 +00:00
|
|
|
|
2000-08-01 06:29:55 +00:00
|
|
|
#define XS_T struct ccb_scsiio
|
|
|
|
|
#define XS_ISP(ccb) ((struct ispsoftc *) (ccb)->ccb_h.spriv_ptr1)
|
1999-07-02 23:10:34 +00:00
|
|
|
#define XS_CHANNEL(ccb) cam_sim_bus(xpt_path_sim((ccb)->ccb_h.path))
|
2000-08-01 06:29:55 +00:00
|
|
|
#define XS_TGT(ccb) (ccb)->ccb_h.target_id
|
|
|
|
|
#define XS_LUN(ccb) (ccb)->ccb_h.target_lun
|
|
|
|
|
|
|
|
|
|
#define XS_CDBP(ccb) \
|
|
|
|
|
(((ccb)->ccb_h.flags & CAM_CDB_POINTER)? \
|
|
|
|
|
(ccb)->cdb_io.cdb_ptr : (ccb)->cdb_io.cdb_bytes)
|
|
|
|
|
|
1999-07-02 23:10:34 +00:00
|
|
|
#define XS_CDBLEN(ccb) (ccb)->cdb_len
|
2000-08-01 06:29:55 +00:00
|
|
|
#define XS_XFRLEN(ccb) (ccb)->dxfer_len
|
1999-07-02 23:10:34 +00:00
|
|
|
#define XS_TIME(ccb) (ccb)->ccb_h.timeout
|
2000-08-01 06:29:55 +00:00
|
|
|
#define XS_RESID(ccb) (ccb)->resid
|
|
|
|
|
#define XS_STSP(ccb) (&(ccb)->scsi_status)
|
1999-07-02 23:10:34 +00:00
|
|
|
#define XS_SNSP(ccb) (&(ccb)->sense_data)
|
2000-08-01 06:29:55 +00:00
|
|
|
|
1999-10-17 18:48:16 +00:00
|
|
|
#define XS_SNSLEN(ccb) \
|
|
|
|
|
imin((sizeof((ccb)->sense_data)), ccb->sense_len)
|
2000-08-01 06:29:55 +00:00
|
|
|
|
1999-07-02 23:10:34 +00:00
|
|
|
#define XS_SNSKEY(ccb) ((ccb)->sense_data.flags & 0xf)
|
2000-08-01 06:29:55 +00:00
|
|
|
#define XS_TAG_P(ccb) \
|
|
|
|
|
(((ccb)->ccb_h.flags & CAM_TAG_ACTION_VALID) && \
|
|
|
|
|
(ccb)->tag_action != CAM_TAG_ACTION_NONE)
|
|
|
|
|
|
|
|
|
|
#define XS_TAG_TYPE(ccb) \
|
|
|
|
|
((ccb->tag_action == MSG_SIMPLE_Q_TAG)? REQFLAG_STAG : \
|
|
|
|
|
((ccb->tag_action == MSG_HEAD_OF_Q_TAG)? REQFLAG_HTAG : REQFLAG_OTAG))
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#define XS_SETERR(ccb, v) (ccb)->ccb_h.status &= ~CAM_STATUS_MASK, \
|
|
|
|
|
(ccb)->ccb_h.status |= v, \
|
|
|
|
|
(ccb)->ccb_h.spriv_field0 |= ISP_SPRIV_ERRSET
|
|
|
|
|
|
|
|
|
|
# define HBA_NOERROR CAM_REQ_INPROG
|
|
|
|
|
# define HBA_BOTCH CAM_UNREC_HBA_ERROR
|
|
|
|
|
# define HBA_CMDTIMEOUT CAM_CMD_TIMEOUT
|
|
|
|
|
# define HBA_SELTIMEOUT CAM_SEL_TIMEOUT
|
|
|
|
|
# define HBA_TGTBSY CAM_SCSI_STATUS_ERROR
|
|
|
|
|
# define HBA_BUSRESET CAM_SCSI_BUS_RESET
|
|
|
|
|
# define HBA_ABORTED CAM_REQ_ABORTED
|
|
|
|
|
# define HBA_DATAOVR CAM_DATA_RUN_ERR
|
|
|
|
|
# define HBA_ARQFAIL CAM_AUTOSENSE_FAIL
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#define XS_ERR(ccb) ((ccb)->ccb_h.status & CAM_STATUS_MASK)
|
|
|
|
|
|
|
|
|
|
#define XS_NOERR(ccb) \
|
|
|
|
|
(((ccb)->ccb_h.spriv_field0 & ISP_SPRIV_ERRSET) == 0 || \
|
|
|
|
|
((ccb)->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG)
|
|
|
|
|
|
|
|
|
|
#define XS_INITERR(ccb) \
|
|
|
|
|
XS_SETERR(ccb, CAM_REQ_INPROG), (ccb)->ccb_h.spriv_field0 = 0
|
|
|
|
|
|
|
|
|
|
#define XS_SAVE_SENSE(xs, sp) \
|
2001-01-15 18:36:09 +00:00
|
|
|
(xs)->ccb_h.status |= CAM_AUTOSNS_VALID, \
|
2000-08-01 06:29:55 +00:00
|
|
|
bcopy(sp->req_sense_data, &(xs)->sense_data, \
|
|
|
|
|
imin(XS_SNSLEN(xs), sp->req_sense_len))
|
|
|
|
|
|
|
|
|
|
#define XS_SET_STATE_STAT(a, b, c)
|
|
|
|
|
|
|
|
|
|
#define DEFAULT_IID(x) 7
|
|
|
|
|
#define DEFAULT_LOOPID(x) 109
|
2001-03-01 02:15:58 +00:00
|
|
|
#define DEFAULT_NODEWWN(isp) (isp)->isp_osinfo.default_node_wwn
|
|
|
|
|
#define DEFAULT_PORTWWN(isp) (isp)->isp_osinfo.default_port_wwn
|
2000-10-12 23:59:40 +00:00
|
|
|
#define ISP_NODEWWN(isp) FCPARAM(isp)->isp_nodewwn
|
|
|
|
|
#define ISP_PORTWWN(isp) FCPARAM(isp)->isp_portwwn
|
2000-08-01 06:29:55 +00:00
|
|
|
|
Major restructuring for swizzling to the request queue and unswizzling from
the response queue. Instead of the ad hoc ISP_SWIZZLE_REQUEST, we now have
a complete set of inline functions in isp_inline.h. Each platform is
responsible for providing just one of a set of ISP_IOX_{GET,PUT}{8,16,32}
macros.
The reason this needs to be done is that we need to have a single set of
functions that will work correctly on multiple architectures for both little
and big endian machines. It also needs to work correctly in the case that
we have the request or response queues in memory that has to be treated
specially (e.g., have ddi_dma_sync called on it for Solaris after we update
it or before we read from it). It also has to handle the SBus cards (for
platforms that have them) which, while on a Big Endian machine, do *not*
require *most* of the request/response queue entry fields to be swizzled
or unswizzled.
One thing that falls out of this is that we no longer build requests in the
request queue itself. Instead, we build the request locally (e.g., on the
stack) and then as part of the swizzling operation, copy it to the request
queue entry we've allocated. I thought long and hard about whether this was
too expensive a change to make as it in a lot of cases requires an extra
copy. On balance, the flexbility is worth it. With any luck, the entry that
we build locally stays in a processor writeback cache (after all, it's only
64 bytes) so that the cost of actually flushing it to the memory area that is
the shared queue with the PCI device is not all that expensive. We may examine
this again and try to get clever in the future to try and avoid copies.
Another change that falls out of this is that MEMORYBARRIER should be taken
a lot more seriously. The macro ISP_ADD_REQUEST does a MEMORYBARRIER on the
entry being added. But there had been many other places this had been missing.
It's now very important that it be done.
Additional changes:
Fix a longstanding buglet of sorts. When we get an entry via isp_getrqentry,
the iptr value that gets returned is the value we intend to eventually plug
into the ISP registers as the entry *one past* the last one we've written-
*not* the current entry we're updating. All along we've been calling sync
functions on the wrong index value. Argh. The 'fix' here is to rename all
'iptr' variables as 'nxti' to remember that this is the 'next' pointer-
not the current pointer.
Devote a single bit to mboxbsy- and set aside bits for output mbox registers
that we need to pick up- we can have at least one command which does not
have any defined output registers (MBOX_EXECUTE_FIRMWARE).
MFC after: 2 weeks
2001-12-11 00:18:45 +00:00
|
|
|
#if BYTE_ORDER == BIG_ENDIAN
|
|
|
|
|
#ifdef ISP_SBUS_SUPPORTED
|
|
|
|
|
#define ISP_IOXPUT_8(isp, s, d) *(d) = s
|
|
|
|
|
#define ISP_IOXPUT_16(isp, s, d) \
|
|
|
|
|
*(d) = (isp->isp_bustype == ISP_BT_SBUS)? s : bswap16(s)
|
|
|
|
|
#define ISP_IOXPUT_32(isp, s, d) \
|
|
|
|
|
*(d) = (isp->isp_bustype == ISP_BT_SBUS)? s : bswap32(s)
|
|
|
|
|
#define ISP_IOXGET_8(isp, s, d) d = (*((u_int8_t *)s))
|
|
|
|
|
#define ISP_IOXGET_16(isp, s, d) \
|
|
|
|
|
d = (isp->isp_bustype == ISP_BT_SBUS)? \
|
|
|
|
|
*((u_int16_t *)s) : bswap16(*((u_int16_t *)s))
|
|
|
|
|
#define ISP_IOXGET_32(isp, s, d) \
|
|
|
|
|
d = (isp->isp_bustype == ISP_BT_SBUS)? \
|
|
|
|
|
*((u_int32_t *)s) : bswap32(*((u_int32_t *)s))
|
|
|
|
|
#else
|
|
|
|
|
#define ISP_IOXPUT_8(isp, s, d) *(d) = s
|
|
|
|
|
#define ISP_IOXPUT_16(isp, s, d) *(d) = bswap16(s)
|
|
|
|
|
#define ISP_IOXPUT_32(isp, s, d) *(d) = bswap32(s)
|
|
|
|
|
#define ISP_IOXGET_8(isp, s, d) d = (*((u_int8_t *)s))
|
|
|
|
|
#define ISP_IOXGET_16(isp, s, d) d = bswap16(*((u_int16_t *)s))
|
|
|
|
|
#define ISP_IOXGET_32(isp, s, d) d = bswap32(*((u_int32_t *)s))
|
|
|
|
|
#endif
|
|
|
|
|
#define ISP_SWIZZLE_NVRAM_WORD(isp, rp) *rp = bswap16(*rp)
|
|
|
|
|
#else
|
|
|
|
|
#define ISP_IOXPUT_8(isp, s, d) *(d) = s
|
|
|
|
|
#define ISP_IOXPUT_16(isp, s, d) *(d) = s
|
|
|
|
|
#define ISP_IOXPUT_32(isp, s, d) *(d) = s
|
|
|
|
|
#define ISP_IOXGET_8(isp, s, d) d = *(s)
|
|
|
|
|
#define ISP_IOXGET_16(isp, s, d) d = *(s)
|
|
|
|
|
#define ISP_IOXGET_32(isp, s, d) d = *(s)
|
|
|
|
|
#define ISP_SWIZZLE_NVRAM_WORD(isp, rp)
|
|
|
|
|
#endif
|
2000-08-01 06:29:55 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Includes of common header files
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#include <dev/isp/ispreg.h>
|
|
|
|
|
#include <dev/isp/ispvar.h>
|
|
|
|
|
#include <dev/isp/ispmbox.h>
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* isp_osinfo definiitions && shorthand
|
|
|
|
|
*/
|
|
|
|
|
#define SIMQFRZ_RESOURCE 0x1
|
|
|
|
|
#define SIMQFRZ_LOOPDOWN 0x2
|
|
|
|
|
#define SIMQFRZ_TIMED 0x4
|
|
|
|
|
|
|
|
|
|
#define isp_sim isp_osinfo.sim
|
|
|
|
|
#define isp_path isp_osinfo.path
|
|
|
|
|
#define isp_sim2 isp_osinfo.sim2
|
|
|
|
|
#define isp_path2 isp_osinfo.path2
|
2001-03-01 02:15:58 +00:00
|
|
|
#define isp_dev isp_osinfo.dev
|
2000-08-01 06:29:55 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* prototypes for isp_pci && isp_freebsd to share
|
|
|
|
|
*/
|
|
|
|
|
extern void isp_attach(struct ispsoftc *);
|
|
|
|
|
extern void isp_uninit(struct ispsoftc *);
|
1998-04-22 17:54:58 +00:00
|
|
|
|
2000-08-01 06:29:55 +00:00
|
|
|
/*
|
|
|
|
|
* Platform private flags
|
|
|
|
|
*/
|
2000-06-27 19:22:13 +00:00
|
|
|
#define ISP_SPRIV_ERRSET 0x1
|
|
|
|
|
#define ISP_SPRIV_INWDOG 0x2
|
|
|
|
|
#define ISP_SPRIV_GRACE 0x4
|
|
|
|
|
#define ISP_SPRIV_DONE 0x8
|
|
|
|
|
|
|
|
|
|
#define XS_CMD_S_WDOG(sccb) (sccb)->ccb_h.spriv_field0 |= ISP_SPRIV_INWDOG
|
|
|
|
|
#define XS_CMD_C_WDOG(sccb) (sccb)->ccb_h.spriv_field0 &= ~ISP_SPRIV_INWDOG
|
|
|
|
|
#define XS_CMD_WDOG_P(sccb) ((sccb)->ccb_h.spriv_field0 & ISP_SPRIV_INWDOG)
|
|
|
|
|
|
|
|
|
|
#define XS_CMD_S_GRACE(sccb) (sccb)->ccb_h.spriv_field0 |= ISP_SPRIV_GRACE
|
|
|
|
|
#define XS_CMD_C_GRACE(sccb) (sccb)->ccb_h.spriv_field0 &= ~ISP_SPRIV_GRACE
|
|
|
|
|
#define XS_CMD_GRACE_P(sccb) ((sccb)->ccb_h.spriv_field0 & ISP_SPRIV_GRACE)
|
|
|
|
|
|
|
|
|
|
#define XS_CMD_S_DONE(sccb) (sccb)->ccb_h.spriv_field0 |= ISP_SPRIV_DONE
|
|
|
|
|
#define XS_CMD_C_DONE(sccb) (sccb)->ccb_h.spriv_field0 &= ~ISP_SPRIV_DONE
|
|
|
|
|
#define XS_CMD_DONE_P(sccb) ((sccb)->ccb_h.spriv_field0 & ISP_SPRIV_DONE)
|
|
|
|
|
|
|
|
|
|
#define XS_CMD_S_CLEAR(sccb) (sccb)->ccb_h.spriv_field0 = 0
|
1999-07-02 23:10:34 +00:00
|
|
|
/*
|
2000-08-01 06:29:55 +00:00
|
|
|
* Platform specific inline functions
|
1999-07-02 23:10:34 +00:00
|
|
|
*/
|
2000-08-01 06:29:55 +00:00
|
|
|
|
|
|
|
|
static INLINE void isp_mbox_wait_complete(struct ispsoftc *);
|
|
|
|
|
static INLINE void
|
|
|
|
|
isp_mbox_wait_complete(struct ispsoftc *isp)
|
|
|
|
|
{
|
2000-10-17 18:18:14 +00:00
|
|
|
if (isp->isp_osinfo.intsok) {
|
2002-02-04 21:04:25 +00:00
|
|
|
int lim = ((isp->isp_mbxwrk0)? 120 : 20) * hz;
|
2000-10-17 18:18:14 +00:00
|
|
|
isp->isp_osinfo.mboxwaiting = 1;
|
|
|
|
|
(void) msleep(&isp->isp_osinfo.mboxwaiting,
|
2002-02-04 21:04:25 +00:00
|
|
|
&isp->isp_lock, PRIBIO, "isp_mboxwaiting", lim);
|
2000-10-17 18:18:14 +00:00
|
|
|
if (isp->isp_mboxbsy != 0) {
|
2001-01-09 02:47:56 +00:00
|
|
|
isp_prt(isp, ISP_LOGWARN,
|
|
|
|
|
"Interrupting Mailbox Command (0x%x) Timeout",
|
2001-01-15 18:36:09 +00:00
|
|
|
isp->isp_lastmbxcmd);
|
2000-10-17 18:18:14 +00:00
|
|
|
isp->isp_mboxbsy = 0;
|
|
|
|
|
}
|
|
|
|
|
isp->isp_osinfo.mboxwaiting = 0;
|
|
|
|
|
} else {
|
2002-02-04 21:04:25 +00:00
|
|
|
int lim = ((isp->isp_mbxwrk0)? 240 : 60) * 10000;
|
2000-08-01 06:29:55 +00:00
|
|
|
int j;
|
2002-02-04 21:04:25 +00:00
|
|
|
for (j = 0; j < lim; j++) {
|
2001-08-31 21:39:04 +00:00
|
|
|
u_int16_t isr, sema, mbox;
|
2000-08-01 06:29:55 +00:00
|
|
|
if (isp->isp_mboxbsy == 0) {
|
|
|
|
|
break;
|
|
|
|
|
}
|
2001-08-31 21:39:04 +00:00
|
|
|
if (ISP_READ_ISR(isp, &isr, &sema, &mbox)) {
|
|
|
|
|
isp_intr(isp, isr, sema, mbox);
|
|
|
|
|
if (isp->isp_mboxbsy == 0) {
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
USEC_DELAY(500);
|
2000-08-01 06:29:55 +00:00
|
|
|
}
|
|
|
|
|
if (isp->isp_mboxbsy != 0) {
|
2001-01-09 02:47:56 +00:00
|
|
|
isp_prt(isp, ISP_LOGWARN,
|
|
|
|
|
"Polled Mailbox Command (0x%x) Timeout",
|
2001-01-15 18:36:09 +00:00
|
|
|
isp->isp_lastmbxcmd);
|
2000-08-01 06:29:55 +00:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
1999-03-17 05:04:39 +00:00
|
|
|
|
2000-08-01 06:29:55 +00:00
|
|
|
static INLINE u_int64_t nanotime_sub(struct timespec *, struct timespec *);
|
|
|
|
|
static INLINE u_int64_t
|
|
|
|
|
nanotime_sub(struct timespec *b, struct timespec *a)
|
|
|
|
|
{
|
|
|
|
|
u_int64_t elapsed;
|
|
|
|
|
struct timespec x = *b;
|
|
|
|
|
timespecsub(&x, a);
|
|
|
|
|
elapsed = GET_NANOSEC(&x);
|
|
|
|
|
if (elapsed == 0)
|
|
|
|
|
elapsed++;
|
|
|
|
|
return (elapsed);
|
|
|
|
|
}
|
1999-03-17 05:04:39 +00:00
|
|
|
|
2000-08-01 06:29:55 +00:00
|
|
|
static INLINE char *strncat(char *, const char *, size_t);
|
|
|
|
|
static INLINE char *
|
2000-07-04 01:04:35 +00:00
|
|
|
strncat(char *d, const char *s, size_t c)
|
|
|
|
|
{
|
|
|
|
|
char *t = d;
|
|
|
|
|
|
|
|
|
|
if (c) {
|
|
|
|
|
while (*d)
|
|
|
|
|
d++;
|
|
|
|
|
while ((*d++ = *s++)) {
|
|
|
|
|
if (--c == 0) {
|
|
|
|
|
*d = '\0';
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return (t);
|
|
|
|
|
}
|
1999-03-17 05:04:39 +00:00
|
|
|
|
2000-08-01 06:29:55 +00:00
|
|
|
/*
|
|
|
|
|
* Common inline functions
|
|
|
|
|
*/
|
1999-03-17 05:04:39 +00:00
|
|
|
|
1999-10-17 18:48:16 +00:00
|
|
|
#include <dev/isp/isp_inline.h>
|
1998-04-22 17:54:58 +00:00
|
|
|
#endif /* _ISP_FREEBSD_H */
|
