FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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/* $NetBSD: admpci.c,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */
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/*-
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* Copyright (c) 2007 David Young. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* 3. The name of the author may not be used to endorse or promote
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* products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
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* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 2006 Itronix Inc.
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* All rights reserved.
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*
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* Written by Garrett D'Amore for Itronix Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Itronix Inc. may not be used to endorse
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* or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/interrupt.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_extern.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/pmap.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcib_private.h>
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#include "pcib_if.h"
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2008-09-10 03:49:08 +00:00
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#include <mips/adm5120/adm5120reg.h>
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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#ifdef ADMPCI_DEBUG
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int admpci_debug = 1;
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#define ADMPCI_DPRINTF(__fmt, ...) \
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do { \
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if (admpci_debug) \
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printf((__fmt), __VA_ARGS__); \
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} while (/*CONSTCOND*/0)
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#else /* !ADMPCI_DEBUG */
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#define ADMPCI_DPRINTF(__fmt, ...) do { } while (/*CONSTCOND*/0)
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#endif /* ADMPCI_DEBUG */
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#define ADMPCI_TAG_BUS_MASK __BITS(23, 16)
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/* Bit 11 is reserved. It selects the AHB-PCI bridge. Let device 0
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* be the bridge. For all other device numbers, let bit[11] == 0.
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*/
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#define ADMPCI_TAG_DEVICE_MASK __BITS(15, 11)
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#define ADMPCI_TAG_DEVICE_SUBMASK __BITS(15, 12)
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#define ADMPCI_TAG_DEVICE_BRIDGE __BIT(11)
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#define ADMPCI_TAG_FUNCTION_MASK __BITS(10, 8)
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#define ADMPCI_TAG_REGISTER_MASK __BITS(7, 0)
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#define ADMPCI_MAX_DEVICE
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struct admpci_softc {
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device_t sc_dev;
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bus_space_tag_t sc_st;
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/* Access to PCI config registers */
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bus_space_handle_t sc_addrh;
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bus_space_handle_t sc_datah;
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int sc_busno;
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struct rman sc_mem_rman;
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struct rman sc_io_rman;
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struct rman sc_irq_rman;
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uint32_t sc_mem;
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uint32_t sc_io;
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};
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static int
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admpci_probe(device_t dev)
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{
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return (0);
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}
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static int
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admpci_attach(device_t dev)
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{
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int busno = 0;
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struct admpci_softc *sc = device_get_softc(dev);
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sc->sc_dev = dev;
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sc->sc_busno = busno;
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/* Use KSEG1 to access IO ports for it is uncached */
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sc->sc_io = MIPS_PHYS_TO_KSEG1(ADM5120_BASE_PCI_IO);
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sc->sc_io_rman.rm_type = RMAN_ARRAY;
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sc->sc_io_rman.rm_descr = "ADMPCI I/O Ports";
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if (rman_init(&sc->sc_io_rman) != 0 ||
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rman_manage_region(&sc->sc_io_rman, 0, 0xffff) != 0) {
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panic("admpci_attach: failed to set up I/O rman");
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}
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/* Use KSEG1 to access PCI memory for it is uncached */
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sc->sc_mem = MIPS_PHYS_TO_KSEG1(ADM5120_BASE_PCI_MEM);
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sc->sc_mem_rman.rm_type = RMAN_ARRAY;
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sc->sc_mem_rman.rm_descr = "ADMPCI PCI Memory";
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if (rman_init(&sc->sc_mem_rman) != 0 ||
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rman_manage_region(&sc->sc_mem_rman,
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sc->sc_mem, sc->sc_mem + 0x100000) != 0) {
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panic("admpci_attach: failed to set up memory rman");
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}
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sc->sc_irq_rman.rm_type = RMAN_ARRAY;
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sc->sc_irq_rman.rm_descr = "ADMPCI PCI IRQs";
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if (rman_init(&sc->sc_irq_rman) != 0 ||
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rman_manage_region(&sc->sc_irq_rman, 1, 31) != 0)
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panic("admpci_attach: failed to set up IRQ rman");
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if (bus_space_map(sc->sc_st, ADM5120_BASE_PCI_CONFADDR, 4, 0,
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&sc->sc_addrh) != 0) {
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device_printf(sc->sc_dev, "unable to address space\n");
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panic("bus_space_map failed");
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}
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if (bus_space_map(sc->sc_st, ADM5120_BASE_PCI_CONFDATA, 4, 0,
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&sc->sc_datah) != 0) {
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device_printf(sc->sc_dev, "unable to address space\n");
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panic("bus_space_map failed");
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}
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2015-09-16 23:34:51 +00:00
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device_add_child(dev, "pci", -1);
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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return (bus_generic_attach(dev));
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}
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static int
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admpci_maxslots(device_t dev)
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{
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return (PCI_SLOTMAX);
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}
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static uint32_t
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admpci_make_addr(int bus, int slot, int func, int reg)
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{
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return (0x80000000 | (bus << 16) | (slot << 11) | (func << 8) | reg);
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}
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static uint32_t
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admpci_read_config(device_t dev, int bus, int slot, int func, int reg,
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int bytes)
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{
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struct admpci_softc *sc = device_get_softc(dev);
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uint32_t data;
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uint32_t shift, mask;
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bus_addr_t addr;
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ADMPCI_DPRINTF("%s: sc %p tag (%x, %x, %x) reg %d\n", __func__,
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(void *)sc, bus, slot, func, reg);
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addr = admpci_make_addr(bus, slot, func, reg);
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ADMPCI_DPRINTF("%s: sc_addrh %p sc_datah %p addr %p\n", __func__,
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(void *)sc->sc_addrh, (void *)sc->sc_datah, (void *)addr);
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bus_space_write_4(sc->sc_io, sc->sc_addrh, 0, addr);
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data = bus_space_read_4(sc->sc_io, sc->sc_datah, 0);
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switch (reg % 4) {
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case 3:
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shift = 24;
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break;
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case 2:
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shift = 16;
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break;
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case 1:
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shift = 8;
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break;
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default:
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shift = 0;
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break;
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}
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switch (bytes) {
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case 1:
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|
|
mask = 0xff;
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|
data = (data >> shift) & mask;
|
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|
break;
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case 2:
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|
mask = 0xffff;
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if (reg % 4 == 0)
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data = data & mask;
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else
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data = (data >> 16) & mask;
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break;
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|
|
case 4:
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|
|
break;
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|
default:
|
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|
|
panic("%s: wrong bytes count", __func__);
|
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|
|
break;
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|
|
}
|
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|
|
ADMPCI_DPRINTF("%s: read 0x%x\n", __func__, data);
|
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|
|
return (data);
|
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|
|
}
|
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|
|
|
|
|
|
static void
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|
|
admpci_write_config(device_t dev, int bus, int slot, int func, int reg,
|
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|
|
uint32_t data, int bytes)
|
|
|
|
{
|
|
|
|
struct admpci_softc *sc = device_get_softc(dev);
|
|
|
|
bus_addr_t addr;
|
|
|
|
uint32_t reg_data;
|
|
|
|
uint32_t shift, mask;
|
|
|
|
|
|
|
|
ADMPCI_DPRINTF("%s: sc %p tag (%x, %x, %x) reg %d\n", __func__,
|
|
|
|
(void *)sc, bus, slot, func, reg);
|
|
|
|
|
|
|
|
if (bytes != 4) {
|
|
|
|
reg_data = admpci_read_config(dev, bus, slot, func, reg, 4);
|
|
|
|
|
|
|
|
switch (reg % 4) {
|
|
|
|
case 3:
|
|
|
|
shift = 24;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
shift = 16;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
shift = 8;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
shift = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (bytes) {
|
|
|
|
case 1:
|
|
|
|
mask = 0xff;
|
|
|
|
data = (reg_data & ~ (mask << shift)) | (data << shift);
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
mask = 0xffff;
|
|
|
|
if (reg % 4 == 0)
|
|
|
|
data = (reg_data & ~mask) | data;
|
|
|
|
else
|
|
|
|
data = (reg_data & ~ (mask << shift)) |
|
|
|
|
(data << shift);
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
panic("%s: wrong bytes count", __func__);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
addr = admpci_make_addr(bus, slot, func, reg);
|
|
|
|
|
|
|
|
ADMPCI_DPRINTF("%s: sc_addrh %p sc_datah %p addr %p\n", __func__,
|
|
|
|
(void *)sc->sc_addrh, (void *)sc->sc_datah, (void *)addr);
|
|
|
|
|
|
|
|
bus_space_write_4(sc->sc_io, sc->sc_addrh, 0, addr);
|
|
|
|
bus_space_write_4(sc->sc_io, sc->sc_datah, 0, data);
|
|
|
|
}
|
|
|
|
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|
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static int
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admpci_route_interrupt(device_t pcib, device_t dev, int pin)
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|
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{
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/* TODO: implement */
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return (0);
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}
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static int
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admpci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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{
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struct admpci_softc *sc = device_get_softc(dev);
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switch (which) {
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case PCIB_IVAR_DOMAIN:
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*result = 0;
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return (0);
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case PCIB_IVAR_BUS:
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*result = sc->sc_busno;
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return (0);
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}
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return (ENOENT);
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}
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static int
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admpci_write_ivar(device_t dev, device_t child, int which, uintptr_t result)
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{
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struct admpci_softc * sc = device_get_softc(dev);
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switch (which) {
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case PCIB_IVAR_BUS:
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sc->sc_busno = result;
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return (0);
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}
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return (ENOENT);
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}
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static struct resource *
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admpci_alloc_resource(device_t bus, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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return (NULL);
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#if 0
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struct admpci_softc *sc = device_get_softc(bus);
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struct resource *rv = NULL;
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struct rman *rm;
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bus_space_handle_t bh = 0;
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switch (type) {
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case SYS_RES_IRQ:
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rm = &sc->sc_irq_rman;
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break;
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case SYS_RES_MEMORY:
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rm = &sc->sc_mem_rman;
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bh = sc->sc_mem;
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break;
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case SYS_RES_IOPORT:
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rm = &sc->sc_io_rman;
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bh = sc->sc_io;
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break;
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default:
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return (NULL);
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}
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rv = rman_reserve_resource(rm, start, end, count, flags, child);
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if (rv == NULL)
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return (NULL);
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rman_set_rid(rv, *rid);
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if (type != SYS_RES_IRQ) {
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bh += (rman_get_start(rv));
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rman_set_bustag(rv, sc->sc_st);
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rman_set_bushandle(rv, bh);
|
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|
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if (flags & RF_ACTIVE) {
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if (bus_activate_resource(child, type, *rid, rv)) {
|
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|
|
rman_release_resource(rv);
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|
|
return (NULL);
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|
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}
|
|
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|
}
|
|
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|
}
|
|
|
|
return (rv);
|
|
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#endif
|
|
|
|
}
|
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|
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static int
|
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|
|
admpci_activate_resource(device_t bus, device_t child, int type, int rid,
|
|
|
|
struct resource *r)
|
|
|
|
{
|
|
|
|
bus_space_handle_t p;
|
|
|
|
int error;
|
|
|
|
|
|
|
|
if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) {
|
|
|
|
error = bus_space_map(rman_get_bustag(r),
|
|
|
|
rman_get_bushandle(r), rman_get_size(r), 0, &p);
|
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|
|
if (error)
|
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|
|
return (error);
|
|
|
|
rman_set_bushandle(r, p);
|
|
|
|
}
|
|
|
|
return (rman_activate_resource(r));
|
|
|
|
}
|
|
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|
|
|
|
|
static int
|
|
|
|
admpci_setup_intr(device_t dev, device_t child, struct resource *ires,
|
|
|
|
int flags, driver_filter_t *filt, driver_intr_t *handler,
|
|
|
|
void *arg, void **cookiep)
|
|
|
|
{
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
struct admpci_softc *sc = device_get_softc(dev);
|
|
|
|
struct intr_event *event;
|
|
|
|
int irq, error;
|
|
|
|
|
|
|
|
irq = rman_get_start(ires);
|
|
|
|
if (irq >= ICU_LEN || irq == 2)
|
|
|
|
panic("%s: bad irq or type", __func__);
|
|
|
|
|
|
|
|
event = sc->sc_eventstab[irq];
|
|
|
|
if (event == NULL) {
|
|
|
|
error = intr_event_create(&event, (void *)irq, 0,
|
|
|
|
(void (*)(void *))NULL, "admpci intr%d:", irq);
|
|
|
|
if (error)
|
|
|
|
return 0;
|
|
|
|
sc->sc_eventstab[irq] = event;
|
|
|
|
}
|
|
|
|
|
|
|
|
intr_event_add_handler(event, device_get_nameunit(child), filt,
|
|
|
|
handler, arg, intr_priority(flags), flags, cookiep);
|
|
|
|
|
|
|
|
/* Enable it, set trigger mode. */
|
|
|
|
sc->sc_imask &= ~(1 << irq);
|
|
|
|
sc->sc_elcr &= ~(1 << irq);
|
|
|
|
|
|
|
|
admpci_set_icus(sc);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
admpci_teardown_intr(device_t dev, device_t child, struct resource *res,
|
|
|
|
void *cookie)
|
|
|
|
{
|
|
|
|
|
|
|
|
return (intr_event_remove_handler(cookie));
|
|
|
|
}
|
|
|
|
|
|
|
|
static device_method_t admpci_methods[] = {
|
|
|
|
/* Device interface */
|
|
|
|
DEVMETHOD(device_probe, admpci_probe),
|
|
|
|
DEVMETHOD(device_attach, admpci_attach),
|
|
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
|
|
DEVMETHOD(device_suspend, bus_generic_suspend),
|
|
|
|
DEVMETHOD(device_resume, bus_generic_resume),
|
|
|
|
|
|
|
|
/* Bus interface */
|
|
|
|
DEVMETHOD(bus_read_ivar, admpci_read_ivar),
|
|
|
|
DEVMETHOD(bus_write_ivar, admpci_write_ivar),
|
|
|
|
DEVMETHOD(bus_alloc_resource, admpci_alloc_resource),
|
|
|
|
DEVMETHOD(bus_release_resource, bus_generic_release_resource),
|
|
|
|
DEVMETHOD(bus_activate_resource, admpci_activate_resource),
|
|
|
|
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
|
|
|
DEVMETHOD(bus_setup_intr, admpci_setup_intr),
|
|
|
|
DEVMETHOD(bus_teardown_intr, admpci_teardown_intr),
|
|
|
|
|
|
|
|
/* pcib interface */
|
|
|
|
DEVMETHOD(pcib_maxslots, admpci_maxslots),
|
|
|
|
DEVMETHOD(pcib_read_config, admpci_read_config),
|
|
|
|
DEVMETHOD(pcib_write_config, admpci_write_config),
|
|
|
|
DEVMETHOD(pcib_route_interrupt, admpci_route_interrupt),
|
|
|
|
|
2011-11-22 21:28:20 +00:00
|
|
|
DEVMETHOD_END
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t admpci_driver = {
|
|
|
|
"pcib",
|
|
|
|
admpci_methods,
|
|
|
|
sizeof(struct admpci_softc),
|
|
|
|
};
|
|
|
|
|
|
|
|
static devclass_t admpci_devclass;
|
|
|
|
|
|
|
|
DRIVER_MODULE(admpci, obio, admpci_driver, admpci_devclass, 0, 0);
|