2015-03-20 19:51:24 +00:00
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/*-
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* Copyright (c) 2015 Luiz Otavio O Souza <loos@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Maxim DS1307 RTC registers.
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*/
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#ifndef _DS1307REG_H_
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#define _DS1307REG_H_
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#define DS1307_SECS 0x00
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#define DS1307_SECS_MASK 0x7f
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#define DS1307_SECS_CH 0x80
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#define DS1307_MINS 0x01
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#define DS1307_MINS_MASK 0x7f
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#define DS1307_HOUR 0x02
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#define DS1307_HOUR_MASK 0x3f
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#define DS1307_WEEKDAY 0x03
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#define DS1307_WEEKDAY_MASK 0x07
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#define DS1307_DATE 0x04
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#define DS1307_DATE_MASK 0x3f
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#define DS1307_MONTH 0x05
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#define DS1307_MONTH_MASK 0x1f
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#define DS1307_YEAR 0x06
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#define DS1307_YEAR_MASK 0xff
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#define DS1307_CONTROL 0x07
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#define DS1307_CTRL_OUT (1 << 7)
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2016-04-05 03:27:33 +00:00
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#define MCP7941X_CTRL_SQWE (1 << 6)
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2015-03-20 19:51:24 +00:00
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#define DS1307_CTRL_SQWE (1 << 4)
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#define DS1307_CTRL_RS1 (1 << 1)
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#define DS1307_CTRL_RS0 (1 << 0)
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#define DS1307_CTRL_RS_MASK (DS1307_CTRL_RS1 | DS1307_CTRL_RS0)
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#define DS1307_CTRL_MASK 0x93
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#endif /* _DS1307REG_H_ */
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