2015-08-24 19:32:03 +00:00
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/*-
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* Copyright (C) 2012 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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__FBSDID("$FreeBSD$");
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#ifndef __IOAT_H__
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#define __IOAT_H__
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#include <sys/param.h>
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#include <machine/bus.h>
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/*
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* This file defines the public interface to the IOAT driver.
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*/
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/*
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* Enables an interrupt for this operation. Typically, you would only enable
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* this on the last operation in a group
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*/
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#define DMA_INT_EN 0x1
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2015-10-26 03:30:38 +00:00
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/*
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* Like M_NOWAIT. Operations will return NULL if they cannot allocate a
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* descriptor without blocking.
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*/
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#define DMA_NO_WAIT 0x2
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#define DMA_ALL_FLAGS (DMA_INT_EN | DMA_NO_WAIT)
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2015-08-24 19:32:03 +00:00
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typedef void *bus_dmaengine_t;
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struct bus_dmadesc;
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typedef void (*bus_dmaengine_callback_t)(void *arg);
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/*
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* Called first to acquire a reference to the DMA channel
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*/
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bus_dmaengine_t ioat_get_dmaengine(uint32_t channel_index);
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2015-10-24 23:45:33 +00:00
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/* Release the DMA channel */
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void ioat_put_dmaengine(bus_dmaengine_t dmaengine);
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2015-08-24 19:32:03 +00:00
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/*
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* Acquire must be called before issuing an operation to perform. Release is
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* called after. Multiple operations can be issued within the context of one
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* acquire and release
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*/
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void ioat_acquire(bus_dmaengine_t dmaengine);
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void ioat_release(bus_dmaengine_t dmaengine);
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2015-10-26 19:34:12 +00:00
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/*
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* Issue a blockfill operation. The 64-bit pattern 'fillpattern' is written to
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* 'len' physically contiguous bytes at 'dst'.
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2015-10-28 02:37:24 +00:00
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*
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* Only supported on devices with the BFILL capability.
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2015-10-26 19:34:12 +00:00
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*/
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struct bus_dmadesc *ioat_blockfill(bus_dmaengine_t dmaengine, bus_addr_t dst,
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uint64_t fillpattern, bus_size_t len, bus_dmaengine_callback_t callback_fn,
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void *callback_arg, uint32_t flags);
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2015-08-24 19:32:03 +00:00
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/* Issues the copy data operation */
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struct bus_dmadesc *ioat_copy(bus_dmaengine_t dmaengine, bus_addr_t dst,
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bus_addr_t src, bus_size_t len, bus_dmaengine_callback_t callback_fn,
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void *callback_arg, uint32_t flags);
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/*
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* Issues a null operation. This issues the operation to the hardware, but the
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* hardware doesn't do anything with it.
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*/
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struct bus_dmadesc *ioat_null(bus_dmaengine_t dmaengine,
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bus_dmaengine_callback_t callback_fn, void *callback_arg, uint32_t flags);
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#endif /* __IOAT_H__ */
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