2008-06-06 05:00:49 +00:00
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/*-
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2008-06-11 06:53:55 +00:00
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* Copyright (c) 2008 Benno Rice. All rights reserved.
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2008-06-06 05:00:49 +00:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*
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*/
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#ifndef _IF_SMCVAR_H_
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#define _IF_SMCVAR_H_
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struct smc_softc {
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struct ifnet *smc_ifp;
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device_t smc_dev;
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struct mtx smc_mtx;
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u_int smc_chip;
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u_int smc_rev;
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u_int smc_mask;
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/* Resources */
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int smc_usemem;
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int smc_reg_rid;
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int smc_irq_rid;
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struct resource *smc_reg;
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struct resource *smc_irq;
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void *smc_ih;
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/* Tasks */
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struct taskqueue *smc_tq;
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struct task smc_rx;
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struct task smc_tx;
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struct mbuf *smc_pending;
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struct callout smc_watchdog;
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/* MII support */
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device_t smc_miibus;
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struct callout smc_mii_tick_ch;
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void (*smc_mii_tick)(void *);
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void (*smc_mii_mediachg)(struct smc_softc *);
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int (*smc_mii_mediaioctl)(struct smc_softc *,
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struct ifreq *, u_long);
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/* DMA support */
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void (*smc_read_packet)(struct smc_softc *,
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bus_addr_t, uint8_t *, bus_size_t);
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void *smc_read_arg;
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};
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#define SMC_LOCK(sc) mtx_lock_spin(&(sc)->smc_mtx)
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#define SMC_UNLOCK(sc) mtx_unlock_spin(&(sc)->smc_mtx)
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#define SMC_ASSERT_LOCKED(sc) mtx_assert(&(sc)->smc_mtx, MA_OWNED)
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#define SMC_RX_PRIORITY 0
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#define SMC_TX_PRIORITY 10
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int smc_probe(device_t);
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int smc_attach(device_t);
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int smc_detach(device_t);
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int smc_miibus_readreg(device_t, int, int);
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void smc_miibus_writereg(device_t, int, int, int);
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void smc_miibus_statchg(device_t);
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#endif /* _IF_SMCVAR_H_ */
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