2012-05-17 10:11:18 +00:00
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.\"
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.\" Copyright (c) 2012 The FreeBSD Foundation
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.\" All rights reserved.
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.\"
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.\" This documentation was written by Semihalf under sponsorship from
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.\" the FreeBSD Foundation.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd March 8, 2012
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.Dt NAND 4
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.Os
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.Sh NAME
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.Nm nand
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.Nd NAND Flash framework
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.Sh SYNOPSIS
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.Cd "device nand"
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.Sh DESCRIPTION
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The
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.Fx
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.Nm
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framework consists of a set of interfaces that aim to provide an extensible,
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object oriented environement for NAND controllers and NAND Flash memory chips
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from various hardware vendors, and to allow for uniform and flexible
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management of the NAND devices.
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It comprises of the following major components:
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2012-05-17 10:11:18 +00:00
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.Bl -bullet
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.It
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NAND Flash controller (NFC) interface.
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.Pp
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Defines methods which allow to send commands as well as send/receive data
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between the controller and a NAND chip.
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Back-end drivers for specific NAND
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2012-05-17 10:11:18 +00:00
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controllers plug into this interface and implement low-level routines for a
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given NAND controller.
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.Pp
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2016-06-08 08:50:35 +00:00
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This layer implements basic functionality of a NAND Flash controller.
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It allows to send command and address to chip, drive CS (chip select line),
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as well as read/write to the selected NAND chip.
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This layer is independent of
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2012-05-17 10:11:18 +00:00
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NAND chip devices actually connected to the controller.
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.It
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NAND chip interface.
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.Pp
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2016-06-08 08:50:35 +00:00
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Provides basic operations like read page, program page, erase block.
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Currently three generic classes of drivers are available, which provide
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support for the following chips:
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2012-05-17 10:11:18 +00:00
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.Bl -bullet
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.It
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large page
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.It
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small page
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.It
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ONFI-compliant
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.El
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.Pp
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This layer implements basic operations to be performed on a NAND chip, like
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2016-06-08 08:50:35 +00:00
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read, program, erase, get status etc.
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Since these operations use specific
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2012-05-17 10:11:18 +00:00
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commands (depending on the vendor), each chip has potentially its own
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implementation of the commands set.
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.Pp
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The framework is extensible so it is also possible to create a custom command
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set for a non standard chip support.
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.It
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NANDbus.
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.Pp
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This layer is responsible for enumerating NAND chips in the system and
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establishing the hierarchy between chips and their supervising controllers.
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.Pp
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Its main purpose is detecting type of NAND chips connected to a given chip
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select (CS line).
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It also allows manages locking access to the NAND
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2012-05-17 10:11:18 +00:00
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controller.
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NANDbus passes requests from an active chip to the chip controller.
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2012-05-17 10:11:18 +00:00
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.It
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NAND character / GEOM device.
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.Pp
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For each NAND chip found in a system a character and GEOM devices are created
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which allows to read / write directly to a device, as well as perform other
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specific operations (like via ioctl).
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.Pp
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There are two GEOM devices created for each NAND chip:
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.Bl -bullet
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.It
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raw device
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.It
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normal device
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.El
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.Pp
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Raw device allows to bypass ECC checking when reading/writing to it, while
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normal device always uses ECC algorithm to validate the read data.
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.Pp
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NAND character devices will be created for each NAND chip detected while
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probing the NAND controller.
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.El
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.Sh SEE ALSO
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.Xr libnandfs 3 ,
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.Xr gnand 4 ,
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.Xr nandsim 4 ,
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.Xr nandfs 5 ,
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.Xr makefs 8 ,
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.Xr mount_nandfs 8 ,
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.Xr nandfs 8 ,
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.Xr nandsim 8 ,
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.Xr nandtool 8 ,
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.Xr newfs_nandfs 8 ,
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.Xr umount_nandfs 8
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.Sh STANDARDS
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Open NAND Flash Interface Working Group
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.Pq Vt ONFI .
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.Sh HISTORY
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The
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.Nm
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framework support first appeared in
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.Fx 10.0 .
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2014-06-26 21:46:14 +00:00
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.Sh AUTHORS
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.An -nosplit
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2012-05-17 10:11:18 +00:00
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The
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.Nm
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framework was designed and developed by
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.An Grzegorz Bernacki .
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This manual page was written by
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.An Rafal Jaworowski .
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