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freebsd-nq/sys/dev/hwpmc/pmc_events.h

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MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
/*-
* Copyright (c) 2005 Joseph Koshy
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _DEV_HWPMC_PMC_EVENTS_H_
#define _DEV_HWPMC_PMC_EVENTS_H_
/*
* PMC event codes.
*
* __PMC_EV(CLASS, SYMBOLIC-NAME, VALUE, READABLE-NAME)
*
*/
/*
* AMD K7 Events, from "The AMD Athlon(tm) Processor x86 Code
* Optimization Guide" [Doc#22007K, Feb 2002]
*/
- Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order to reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources.
2008-10-09 14:55:45 +00:00
#define __PMC_EV_K7() \
__PMC_EV(K7, DC_ACCESSES) \
__PMC_EV(K7, DC_MISSES) \
__PMC_EV(K7, DC_REFILLS_FROM_L2) \
__PMC_EV(K7, DC_REFILLS_FROM_SYSTEM) \
__PMC_EV(K7, DC_WRITEBACKS) \
__PMC_EV(K7, L1_DTLB_MISS_AND_L2_DTLB_HITS) \
__PMC_EV(K7, L1_AND_L2_DTLB_MISSES) \
__PMC_EV(K7, MISALIGNED_REFERENCES) \
__PMC_EV(K7, IC_FETCHES) \
__PMC_EV(K7, IC_MISSES) \
__PMC_EV(K7, L1_ITLB_MISSES) \
__PMC_EV(K7, L1_L2_ITLB_MISSES) \
__PMC_EV(K7, RETIRED_INSTRUCTIONS) \
__PMC_EV(K7, RETIRED_OPS) \
__PMC_EV(K7, RETIRED_BRANCHES) \
__PMC_EV(K7, RETIRED_BRANCHES_MISPREDICTED) \
__PMC_EV(K7, RETIRED_TAKEN_BRANCHES) \
__PMC_EV(K7, RETIRED_TAKEN_BRANCHES_MISPREDICTED) \
__PMC_EV(K7, RETIRED_FAR_CONTROL_TRANSFERS) \
__PMC_EV(K7, RETIRED_RESYNC_BRANCHES) \
__PMC_EV(K7, INTERRUPTS_MASKED_CYCLES) \
__PMC_EV(K7, INTERRUPTS_MASKED_WHILE_PENDING_CYCLES) \
__PMC_EV(K7, HARDWARE_INTERRUPTS)
MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
#define PMC_EV_K7_FIRST PMC_EV_K7_DC_ACCESSES
#define PMC_EV_K7_LAST PMC_EV_K7_HARDWARE_INTERRUPTS
/*
* Intel P4 Events, from "IA-32 Intel(r) Architecture Software
* Developer's Manual, Volume 3: System Programming Guide" [245472-012]
*/
- Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order to reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources.
2008-10-09 14:55:45 +00:00
#define __PMC_EV_P4() \
__PMC_EV(P4, TC_DELIVER_MODE) \
__PMC_EV(P4, BPU_FETCH_REQUEST) \
__PMC_EV(P4, ITLB_REFERENCE) \
__PMC_EV(P4, MEMORY_CANCEL) \
__PMC_EV(P4, MEMORY_COMPLETE) \
__PMC_EV(P4, LOAD_PORT_REPLAY) \
__PMC_EV(P4, STORE_PORT_REPLAY) \
__PMC_EV(P4, MOB_LOAD_REPLAY) \
__PMC_EV(P4, PAGE_WALK_TYPE) \
__PMC_EV(P4, BSQ_CACHE_REFERENCE) \
__PMC_EV(P4, IOQ_ALLOCATION) \
__PMC_EV(P4, IOQ_ACTIVE_ENTRIES) \
__PMC_EV(P4, FSB_DATA_ACTIVITY) \
__PMC_EV(P4, BSQ_ALLOCATION) \
__PMC_EV(P4, BSQ_ACTIVE_ENTRIES) \
__PMC_EV(P4, SSE_INPUT_ASSIST) \
__PMC_EV(P4, PACKED_SP_UOP) \
__PMC_EV(P4, PACKED_DP_UOP) \
__PMC_EV(P4, SCALAR_SP_UOP) \
__PMC_EV(P4, SCALAR_DP_UOP) \
__PMC_EV(P4, 64BIT_MMX_UOP) \
__PMC_EV(P4, 128BIT_MMX_UOP) \
__PMC_EV(P4, X87_FP_UOP) \
__PMC_EV(P4, X87_SIMD_MOVES_UOP) \
__PMC_EV(P4, GLOBAL_POWER_EVENTS) \
__PMC_EV(P4, TC_MS_XFER) \
__PMC_EV(P4, UOP_QUEUE_WRITES) \
__PMC_EV(P4, RETIRED_MISPRED_BRANCH_TYPE) \
__PMC_EV(P4, RETIRED_BRANCH_TYPE) \
__PMC_EV(P4, RESOURCE_STALL) \
__PMC_EV(P4, WC_BUFFER) \
__PMC_EV(P4, B2B_CYCLES) \
__PMC_EV(P4, BNR) \
__PMC_EV(P4, SNOOP) \
__PMC_EV(P4, RESPONSE) \
__PMC_EV(P4, FRONT_END_EVENT) \
__PMC_EV(P4, EXECUTION_EVENT) \
__PMC_EV(P4, REPLAY_EVENT) \
__PMC_EV(P4, INSTR_RETIRED) \
__PMC_EV(P4, UOPS_RETIRED) \
__PMC_EV(P4, UOP_TYPE) \
__PMC_EV(P4, BRANCH_RETIRED) \
__PMC_EV(P4, MISPRED_BRANCH_RETIRED) \
__PMC_EV(P4, X87_ASSIST) \
__PMC_EV(P4, MACHINE_CLEAR)
MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
#define PMC_EV_P4_FIRST PMC_EV_P4_TC_DELIVER_MODE
#define PMC_EV_P4_LAST PMC_EV_P4_MACHINE_CLEAR
/* Intel Pentium Pro, P-II, P-III and Pentium-M style events */
- Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order to reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources.
2008-10-09 14:55:45 +00:00
#define __PMC_EV_P6() \
__PMC_EV(P6, DATA_MEM_REFS) \
__PMC_EV(P6, DCU_LINES_IN) \
__PMC_EV(P6, DCU_M_LINES_IN) \
__PMC_EV(P6, DCU_M_LINES_OUT) \
__PMC_EV(P6, DCU_MISS_OUTSTANDING) \
__PMC_EV(P6, IFU_FETCH) \
__PMC_EV(P6, IFU_FETCH_MISS) \
__PMC_EV(P6, ITLB_MISS) \
__PMC_EV(P6, IFU_MEM_STALL) \
__PMC_EV(P6, ILD_STALL) \
__PMC_EV(P6, L2_IFETCH) \
__PMC_EV(P6, L2_LD) \
__PMC_EV(P6, L2_ST) \
__PMC_EV(P6, L2_LINES_IN) \
__PMC_EV(P6, L2_LINES_OUT) \
__PMC_EV(P6, L2_M_LINES_INM) \
__PMC_EV(P6, L2_M_LINES_OUTM) \
__PMC_EV(P6, L2_RQSTS) \
__PMC_EV(P6, L2_ADS) \
__PMC_EV(P6, L2_DBUS_BUSY) \
__PMC_EV(P6, L2_DBUS_BUSY_RD) \
__PMC_EV(P6, BUS_DRDY_CLOCKS) \
__PMC_EV(P6, BUS_LOCK_CLOCKS) \
__PMC_EV(P6, BUS_REQ_OUTSTANDING) \
__PMC_EV(P6, BUS_TRAN_BRD) \
__PMC_EV(P6, BUS_TRAN_RFO) \
__PMC_EV(P6, BUS_TRANS_WB) \
__PMC_EV(P6, BUS_TRAN_IFETCH) \
__PMC_EV(P6, BUS_TRAN_INVAL) \
__PMC_EV(P6, BUS_TRAN_PWR) \
__PMC_EV(P6, BUS_TRANS_P) \
__PMC_EV(P6, BUS_TRANS_IO) \
__PMC_EV(P6, BUS_TRAN_DEF) \
__PMC_EV(P6, BUS_TRAN_BURST) \
__PMC_EV(P6, BUS_TRAN_ANY) \
__PMC_EV(P6, BUS_TRAN_MEM) \
__PMC_EV(P6, BUS_DATA_RCV) \
__PMC_EV(P6, BUS_BNR_DRV) \
__PMC_EV(P6, BUS_HIT_DRV) \
__PMC_EV(P6, BUS_HITM_DRV) \
__PMC_EV(P6, BUS_SNOOP_STALL) \
__PMC_EV(P6, FLOPS) \
__PMC_EV(P6, FP_COMPS_OPS_EXE) \
__PMC_EV(P6, FP_ASSIST) \
__PMC_EV(P6, MUL) \
__PMC_EV(P6, DIV) \
__PMC_EV(P6, CYCLES_DIV_BUSY) \
__PMC_EV(P6, LD_BLOCKS) \
__PMC_EV(P6, SB_DRAINS) \
__PMC_EV(P6, MISALIGN_MEM_REF) \
__PMC_EV(P6, EMON_KNI_PREF_DISPATCHED) \
__PMC_EV(P6, EMON_KNI_PREF_MISS) \
__PMC_EV(P6, INST_RETIRED) \
__PMC_EV(P6, UOPS_RETIRED) \
__PMC_EV(P6, INST_DECODED) \
__PMC_EV(P6, EMON_KNI_INST_RETIRED) \
__PMC_EV(P6, EMON_KNI_COMP_INST_RET) \
__PMC_EV(P6, HW_INT_RX) \
__PMC_EV(P6, CYCLES_INT_MASKED) \
__PMC_EV(P6, CYCLES_INT_PENDING_AND_MASKED) \
__PMC_EV(P6, BR_INST_RETIRED) \
__PMC_EV(P6, BR_MISS_PRED_RETIRED) \
__PMC_EV(P6, BR_TAKEN_RETIRED) \
__PMC_EV(P6, BR_MISS_PRED_TAKEN_RET) \
__PMC_EV(P6, BR_INST_DECODED) \
__PMC_EV(P6, BTB_MISSES) \
__PMC_EV(P6, BR_BOGUS) \
__PMC_EV(P6, BACLEARS) \
__PMC_EV(P6, RESOURCE_STALLS) \
__PMC_EV(P6, PARTIAL_RAT_STALLS) \
__PMC_EV(P6, SEGMENT_REG_LOADS) \
__PMC_EV(P6, CPU_CLK_UNHALTED) \
__PMC_EV(P6, MMX_INSTR_EXEC) \
__PMC_EV(P6, MMX_SAT_INSTR_EXEC) \
__PMC_EV(P6, MMX_UOPS_EXEC) \
__PMC_EV(P6, MMX_INSTR_TYPE_EXEC) \
__PMC_EV(P6, FP_MMX_TRANS) \
__PMC_EV(P6, MMX_ASSIST) \
__PMC_EV(P6, MMX_INSTR_RET) \
__PMC_EV(P6, SEG_RENAME_STALLS) \
__PMC_EV(P6, SEG_REG_RENAMES) \
__PMC_EV(P6, RET_SEG_RENAMES) \
__PMC_EV(P6, EMON_EST_TRANS) \
__PMC_EV(P6, EMON_THERMAL_TRIP) \
__PMC_EV(P6, BR_INST_EXEC) \
__PMC_EV(P6, BR_MISSP_EXEC) \
__PMC_EV(P6, BR_BAC_MISSP_EXEC) \
__PMC_EV(P6, BR_CND_EXEC) \
__PMC_EV(P6, BR_CND_MISSP_EXEC) \
__PMC_EV(P6, BR_IND_EXEC) \
__PMC_EV(P6, BR_IND_MISSP_EXEC) \
__PMC_EV(P6, BR_RET_EXEC) \
__PMC_EV(P6, BR_RET_MISSP_EXEC) \
__PMC_EV(P6, BR_RET_BAC_MISSP_EXEC) \
__PMC_EV(P6, BR_CALL_EXEC) \
__PMC_EV(P6, BR_CALL_MISSP_EXEC) \
__PMC_EV(P6, BR_IND_CALL_EXEC) \
__PMC_EV(P6, EMON_SIMD_INSTR_RETIRED) \
__PMC_EV(P6, EMON_SYNCH_UOPS) \
__PMC_EV(P6, EMON_ESP_UOPS) \
__PMC_EV(P6, EMON_FUSED_UOPS_RET) \
__PMC_EV(P6, EMON_UNFUSION) \
__PMC_EV(P6, EMON_PREF_RQSTS_UP) \
__PMC_EV(P6, EMON_PREF_RQSTS_DN) \
__PMC_EV(P6, EMON_SSE_SSE2_INST_RETIRED) \
__PMC_EV(P6, EMON_SSE_SSE2_COMP_INST_RETIRED)
MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
#define PMC_EV_P6_FIRST PMC_EV_P6_DATA_MEM_REFS
#define PMC_EV_P6_LAST PMC_EV_P6_EMON_SSE_SSE2_COMP_INST_RETIRED
/* AMD K8 PMCs */
#define __PMC_EV_K8() \
- Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order to reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources.
2008-10-09 14:55:45 +00:00
__PMC_EV(K8, FP_DISPATCHED_FPU_OPS) \
__PMC_EV(K8, FP_CYCLES_WITH_NO_FPU_OPS_RETIRED) \
__PMC_EV(K8, FP_DISPATCHED_FPU_FAST_FLAG_OPS) \
__PMC_EV(K8, LS_SEGMENT_REGISTER_LOAD) \
__PMC_EV(K8, LS_MICROARCHITECTURAL_RESYNC_BY_SELF_MODIFYING_CODE) \
__PMC_EV(K8, LS_MICROARCHITECTURAL_RESYNC_BY_SNOOP) \
__PMC_EV(K8, LS_BUFFER2_FULL) \
__PMC_EV(K8, LS_LOCKED_OPERATION) \
__PMC_EV(K8, LS_MICROARCHITECTURAL_LATE_CANCEL) \
__PMC_EV(K8, LS_RETIRED_CFLUSH_INSTRUCTIONS) \
__PMC_EV(K8, LS_RETIRED_CPUID_INSTRUCTIONS) \
__PMC_EV(K8, DC_ACCESS) \
__PMC_EV(K8, DC_MISS) \
__PMC_EV(K8, DC_REFILL_FROM_L2) \
__PMC_EV(K8, DC_REFILL_FROM_SYSTEM) \
__PMC_EV(K8, DC_COPYBACK) \
__PMC_EV(K8, DC_L1_DTLB_MISS_AND_L2_DTLB_HIT) \
__PMC_EV(K8, DC_L1_DTLB_MISS_AND_L2_DTLB_MISS) \
__PMC_EV(K8, DC_MISALIGNED_DATA_REFERENCE) \
__PMC_EV(K8, DC_MICROARCHITECTURAL_LATE_CANCEL) \
__PMC_EV(K8, DC_MICROARCHITECTURAL_EARLY_CANCEL) \
__PMC_EV(K8, DC_ONE_BIT_ECC_ERROR) \
__PMC_EV(K8, DC_DISPATCHED_PREFETCH_INSTRUCTIONS) \
__PMC_EV(K8, DC_DCACHE_ACCESSES_BY_LOCKS) \
__PMC_EV(K8, BU_CPU_CLK_UNHALTED) \
__PMC_EV(K8, BU_INTERNAL_L2_REQUEST) \
__PMC_EV(K8, BU_FILL_REQUEST_L2_MISS) \
__PMC_EV(K8, BU_FILL_INTO_L2) \
__PMC_EV(K8, IC_FETCH) \
__PMC_EV(K8, IC_MISS) \
__PMC_EV(K8, IC_REFILL_FROM_L2) \
__PMC_EV(K8, IC_REFILL_FROM_SYSTEM) \
__PMC_EV(K8, IC_L1_ITLB_MISS_AND_L2_ITLB_HIT) \
__PMC_EV(K8, IC_L1_ITLB_MISS_AND_L2_ITLB_MISS) \
__PMC_EV(K8, IC_MICROARCHITECTURAL_RESYNC_BY_SNOOP) \
__PMC_EV(K8, IC_INSTRUCTION_FETCH_STALL) \
__PMC_EV(K8, IC_RETURN_STACK_HIT) \
__PMC_EV(K8, IC_RETURN_STACK_OVERFLOW) \
__PMC_EV(K8, FR_RETIRED_X86_INSTRUCTIONS) \
__PMC_EV(K8, FR_RETIRED_UOPS) \
__PMC_EV(K8, FR_RETIRED_BRANCHES) \
__PMC_EV(K8, FR_RETIRED_BRANCHES_MISPREDICTED) \
__PMC_EV(K8, FR_RETIRED_TAKEN_BRANCHES) \
__PMC_EV(K8, FR_RETIRED_TAKEN_BRANCHES_MISPREDICTED) \
__PMC_EV(K8, FR_RETIRED_FAR_CONTROL_TRANSFERS) \
__PMC_EV(K8, FR_RETIRED_RESYNCS) \
__PMC_EV(K8, FR_RETIRED_NEAR_RETURNS) \
__PMC_EV(K8, FR_RETIRED_NEAR_RETURNS_MISPREDICTED) \
__PMC_EV(K8, FR_RETIRED_TAKEN_BRANCHES_MISPREDICTED_BY_ADDR_MISCOMPARE) \
__PMC_EV(K8, FR_RETIRED_FPU_INSTRUCTIONS) \
__PMC_EV(K8, FR_RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS) \
__PMC_EV(K8, FR_INTERRUPTS_MASKED_CYCLES) \
__PMC_EV(K8, FR_INTERRUPTS_MASKED_WHILE_PENDING_CYCLES) \
__PMC_EV(K8, FR_TAKEN_HARDWARE_INTERRUPTS) \
__PMC_EV(K8, FR_DECODER_EMPTY) \
__PMC_EV(K8, FR_DISPATCH_STALLS) \
__PMC_EV(K8, FR_DISPATCH_STALL_FROM_BRANCH_ABORT_TO_RETIRE) \
__PMC_EV(K8, FR_DISPATCH_STALL_FOR_SERIALIZATION) \
__PMC_EV(K8, FR_DISPATCH_STALL_FOR_SEGMENT_LOAD) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_REORDER_BUFFER_IS_FULL) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_RESERVATION_STATIONS_ARE_FULL) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_FPU_IS_FULL) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_LS_IS_FULL) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_WAITING_FOR_ALL_TO_BE_QUIET) \
__PMC_EV(K8, FR_DISPATCH_STALL_WHEN_FAR_XFER_OR_RESYNC_BRANCH_PENDING) \
__PMC_EV(K8, FR_FPU_EXCEPTIONS) \
__PMC_EV(K8, FR_NUMBER_OF_BREAKPOINTS_FOR_DR0) \
__PMC_EV(K8, FR_NUMBER_OF_BREAKPOINTS_FOR_DR1) \
__PMC_EV(K8, FR_NUMBER_OF_BREAKPOINTS_FOR_DR2) \
__PMC_EV(K8, FR_NUMBER_OF_BREAKPOINTS_FOR_DR3) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_PAGE_ACCESS_EVENT) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_PAGE_TABLE_OVERFLOW) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_DRAM_COMMAND_SLOTS_MISSED) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_TURNAROUND) \
__PMC_EV(K8, NB_MEMORY_CONTROLLER_BYPASS_SATURATION) \
__PMC_EV(K8, NB_SIZED_COMMANDS) \
__PMC_EV(K8, NB_PROBE_RESULT) \
__PMC_EV(K8, NB_HT_BUS0_BANDWIDTH) \
__PMC_EV(K8, NB_HT_BUS1_BANDWIDTH) \
__PMC_EV(K8, NB_HT_BUS2_BANDWIDTH)
MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
#define PMC_EV_K8_FIRST PMC_EV_K8_FP_DISPATCHED_FPU_OPS
#define PMC_EV_K8_LAST PMC_EV_K8_NB_HT_BUS2_BANDWIDTH
Correct a typo.
2008-03-14 06:16:18 +00:00
/*
* Intel Pentium and Pentium MMX Events, from the "Intel 64 and IA-32
* Intel(R) Architectures Software Developer's Manual, Volume 3B:
* System Programming Guide, Part 2, August 2007".
*/
MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
#define __PMC_EV_P5() \
- Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order to reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources.
2008-10-09 14:55:45 +00:00
__PMC_EV(P5, DATA_READ) \
__PMC_EV(P5, DATA_WRITE) \
__PMC_EV(P5, DATA_TLB_MISS) \
__PMC_EV(P5, DATA_READ_MISS) \
__PMC_EV(P5, DATA_WRITE_MISS) \
__PMC_EV(P5, WRITE_HIT_TO_M_OR_E_STATE_LINES) \
__PMC_EV(P5, DATA_CACHE_LINES_WRITTEN_BACK) \
__PMC_EV(P5, EXTERNAL_SNOOPS) \
__PMC_EV(P5, EXTERNAL_DATA_CACHE_SNOOP_HITS) \
__PMC_EV(P5, MEMORY_ACCESSES_IN_BOTH_PIPES) \
__PMC_EV(P5, BANK_CONFLICTS) \
__PMC_EV(P5, MISALIGNED_DATA_OR_IO_REFERENCES) \
__PMC_EV(P5, CODE_READ) \
__PMC_EV(P5, CODE_TLB_MISS) \
__PMC_EV(P5, CODE_CACHE_MISS) \
__PMC_EV(P5, ANY_SEGMENT_REGISTER_LOADED) \
__PMC_EV(P5, BRANCHES) \
__PMC_EV(P5, BTB_HITS) \
__PMC_EV(P5, TAKEN_BRANCH_OR_BTB_HIT) \
__PMC_EV(P5, PIPELINE_FLUSHES) \
__PMC_EV(P5, INSTRUCTIONS_EXECUTED) \
__PMC_EV(P5, INSTRUCTIONS_EXECUTED_V_PIPE) \
__PMC_EV(P5, BUS_CYCLE_DURATION) \
__PMC_EV(P5, WRITE_BUFFER_FULL_STALL_DURATION) \
__PMC_EV(P5, WAITING_FOR_DATA_MEMORY_READ_STALL_DURATION) \
__PMC_EV(P5, STALL_ON_WRITE_TO_AN_E_OR_M_STATE_LINE) \
__PMC_EV(P5, LOCKED_BUS_CYCLE) \
__PMC_EV(P5, IO_READ_OR_WRITE_CYCLE) \
__PMC_EV(P5, NONCACHEABLE_MEMORY_READS) \
__PMC_EV(P5, PIPELINE_AGI_STALLS) \
__PMC_EV(P5, FLOPS) \
__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR0_REGISTER) \
__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR1_REGISTER) \
__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR2_REGISTER) \
__PMC_EV(P5, BREAKPOINT_MATCH_ON_DR3_REGISTER) \
__PMC_EV(P5, HARDWARE_INTERRUPTS) \
__PMC_EV(P5, DATA_READ_OR_WRITE) \
__PMC_EV(P5, DATA_READ_MISS_OR_WRITE_MISS) \
__PMC_EV(P5, BUS_OWNERSHIP_LATENCY) \
__PMC_EV(P5, BUS_OWNERSHIP_TRANSFERS) \
__PMC_EV(P5, MMX_INSTRUCTIONS_EXECUTED_U_PIPE) \
__PMC_EV(P5, MMX_INSTRUCTIONS_EXECUTED_V_PIPE) \
__PMC_EV(P5, CACHE_M_LINE_SHARING) \
__PMC_EV(P5, CACHE_LINE_SHARING) \
__PMC_EV(P5, EMMS_INSTRUCTIONS_EXECUTED) \
__PMC_EV(P5, TRANSITIONS_BETWEEN_MMX_AND_FP_INSTRUCTIONS) \
__PMC_EV(P5, BUS_UTILIZATION_DUE_TO_PROCESSOR_ACTIVITY) \
__PMC_EV(P5, WRITES_TO_NONCACHEABLE_MEMORY) \
__PMC_EV(P5, SATURATING_MMX_INSTRUCTIONS_EXECUTED) \
__PMC_EV(P5, SATURATIONS_PERFORMED) \
__PMC_EV(P5, NUMBER_OF_CYCLES_NOT_IN_HALT_STATE) \
__PMC_EV(P5, DATA_CACHE_TLB_MISS_STALL_DURATION) \
__PMC_EV(P5, MMX_INSTRUCTION_DATA_READS) \
__PMC_EV(P5, MMX_INSTRUCTION_DATA_READ_MISSES) \
__PMC_EV(P5, FLOATING_POINT_STALLS_DURATION) \
__PMC_EV(P5, TAKEN_BRANCHES) \
__PMC_EV(P5, D1_STARVATION_AND_FIFO_IS_EMPTY) \
__PMC_EV(P5, D1_STARVATION_AND_ONLY_ONE_INSTRUCTION_IN_FIFO) \
__PMC_EV(P5, MMX_INSTRUCTION_DATA_WRITES) \
__PMC_EV(P5, MMX_INSTRUCTION_DATA_WRITE_MISSES) \
__PMC_EV(P5, PIPELINE_FLUSHES_DUE_TO_WRONG_BRANCH_PREDICTIONS) \
MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
__PMC_EV(P5, \
- Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order to reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources.
2008-10-09 14:55:45 +00:00
PIPELINE_FLUSHES_DUE_TO_WRONG_BRANCH_PREDICTIONS_RESOLVED_IN_WB_STAGE) \
__PMC_EV(P5, MISALIGNED_DATA_MEMORY_REFERENCE_ON_MMX_INSTRUCTIONS) \
__PMC_EV(P5, PIPELINE_STALL_FOR_MMX_INSTRUCTION_DATA_MEMORY_READS) \
__PMC_EV(P5, MISPREDICTED_OR_UNPREDICTED_RETURNS) \
__PMC_EV(P5, PREDICTED_RETURNS) \
__PMC_EV(P5, MMX_MULTIPLY_UNIT_INTERLOCK) \
__PMC_EV(P5, MOVD_MOVQ_STORE_STALL_DUE_TO_PREVIOUS_MMX_OPERATION) \
__PMC_EV(P5, RETURNS) \
__PMC_EV(P5, BTB_FALSE_ENTRIES) \
__PMC_EV(P5, BTB_MISS_PREDICTION_ON_NOT_TAKEN_BRANCH) \
MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
__PMC_EV(P5, \
- Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order to reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources.
2008-10-09 14:55:45 +00:00
FULL_WRITE_BUFFER_STALL_DURATION_WHILE_EXECUTING_MMX_INSTRUCTIONS) \
__PMC_EV(P5, STALL_ON_MMX_INSTRUCTION_WRITE_TO_E_OR_M_STATE_LINE)
MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
#define PMC_EV_P5_FIRST PMC_EV_P5_DATA_READ
#define PMC_EV_P5_LAST \
PMC_EV_P5_STALL_ON_MMX_INSTRUCTION_WRITE_TO_E_OR_M_STATE_LINE
- Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order to reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources.
2008-10-09 14:55:45 +00:00
#define __PMC_EV_IAF() /* Intel architectural fixed function */
#define __PMC_EV_IAP() /* Intel architectural programmable */
MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
/* timestamp counters. */
#define __PMC_EV_TSC() \
- Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order to reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources.
2008-10-09 14:55:45 +00:00
__PMC_EV(TSC, TSC)
#define PMC_EV_TSC_FIRST PMC_EV_TSC_TSC
#define PMC_EV_TSC_LAST PMC_EV_TSC_TSC
MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
- Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order to reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources.
2008-10-09 14:55:45 +00:00
/*
* All known PMC events.
*
* PMC event numbers are allocated sparsely to allow new PMC events to
* be added to a PMC class without breaking ABI compatibility. The
* current allocation scheme is:
*
* START #EVENTS DESCRIPTION
* 0 0x1000 Reserved
* 0x1000 0x0001 TSC
* 0x2000 0x0080 AMD K7 events
* 0x2080 0x0100 AMD K8 events
* 0x10000 0x0080 INTEL architectural fixed-function events
* 0x10080 0x0F80 INTEL architectural programmable events
* 0x11000 0x0080 INTEL Pentium 4 events
* 0x11080 0x0080 INTEL Pentium MMX events
* 0x11100 0x0100 INTEL Pentium Pro/P-II/P-III/Pentium-M events
*/
#define __PMC_EVENTS() \
__PMC_EV_BLOCK(TSC, 0x01000) \
__PMC_EV_TSC() \
__PMC_EV_BLOCK(K7, 0x2000) \
__PMC_EV_K7() \
__PMC_EV_BLOCK(K8, 0x2080) \
__PMC_EV_K8() \
__PMC_EV_BLOCK(IAF, 0x10000) \
__PMC_EV_IAF() \
__PMC_EV_BLOCK(IAP, 0x10080) \
__PMC_EV_IAP() \
__PMC_EV_BLOCK(P4, 0x11000) \
__PMC_EV_P4() \
__PMC_EV_BLOCK(P5, 0x11080) \
__PMC_EV_P5() \
__PMC_EV_BLOCK(P6, 0x11100) \
__PMC_EV_P6()
MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
#define PMC_EVENT_FIRST PMC_EV_TSC_TSC
- Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order to reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources.
2008-10-09 14:55:45 +00:00
#define PMC_EVENT_LAST PMC_EV_P6_LAST
MFP4: - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation.
2005-06-09 19:45:09 +00:00
#endif /* _DEV_HWPMC_PMC_EVENTS_H_ */
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