2014-03-24 20:06:27 +00:00
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/*-
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* Copyright 2014 Luiz Otavio O Souza <loos@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _TI_ADCVAR_H_
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#define _TI_ADCVAR_H_
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2014-06-02 02:00:17 +00:00
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#define TI_ADC_NPINS 8
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2014-03-24 20:06:27 +00:00
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#define ADC_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg)
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#define ADC_WRITE4(_sc, reg, value) \
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bus_write_4((_sc)->sc_mem_res, reg, value)
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struct ti_adc_softc {
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device_t sc_dev;
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int sc_last_state;
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struct mtx sc_mtx;
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struct resource *sc_mem_res;
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struct resource *sc_irq_res;
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void *sc_intrhand;
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};
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struct ti_adc_input {
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int32_t enable; /* input enabled */
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int32_t samples; /* samples average */
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int32_t input; /* input number */
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int32_t value; /* raw converted value */
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uint32_t stepconfig; /* step config register */
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uint32_t stepdelay; /* step delay register */
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struct ti_adc_softc *sc; /* pointer to adc softc */
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};
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#define TI_ADC_LOCK(_sc) \
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mtx_lock(&(_sc)->sc_mtx)
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#define TI_ADC_UNLOCK(_sc) \
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mtx_unlock(&(_sc)->sc_mtx)
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#define TI_ADC_LOCK_INIT(_sc) \
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mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \
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"ti_adc", MTX_DEF)
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#define TI_ADC_LOCK_DESTROY(_sc) \
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mtx_destroy(&_sc->sc_mtx);
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#define TI_ADC_LOCK_ASSERT(_sc) \
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mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
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#endif /* _TI_ADCVAR_H_ */
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