FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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/*-
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* Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/imgact.h>
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#include <sys/bio.h>
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#include <sys/buf.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <sys/cons.h>
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#include <sys/exec.h>
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#include <sys/ucontext.h>
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#include <sys/proc.h>
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#include <sys/kdb.h>
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#include <sys/ptrace.h>
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#include <sys/reboot.h>
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#include <sys/signalvar.h>
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#include <sys/sysent.h>
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#include <sys/sysproto.h>
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#include <sys/user.h>
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#include <vm/vm.h>
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#include <vm/vm_object.h>
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#include <vm/vm_page.h>
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#include <vm/vm_pager.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/cpuregs.h>
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#include <machine/hwfunc.h>
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#include <machine/md_var.h>
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#include <machine/pmap.h>
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#include <machine/trap.h>
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#ifdef TICK_USE_YAMON_FREQ
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2008-09-10 03:49:08 +00:00
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#include <mips/malta/yamon.h>
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FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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#endif
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#ifdef TICK_USE_MALTA_RTC
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#include <mips/mips4k/malta/maltareg.h>
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#include <dev/mc146818/mc146818reg.h>
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#include <isa/rtc.h>
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#endif
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2008-09-10 03:49:08 +00:00
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#include <mips/malta/maltareg.h>
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FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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extern int *edata;
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extern int *end;
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void lcd_init(void);
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void lcd_puts(char *);
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void malta_reset(void);
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/*
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* Offsets to MALTA LCD characters.
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*/
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static int malta_lcd_offs[] = {
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MALTA_ASCIIPOS0,
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MALTA_ASCIIPOS1,
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MALTA_ASCIIPOS2,
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MALTA_ASCIIPOS3,
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MALTA_ASCIIPOS4,
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MALTA_ASCIIPOS5,
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MALTA_ASCIIPOS6,
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MALTA_ASCIIPOS7
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};
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/*
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* Put character to Malta LCD at given position.
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*/
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static void
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malta_lcd_putc(int pos, char c)
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{
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void *addr;
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char *ch;
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if (pos < 0 || pos > 7)
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return;
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addr = (void *)(MALTA_ASCII_BASE + malta_lcd_offs[pos]);
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ch = (char *)MIPS_PHYS_TO_KSEG0(addr);
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*ch = c;
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}
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/*
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* Print given string on LCD.
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*/
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static void
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malta_lcd_print(char *str)
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{
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int i;
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if (str == NULL)
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return;
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for (i = 0; *str != '\0'; i++, str++)
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malta_lcd_putc(i, *str);
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}
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void
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lcd_init(void)
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{
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malta_lcd_print("FreeBSD_");
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}
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void
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lcd_puts(char *s)
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{
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malta_lcd_print(s);
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}
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#ifdef TICK_USE_MALTA_RTC
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static __inline uint8_t
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rtcin(uint8_t addr)
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{
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*((volatile uint8_t *)
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MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr;
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return (*((volatile uint8_t *)
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MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))));
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}
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static __inline void
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writertc(uint8_t addr, uint8_t val)
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{
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*((volatile uint8_t *)
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MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr;
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*((volatile uint8_t *)
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MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))) = val;
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}
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#endif
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static void
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mips_init(void)
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{
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int i;
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for (i = 0; i < 10; i++) {
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phys_avail[i] = 0;
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}
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/* phys_avail regions are in bytes */
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phys_avail[0] = MIPS_KSEG0_TO_PHYS((vm_offset_t)&end);
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phys_avail[1] = ctob(realmem);
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physmem = realmem;
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init_param1();
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init_param2(physmem);
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mips_cpu_init();
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pmap_bootstrap();
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mips_proc0_init();
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mutex_init();
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#ifdef DDB
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kdb_init();
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#endif
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}
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void
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platform_halt(void)
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{
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}
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void
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platform_identify(void)
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{
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}
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/*
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* Perform a board-level soft-reset.
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* Note that this is not emulated by gxemul.
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*/
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void
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platform_reset(void)
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{
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char *c;
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c = (char *)MIPS_PHYS_TO_KSEG0(MALTA_SOFTRES);
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*c = MALTA_GORESET;
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}
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void
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platform_trap_enter(void)
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{
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}
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void
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platform_trap_exit(void)
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{
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}
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void
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platform_start(__register_t a0, __register_t a1, __register_t a2,
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__register_t a3)
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{
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vm_offset_t kernend;
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uint64_t platform_counter_freq;
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int argc = a0;
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char **argv = (char **)a1;
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char **envp = (char **)a2;
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unsigned int memsize = a3;
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int i;
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/* clear the BSS and SBSS segments */
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kernend = round_page((vm_offset_t)&end);
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memset(&edata, 0, kernend - (vm_offset_t)(&edata));
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cninit();
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printf("entry: platform_start()\n");
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bootverbose = 1;
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if (bootverbose) {
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printf("cmd line: ");
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for (i = 0; i < argc; i++)
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printf("%s ", argv[i]);
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printf("\n");
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printf("envp:\n");
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for (i = 0; envp[i]; i += 2)
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printf("\t%s = %s\n", envp[i], envp[i+1]);
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printf("memsize = %08x\n", memsize);
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}
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realmem = btoc(memsize);
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mips_init();
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do {
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#if defined(TICK_USE_YAMON_FREQ)
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/*
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* If we are running on a board which uses YAMON firmware,
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* then query CPU pipeline clock from the syscon object.
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* If unsuccessful, use hard-coded default.
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*/
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platform_counter_freq = yamon_getcpufreq();
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if (platform_counter_freq == 0)
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platform_counter_freq = MIPS_DEFAULT_HZ;
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#elif defined(TICK_USE_MALTA_RTC)
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/*
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* If we are running on a board with the MC146818 RTC,
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* use it to determine CPU pipeline clock frequency.
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*/
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u_int64_t counterval[2];
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/* Set RTC to binary mode. */
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writertc(RTC_STATUSB, (rtcin(RTC_STATUSB) | RTCSB_BCD));
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/* Busy-wait for falling edge of RTC update. */
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while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0))
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;
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while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0))
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;
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counterval[0] = mips_rd_count();
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/* Busy-wait for falling edge of RTC update. */
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while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0))
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;
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while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0))
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;
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counterval[1] = mips_rd_count();
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platform_counter_freq = counterval[1] - counterval[0];
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#endif
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} while(0);
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mips_timer_init_params(platform_counter_freq, 0);
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}
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