FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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/*-
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* Copyright (c) 2007, Oleksandr Tymoshenko <gonzo@freebsd.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/interrupt.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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2008-09-10 03:49:08 +00:00
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#include <mips/idt/idtreg.h>
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#include <mips/idt/obiovar.h>
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FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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#define ICU_REG_READ(o) \
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*((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(IDT_BASE_ICU + (o)))
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#define ICU_REG_WRITE(o,v) (ICU_REG_READ(o)) = (v)
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#define GPIO_REG_READ(o) \
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*((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(IDT_BASE_GPIO + (o)))
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#define GPIO_REG_WRITE(o,v) (GPIO_REG_READ(o)) = (v)
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static int obio_activate_resource(device_t, device_t, int, int,
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struct resource *);
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static device_t obio_add_child(device_t, int, const char *, int);
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static struct resource *
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obio_alloc_resource(device_t, device_t, int, int *, u_long,
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u_long, u_long, u_int);
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static int obio_attach(device_t);
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static int obio_deactivate_resource(device_t, device_t, int, int,
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struct resource *);
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static struct resource_list *
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obio_get_resource_list(device_t, device_t);
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static void obio_hinted_child(device_t, const char *, int);
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static int obio_intr(void *);
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static int obio_probe(device_t);
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static int obio_release_resource(device_t, device_t, int, int,
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struct resource *);
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static int obio_setup_intr(device_t, device_t, struct resource *, int,
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driver_filter_t *, driver_intr_t *, void *, void **);
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static int obio_teardown_intr(device_t, device_t, struct resource *,
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void *);
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Merge from projects/mips to head by hand:
r201881 | imp | 2010-01-08 20:08:22 -0700 (Fri, 08 Jan 2010) | 3 lines
Rename mips_pcpu_init to mips_pcpu0_init since it applies only to the
BSP. Provide a missing prototype.
r201845 | imp | 2010-01-08 15:48:21 -0700 (Fri, 08 Jan 2010) | 2 lines
Centralize initialization of pcpu, and set curthread early...
r198669 | rrs | 2009-10-30 02:53:11 -0600 (Fri, 30 Oct 2009) | 5 lines
With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
making it run ;-)
r198154 | rrs | 2009-10-15 15:03:32 -0600 (Thu, 15 Oct 2009) | 10 lines
Does 4 things:
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
intr_machdep.c. This allows us to have an architecture dependant
intr_machdep.c (which we will need for RMI) in the machine specific
directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
may need to look at finding a better place to put this. But first I want to
get this thing compiling.
r194216 | gonzo | 2009-06-14 15:16:23 -0600 (Sun, 14 Jun 2009) | 2 lines
- Fix prototypes to make compiler happy
r194215 | gonzo | 2009-06-14 15:16:04 -0600 (Sun, 14 Jun 2009) | 2 lines
- Get rid of mask_fn and fix pre_filter/post_filter functions' prototypes
r191282 | gonzo | 2009-04-19 16:02:14 -0600 (Sun, 19 Apr 2009) | 3 lines
- Make mips_bus_space_generic be of type bus_space_tag_t instead of
struct bus_space and update all relevant places.
r191084 | gonzo | 2009-04-14 20:28:26 -0600 (Tue, 14 Apr 2009) | 6 lines
Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
2010-01-10 19:39:08 +00:00
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static void
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obio_mask_irq(void *arg)
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FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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|
{
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Merge from projects/mips to head by hand:
r201881 | imp | 2010-01-08 20:08:22 -0700 (Fri, 08 Jan 2010) | 3 lines
Rename mips_pcpu_init to mips_pcpu0_init since it applies only to the
BSP. Provide a missing prototype.
r201845 | imp | 2010-01-08 15:48:21 -0700 (Fri, 08 Jan 2010) | 2 lines
Centralize initialization of pcpu, and set curthread early...
r198669 | rrs | 2009-10-30 02:53:11 -0600 (Fri, 30 Oct 2009) | 5 lines
With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
making it run ;-)
r198154 | rrs | 2009-10-15 15:03:32 -0600 (Thu, 15 Oct 2009) | 10 lines
Does 4 things:
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
intr_machdep.c. This allows us to have an architecture dependant
intr_machdep.c (which we will need for RMI) in the machine specific
directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
may need to look at finding a better place to put this. But first I want to
get this thing compiling.
r194216 | gonzo | 2009-06-14 15:16:23 -0600 (Sun, 14 Jun 2009) | 2 lines
- Fix prototypes to make compiler happy
r194215 | gonzo | 2009-06-14 15:16:04 -0600 (Sun, 14 Jun 2009) | 2 lines
- Get rid of mask_fn and fix pre_filter/post_filter functions' prototypes
r191282 | gonzo | 2009-04-19 16:02:14 -0600 (Sun, 19 Apr 2009) | 3 lines
- Make mips_bus_space_generic be of type bus_space_tag_t instead of
struct bus_space and update all relevant places.
r191084 | gonzo | 2009-04-14 20:28:26 -0600 (Tue, 14 Apr 2009) | 6 lines
Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
2010-01-10 19:39:08 +00:00
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unsigned int irq = (unsigned int)arg;
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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int ip_bit, mask, mask_register;
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/* mask IRQ */
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mask_register = ICU_IRQ_MASK_REG(irq);
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ip_bit = ICU_IP_BIT(irq);
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mask = ICU_REG_READ(mask_register);
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ICU_REG_WRITE(mask_register, mask | ip_bit);
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}
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Merge from projects/mips to head by hand:
r201881 | imp | 2010-01-08 20:08:22 -0700 (Fri, 08 Jan 2010) | 3 lines
Rename mips_pcpu_init to mips_pcpu0_init since it applies only to the
BSP. Provide a missing prototype.
r201845 | imp | 2010-01-08 15:48:21 -0700 (Fri, 08 Jan 2010) | 2 lines
Centralize initialization of pcpu, and set curthread early...
r198669 | rrs | 2009-10-30 02:53:11 -0600 (Fri, 30 Oct 2009) | 5 lines
With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
making it run ;-)
r198154 | rrs | 2009-10-15 15:03:32 -0600 (Thu, 15 Oct 2009) | 10 lines
Does 4 things:
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
intr_machdep.c. This allows us to have an architecture dependant
intr_machdep.c (which we will need for RMI) in the machine specific
directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
may need to look at finding a better place to put this. But first I want to
get this thing compiling.
r194216 | gonzo | 2009-06-14 15:16:23 -0600 (Sun, 14 Jun 2009) | 2 lines
- Fix prototypes to make compiler happy
r194215 | gonzo | 2009-06-14 15:16:04 -0600 (Sun, 14 Jun 2009) | 2 lines
- Get rid of mask_fn and fix pre_filter/post_filter functions' prototypes
r191282 | gonzo | 2009-04-19 16:02:14 -0600 (Sun, 19 Apr 2009) | 3 lines
- Make mips_bus_space_generic be of type bus_space_tag_t instead of
struct bus_space and update all relevant places.
r191084 | gonzo | 2009-04-14 20:28:26 -0600 (Tue, 14 Apr 2009) | 6 lines
Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
2010-01-10 19:39:08 +00:00
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static void
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obio_unmask_irq(void *arg)
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FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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|
{
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Merge from projects/mips to head by hand:
r201881 | imp | 2010-01-08 20:08:22 -0700 (Fri, 08 Jan 2010) | 3 lines
Rename mips_pcpu_init to mips_pcpu0_init since it applies only to the
BSP. Provide a missing prototype.
r201845 | imp | 2010-01-08 15:48:21 -0700 (Fri, 08 Jan 2010) | 2 lines
Centralize initialization of pcpu, and set curthread early...
r198669 | rrs | 2009-10-30 02:53:11 -0600 (Fri, 30 Oct 2009) | 5 lines
With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
making it run ;-)
r198154 | rrs | 2009-10-15 15:03:32 -0600 (Thu, 15 Oct 2009) | 10 lines
Does 4 things:
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
intr_machdep.c. This allows us to have an architecture dependant
intr_machdep.c (which we will need for RMI) in the machine specific
directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
may need to look at finding a better place to put this. But first I want to
get this thing compiling.
r194216 | gonzo | 2009-06-14 15:16:23 -0600 (Sun, 14 Jun 2009) | 2 lines
- Fix prototypes to make compiler happy
r194215 | gonzo | 2009-06-14 15:16:04 -0600 (Sun, 14 Jun 2009) | 2 lines
- Get rid of mask_fn and fix pre_filter/post_filter functions' prototypes
r191282 | gonzo | 2009-04-19 16:02:14 -0600 (Sun, 19 Apr 2009) | 3 lines
- Make mips_bus_space_generic be of type bus_space_tag_t instead of
struct bus_space and update all relevant places.
r191084 | gonzo | 2009-04-14 20:28:26 -0600 (Tue, 14 Apr 2009) | 6 lines
Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
2010-01-10 19:39:08 +00:00
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unsigned int irq = (unsigned int)arg;
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
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int ip_bit, mask, mask_register;
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/* unmask IRQ */
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mask_register = ICU_IRQ_MASK_REG(irq);
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ip_bit = ICU_IP_BIT(irq);
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mask = ICU_REG_READ(mask_register);
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ICU_REG_WRITE(mask_register, mask & ~ip_bit);
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}
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static int
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obio_probe(device_t dev)
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{
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return (0);
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}
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static int
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obio_attach(device_t dev)
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{
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struct obio_softc *sc = device_get_softc(dev);
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int rid, irq;
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sc->oba_mem_rman.rm_type = RMAN_ARRAY;
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sc->oba_mem_rman.rm_descr = "OBIO memeory";
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if (rman_init(&sc->oba_mem_rman) != 0 ||
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rman_manage_region(&sc->oba_mem_rman, OBIO_MEM_START,
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OBIO_MEM_START + OBIO_MEM_SIZE) != 0)
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panic("obio_attach: failed to set up I/O rman");
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sc->oba_irq_rman.rm_type = RMAN_ARRAY;
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sc->oba_irq_rman.rm_descr = "OBIO IRQ";
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if (rman_init(&sc->oba_irq_rman) != 0 ||
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rman_manage_region(&sc->oba_irq_rman, IRQ_BASE, IRQ_END) != 0)
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panic("obio_attach: failed to set up IRQ rman");
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/* Hook up our interrupt handlers. We should handle IRQ0..IRQ4*/
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for(irq = 0; irq < 5; irq++) {
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if ((sc->sc_irq[irq] = bus_alloc_resource(dev, SYS_RES_IRQ,
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&rid, irq, irq, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
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device_printf(dev, "unable to allocate IRQ resource\n");
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return (ENXIO);
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}
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if ((bus_setup_intr(dev, sc->sc_irq[irq], INTR_TYPE_MISC,
|
|
|
|
obio_intr, NULL, sc, &sc->sc_ih[irq]))) {
|
|
|
|
device_printf(dev,
|
|
|
|
"WARNING: unable to register interrupt handler\n");
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
bus_generic_probe(dev);
|
|
|
|
bus_enumerate_hinted_children(dev);
|
|
|
|
bus_generic_attach(dev);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct resource *
|
|
|
|
obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
|
|
|
u_long start, u_long end, u_long count, u_int flags)
|
|
|
|
{
|
|
|
|
struct obio_softc *sc = device_get_softc(bus);
|
|
|
|
struct obio_ivar *ivar = device_get_ivars(child);
|
|
|
|
struct resource *rv;
|
|
|
|
struct resource_list_entry *rle;
|
|
|
|
struct rman *rm;
|
|
|
|
int isdefault, needactivate, passthrough;
|
|
|
|
|
|
|
|
isdefault = (start == 0UL && end == ~0UL);
|
|
|
|
needactivate = flags & RF_ACTIVE;
|
|
|
|
passthrough = (device_get_parent(child) != bus);
|
|
|
|
rle = NULL;
|
|
|
|
|
|
|
|
if (passthrough)
|
|
|
|
return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type,
|
|
|
|
rid, start, end, count, flags));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If this is an allocation of the "default" range for a given RID,
|
|
|
|
* and we know what the resources for this device are (ie. they aren't
|
|
|
|
* maintained by a child bus), then work out the start/end values.
|
|
|
|
*/
|
|
|
|
if (isdefault) {
|
|
|
|
rle = resource_list_find(&ivar->resources, type, *rid);
|
|
|
|
if (rle == NULL)
|
|
|
|
return (NULL);
|
|
|
|
if (rle->res != NULL) {
|
|
|
|
panic("%s: resource entry is busy", __func__);
|
|
|
|
}
|
|
|
|
start = rle->start;
|
|
|
|
end = rle->end;
|
|
|
|
count = rle->count;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (type) {
|
|
|
|
case SYS_RES_IRQ:
|
|
|
|
rm = &sc->oba_irq_rman;
|
|
|
|
break;
|
|
|
|
case SYS_RES_MEMORY:
|
|
|
|
rm = &sc->oba_mem_rman;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
printf("%s: unknown resource type %d\n", __func__, type);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
rv = rman_reserve_resource(rm, start, end, count, flags, child);
|
|
|
|
if (rv == 0) {
|
|
|
|
printf("%s: could not reserve resource\n", __func__);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
rman_set_rid(rv, *rid);
|
|
|
|
|
|
|
|
if (needactivate) {
|
|
|
|
if (bus_activate_resource(child, type, *rid, rv)) {
|
|
|
|
printf("%s: could not activate resource\n", __func__);
|
|
|
|
rman_release_resource(rv);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return (rv);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
obio_activate_resource(device_t bus, device_t child, int type, int rid,
|
|
|
|
struct resource *r)
|
|
|
|
{
|
|
|
|
|
|
|
|
/* XXX: should we mask/unmask IRQ here? */
|
|
|
|
return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), child,
|
|
|
|
type, rid, r));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
obio_deactivate_resource(device_t bus, device_t child, int type, int rid,
|
|
|
|
struct resource *r)
|
|
|
|
{
|
|
|
|
|
|
|
|
/* XXX: should we mask/unmask IRQ here? */
|
|
|
|
return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus), child,
|
|
|
|
type, rid, r));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
obio_release_resource(device_t dev, device_t child, int type,
|
|
|
|
int rid, struct resource *r)
|
|
|
|
{
|
|
|
|
struct resource_list *rl;
|
|
|
|
struct resource_list_entry *rle;
|
|
|
|
|
|
|
|
rl = obio_get_resource_list(dev, child);
|
|
|
|
if (rl == NULL)
|
|
|
|
return (EINVAL);
|
|
|
|
rle = resource_list_find(rl, type, rid);
|
|
|
|
if (rle == NULL)
|
|
|
|
return (EINVAL);
|
|
|
|
rman_release_resource(r);
|
|
|
|
rle->res = NULL;
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
obio_setup_intr(device_t dev, device_t child, struct resource *ires,
|
|
|
|
int flags, driver_filter_t *filt, driver_intr_t *handler,
|
|
|
|
void *arg, void **cookiep)
|
|
|
|
{
|
|
|
|
struct obio_softc *sc = device_get_softc(dev);
|
|
|
|
struct intr_event *event;
|
|
|
|
int irq, ip_bit, error, mask, mask_register;
|
|
|
|
|
|
|
|
irq = rman_get_start(ires);
|
|
|
|
|
|
|
|
if (irq >= NIRQS)
|
|
|
|
panic("%s: bad irq %d", __func__, irq);
|
|
|
|
|
|
|
|
event = sc->sc_eventstab[irq];
|
|
|
|
if (event == NULL) {
|
2008-09-19 04:10:09 +00:00
|
|
|
error = intr_event_create(&event, (void *)irq, 0, irq,
|
Merge from projects/mips to head by hand:
r201881 | imp | 2010-01-08 20:08:22 -0700 (Fri, 08 Jan 2010) | 3 lines
Rename mips_pcpu_init to mips_pcpu0_init since it applies only to the
BSP. Provide a missing prototype.
r201845 | imp | 2010-01-08 15:48:21 -0700 (Fri, 08 Jan 2010) | 2 lines
Centralize initialization of pcpu, and set curthread early...
r198669 | rrs | 2009-10-30 02:53:11 -0600 (Fri, 30 Oct 2009) | 5 lines
With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
making it run ;-)
r198154 | rrs | 2009-10-15 15:03:32 -0600 (Thu, 15 Oct 2009) | 10 lines
Does 4 things:
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
intr_machdep.c. This allows us to have an architecture dependant
intr_machdep.c (which we will need for RMI) in the machine specific
directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
may need to look at finding a better place to put this. But first I want to
get this thing compiling.
r194216 | gonzo | 2009-06-14 15:16:23 -0600 (Sun, 14 Jun 2009) | 2 lines
- Fix prototypes to make compiler happy
r194215 | gonzo | 2009-06-14 15:16:04 -0600 (Sun, 14 Jun 2009) | 2 lines
- Get rid of mask_fn and fix pre_filter/post_filter functions' prototypes
r191282 | gonzo | 2009-04-19 16:02:14 -0600 (Sun, 19 Apr 2009) | 3 lines
- Make mips_bus_space_generic be of type bus_space_tag_t instead of
struct bus_space and update all relevant places.
r191084 | gonzo | 2009-04-14 20:28:26 -0600 (Tue, 14 Apr 2009) | 6 lines
Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
2010-01-10 19:39:08 +00:00
|
|
|
obio_mask_irq, obio_unmask_irq,
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
|
|
|
NULL, NULL,
|
|
|
|
"obio intr%d:", irq);
|
|
|
|
|
|
|
|
sc->sc_eventstab[irq] = event;
|
|
|
|
}
|
|
|
|
|
|
|
|
intr_event_add_handler(event, device_get_nameunit(child), filt,
|
|
|
|
handler, arg, intr_priority(flags), flags, cookiep);
|
|
|
|
|
|
|
|
/* unmask IRQ */
|
|
|
|
mask_register = ICU_IRQ_MASK_REG(irq);
|
|
|
|
ip_bit = ICU_IP_BIT(irq);
|
|
|
|
|
|
|
|
mask = ICU_REG_READ(mask_register);
|
|
|
|
ICU_REG_WRITE(mask_register, mask & ~ip_bit);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
obio_teardown_intr(device_t dev, device_t child, struct resource *ires,
|
|
|
|
void *cookie)
|
|
|
|
{
|
|
|
|
struct obio_softc *sc = device_get_softc(dev);
|
|
|
|
int irq, result;
|
|
|
|
uint32_t mask_register, mask, ip_bit;
|
|
|
|
|
|
|
|
irq = rman_get_start(ires);
|
|
|
|
if (irq >= NIRQS)
|
|
|
|
panic("%s: bad irq %d", __func__, irq);
|
|
|
|
|
|
|
|
if (sc->sc_eventstab[irq] == NULL)
|
|
|
|
panic("Trying to teardown unoccupied IRQ");
|
|
|
|
|
|
|
|
/* mask IRQ */
|
|
|
|
mask_register = ICU_IRQ_MASK_REG(irq);
|
|
|
|
ip_bit = ICU_IP_BIT(irq);
|
|
|
|
|
|
|
|
mask = ICU_REG_READ(mask_register);
|
|
|
|
ICU_REG_WRITE(mask_register, mask | ip_bit);
|
|
|
|
|
|
|
|
result = intr_event_remove_handler(cookie);
|
|
|
|
if (!result)
|
|
|
|
sc->sc_eventstab[irq] = NULL;
|
|
|
|
|
|
|
|
return (result);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
obio_intr(void *arg)
|
|
|
|
{
|
|
|
|
struct obio_softc *sc = arg;
|
|
|
|
struct intr_event *event;
|
|
|
|
uint32_t irqstat, ipend, imask, xpend;
|
2008-09-19 04:10:09 +00:00
|
|
|
int irq, thread, group, i;
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
|
|
|
|
|
|
|
irqstat = 0;
|
|
|
|
irq = 0;
|
|
|
|
for (group = 2; group <= 6; group++) {
|
|
|
|
ipend = ICU_REG_READ(ICU_GROUP_IPEND_REG(group));
|
|
|
|
imask = ICU_REG_READ(ICU_GROUP_MASK_REG(group));
|
|
|
|
xpend = ipend;
|
|
|
|
ipend &= ~imask;
|
|
|
|
|
|
|
|
while ((i = fls(xpend)) != 0) {
|
|
|
|
xpend &= ~(1 << (i - 1));
|
|
|
|
irq = IP_IRQ(group, i - 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
while ((i = fls(ipend)) != 0) {
|
|
|
|
ipend &= ~(1 << (i - 1));
|
|
|
|
irq = IP_IRQ(group, i - 1);
|
|
|
|
event = sc->sc_eventstab[irq];
|
|
|
|
thread = 0;
|
|
|
|
if (!event || TAILQ_EMPTY(&event->ie_handlers)) {
|
2008-09-19 04:10:09 +00:00
|
|
|
/* TODO: Log stray IRQs */
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* TODO: frame instead of NULL? */
|
|
|
|
intr_event_handle(event, NULL);
|
|
|
|
/* XXX: Log stray IRQs */
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#if 0
|
|
|
|
ipend = ICU_REG_READ(ICU_IPEND2);
|
|
|
|
printf("ipend2 = %08x!\n", ipend);
|
|
|
|
|
|
|
|
ipend = ICU_REG_READ(ICU_IPEND3);
|
|
|
|
printf("ipend3 = %08x!\n", ipend);
|
|
|
|
|
|
|
|
ipend = ICU_REG_READ(ICU_IPEND4);
|
|
|
|
printf("ipend4 = %08x!\n", ipend);
|
|
|
|
ipend = ICU_REG_READ(ICU_IPEND5);
|
|
|
|
printf("ipend5 = %08x!\n", ipend);
|
|
|
|
|
|
|
|
ipend = ICU_REG_READ(ICU_IPEND6);
|
|
|
|
printf("ipend6 = %08x!\n", ipend);
|
|
|
|
#endif
|
|
|
|
while (irqstat != 0) {
|
|
|
|
if ((irqstat & 1) == 1) {
|
|
|
|
}
|
|
|
|
|
|
|
|
irq++;
|
|
|
|
irqstat >>= 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (FILTER_HANDLED);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
obio_hinted_child(device_t bus, const char *dname, int dunit)
|
|
|
|
{
|
|
|
|
device_t child;
|
|
|
|
long maddr;
|
|
|
|
int msize;
|
|
|
|
int irq;
|
|
|
|
int result;
|
|
|
|
|
|
|
|
child = BUS_ADD_CHILD(bus, 0, dname, dunit);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set hard-wired resources for hinted child using
|
|
|
|
* specific RIDs.
|
|
|
|
*/
|
|
|
|
resource_long_value(dname, dunit, "maddr", &maddr);
|
|
|
|
resource_int_value(dname, dunit, "msize", &msize);
|
|
|
|
|
|
|
|
|
|
|
|
result = bus_set_resource(child, SYS_RES_MEMORY, 0,
|
|
|
|
maddr, msize);
|
|
|
|
if (result != 0)
|
|
|
|
device_printf(bus, "warning: bus_set_resource() failed\n");
|
|
|
|
|
|
|
|
if (resource_int_value(dname, dunit, "irq", &irq) == 0) {
|
|
|
|
result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1);
|
|
|
|
if (result != 0)
|
|
|
|
device_printf(bus,
|
|
|
|
"warning: bus_set_resource() failed\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static device_t
|
|
|
|
obio_add_child(device_t bus, int order, const char *name, int unit)
|
|
|
|
{
|
|
|
|
device_t child;
|
|
|
|
struct obio_ivar *ivar;
|
|
|
|
|
|
|
|
ivar = malloc(sizeof(struct obio_ivar), M_DEVBUF, M_WAITOK | M_ZERO);
|
|
|
|
if (ivar == NULL) {
|
|
|
|
printf("Failed to allocate ivar\n");
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
resource_list_init(&ivar->resources);
|
|
|
|
|
|
|
|
child = device_add_child_ordered(bus, order, name, unit);
|
|
|
|
if (child == NULL) {
|
|
|
|
printf("Can't add child %s%d ordered\n", name, unit);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
device_set_ivars(child, ivar);
|
|
|
|
|
|
|
|
return (child);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Helper routine for bus_generic_rl_get_resource/bus_generic_rl_set_resource
|
|
|
|
* Provides pointer to resource_list for these routines
|
|
|
|
*/
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|
|
|
static struct resource_list *
|
|
|
|
obio_get_resource_list(device_t dev, device_t child)
|
|
|
|
{
|
|
|
|
struct obio_ivar *ivar;
|
|
|
|
|
|
|
|
ivar = device_get_ivars(child);
|
|
|
|
return (&(ivar->resources));
|
|
|
|
}
|
|
|
|
|
|
|
|
static device_method_t obio_methods[] = {
|
|
|
|
DEVMETHOD(bus_activate_resource, obio_activate_resource),
|
|
|
|
DEVMETHOD(bus_add_child, obio_add_child),
|
|
|
|
DEVMETHOD(bus_alloc_resource, obio_alloc_resource),
|
|
|
|
DEVMETHOD(bus_deactivate_resource, obio_deactivate_resource),
|
|
|
|
DEVMETHOD(bus_get_resource_list, obio_get_resource_list),
|
|
|
|
DEVMETHOD(bus_hinted_child, obio_hinted_child),
|
|
|
|
DEVMETHOD(bus_release_resource, obio_release_resource),
|
|
|
|
DEVMETHOD(bus_setup_intr, obio_setup_intr),
|
|
|
|
DEVMETHOD(bus_teardown_intr, obio_teardown_intr),
|
|
|
|
DEVMETHOD(device_attach, obio_attach),
|
|
|
|
DEVMETHOD(device_probe, obio_probe),
|
|
|
|
DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
|
|
|
|
DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
|
|
|
|
|
|
|
|
{0, 0},
|
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t obio_driver = {
|
|
|
|
"obio",
|
|
|
|
obio_methods,
|
|
|
|
sizeof(struct obio_softc),
|
|
|
|
};
|
|
|
|
static devclass_t obio_devclass;
|
|
|
|
|
|
|
|
DRIVER_MODULE(obio, nexus, obio_driver, obio_devclass, 0, 0);
|