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freebsd-nq/sys/dev/ioat/ioat_test.h

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Import ioat(4) driver I/OAT is also referred to as Crystal Beach DMA and is a Platform Storage Extension (PSE) on some Intel server platforms. This driver currently supports DMA descriptors only and is part of a larger effort to upstream an interconnect between multiple systems using the Non-Transparent Bridge (NTB) PSE. For now, this driver is only built on AMD64 platforms. It may be ported to work on i386 later, if that is desired. The hardware is exclusive to x86. Further documentation on ioat(4), including API documentation and usage, can be found in the new manual page. Bring in a test tool, ioatcontrol(8), in tools/tools/ioat. The test tool is not hooked up to the build and is not intended for end users. Submitted by: jimharris, Carl Delsey <carl.r.delsey@intel.com> Reviewed by: jimharris (reviewed my changes) Approved by: markj (mentor) Relnotes: yes Sponsored by: Intel Sponsored by: EMC / Isilon Storage Division Differential Revision: https://reviews.freebsd.org/D3456
2015-08-24 19:32:03 +00:00
/*-
* Copyright (C) 2012 Intel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
__FBSDID("$FreeBSD$");
#ifndef __IOAT_TEST_H__
#define __IOAT_TEST_H__
Improve flexibility of ioat_test / ioatcontrol(8) The test logic now preallocates memory before running the test. The buffer size is now configurable. Post-copy verification is configurable. The number of copies to chain into one transaction (one interrupt) is configurable. A 'duration' mode is added, which repeats the test until the duration has elapsed, reporting the B/s and transactions completed. ioatcontrol.8 has been updated to document the new arguments. Initial limits (on this particular Broadwell-DE) (and when the interrupts are working) seem to be: 256 interrupts/sec or ~6 GB/s, whichever limit is more restrictive. Unfortunately, it seems the interrupt-reset handling on Broadwell isn't working as intended. That will be fixed in a later commit. Sponsored by: EMC / Isilon Storage Division
2015-10-22 04:38:05 +00:00
enum ioat_res {
IOAT_TEST_OK = 0,
IOAT_TEST_NO_DMA_ENGINE,
IOAT_TEST_NO_MEMORY,
IOAT_TEST_MISCOMPARE,
ioat: Add support for Block Fill operations The IOAT hardware supports writing a 64-bit pattern to some destination buffer. The same limitations on buffer length apply as for copy operations. Throughput is a bit higher (probably because fill does not have to spend bandwidth reading from a source in memory). Support for testing Block Fill has been added to ioatcontrol(8) and the ioat_test device. ioatcontrol(8) accepts the '-f' flag, which tests Block Fill. (If the flag is omitted, the tool tests copy by default.) The '-V' flag, in conjunction with '-f', verifies that buffers are filled in the expected pattern. Tested on: Broadwell DE (Xeon D-1500) Sponsored by: EMC / Isilon Storage Division
2015-10-26 19:34:12 +00:00
IOAT_TEST_INVALID_INPUT,
Improve flexibility of ioat_test / ioatcontrol(8) The test logic now preallocates memory before running the test. The buffer size is now configurable. Post-copy verification is configurable. The number of copies to chain into one transaction (one interrupt) is configurable. A 'duration' mode is added, which repeats the test until the duration has elapsed, reporting the B/s and transactions completed. ioatcontrol.8 has been updated to document the new arguments. Initial limits (on this particular Broadwell-DE) (and when the interrupts are working) seem to be: 256 interrupts/sec or ~6 GB/s, whichever limit is more restrictive. Unfortunately, it seems the interrupt-reset handling on Broadwell isn't working as intended. That will be fixed in a later commit. Sponsored by: EMC / Isilon Storage Division
2015-10-22 04:38:05 +00:00
IOAT_NUM_RES
};
ioat: Add support for Block Fill operations The IOAT hardware supports writing a 64-bit pattern to some destination buffer. The same limitations on buffer length apply as for copy operations. Throughput is a bit higher (probably because fill does not have to spend bandwidth reading from a source in memory). Support for testing Block Fill has been added to ioatcontrol(8) and the ioat_test device. ioatcontrol(8) accepts the '-f' flag, which tests Block Fill. (If the flag is omitted, the tool tests copy by default.) The '-V' flag, in conjunction with '-f', verifies that buffers are filled in the expected pattern. Tested on: Broadwell DE (Xeon D-1500) Sponsored by: EMC / Isilon Storage Division
2015-10-26 19:34:12 +00:00
enum ioat_test_kind {
IOAT_TEST_FILL = 0,
IOAT_TEST_DMA,
ioatcontrol(8): Add and document "raw" testing mode Allows DMA from/to arbitrary KVA or physical address. /dev/ioat_test must be enabled by root and is only R/W root, so this is approximately as dangerous as /dev/mem and /dev/kmem. Sponsored by: EMC / Isilon Storage Division
2015-10-29 04:16:16 +00:00
IOAT_TEST_RAW_DMA,
ioat(4): Add ioatcontrol(8) testing for copy_8k Add -E ("Eight k") and -m ("Memcpy") modes to the ioatcontrol(8) tool. Prompted by: rpokala Sponsored by: EMC / Isilon Storage Division
2015-12-10 02:05:35 +00:00
IOAT_TEST_DMA_8K,
IOAT_TEST_MEMCPY,
ioatcontrol(8) could exercise 8k-aligned copy with page-break, crc and crc-copy modes. Reviewed by: cem Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D19780
2019-04-02 19:06:25 +00:00
IOAT_TEST_DMA_8K_PB,
IOAT_TEST_DMA_CRC,
IOAT_TEST_DMA_CRC_COPY,
ioat: Add support for Block Fill operations The IOAT hardware supports writing a 64-bit pattern to some destination buffer. The same limitations on buffer length apply as for copy operations. Throughput is a bit higher (probably because fill does not have to spend bandwidth reading from a source in memory). Support for testing Block Fill has been added to ioatcontrol(8) and the ioat_test device. ioatcontrol(8) accepts the '-f' flag, which tests Block Fill. (If the flag is omitted, the tool tests copy by default.) The '-V' flag, in conjunction with '-f', verifies that buffers are filled in the expected pattern. Tested on: Broadwell DE (Xeon D-1500) Sponsored by: EMC / Isilon Storage Division
2015-10-26 19:34:12 +00:00
IOAT_NUM_TESTKINDS
};
Improve flexibility of ioat_test / ioatcontrol(8) The test logic now preallocates memory before running the test. The buffer size is now configurable. Post-copy verification is configurable. The number of copies to chain into one transaction (one interrupt) is configurable. A 'duration' mode is added, which repeats the test until the duration has elapsed, reporting the B/s and transactions completed. ioatcontrol.8 has been updated to document the new arguments. Initial limits (on this particular Broadwell-DE) (and when the interrupts are working) seem to be: 256 interrupts/sec or ~6 GB/s, whichever limit is more restrictive. Unfortunately, it seems the interrupt-reset handling on Broadwell isn't working as intended. That will be fixed in a later commit. Sponsored by: EMC / Isilon Storage Division
2015-10-22 04:38:05 +00:00
struct test_transaction;
Import ioat(4) driver I/OAT is also referred to as Crystal Beach DMA and is a Platform Storage Extension (PSE) on some Intel server platforms. This driver currently supports DMA descriptors only and is part of a larger effort to upstream an interconnect between multiple systems using the Non-Transparent Bridge (NTB) PSE. For now, this driver is only built on AMD64 platforms. It may be ported to work on i386 later, if that is desired. The hardware is exclusive to x86. Further documentation on ioat(4), including API documentation and usage, can be found in the new manual page. Bring in a test tool, ioatcontrol(8), in tools/tools/ioat. The test tool is not hooked up to the build and is not intended for end users. Submitted by: jimharris, Carl Delsey <carl.r.delsey@intel.com> Reviewed by: jimharris (reviewed my changes) Approved by: markj (mentor) Relnotes: yes Sponsored by: Intel Sponsored by: EMC / Isilon Storage Division Differential Revision: https://reviews.freebsd.org/D3456
2015-08-24 19:32:03 +00:00
struct ioat_test {
Improve flexibility of ioat_test / ioatcontrol(8) The test logic now preallocates memory before running the test. The buffer size is now configurable. Post-copy verification is configurable. The number of copies to chain into one transaction (one interrupt) is configurable. A 'duration' mode is added, which repeats the test until the duration has elapsed, reporting the B/s and transactions completed. ioatcontrol.8 has been updated to document the new arguments. Initial limits (on this particular Broadwell-DE) (and when the interrupts are working) seem to be: 256 interrupts/sec or ~6 GB/s, whichever limit is more restrictive. Unfortunately, it seems the interrupt-reset handling on Broadwell isn't working as intended. That will be fixed in a later commit. Sponsored by: EMC / Isilon Storage Division
2015-10-22 04:38:05 +00:00
volatile uint32_t status[IOAT_NUM_RES];
Import ioat(4) driver I/OAT is also referred to as Crystal Beach DMA and is a Platform Storage Extension (PSE) on some Intel server platforms. This driver currently supports DMA descriptors only and is part of a larger effort to upstream an interconnect between multiple systems using the Non-Transparent Bridge (NTB) PSE. For now, this driver is only built on AMD64 platforms. It may be ported to work on i386 later, if that is desired. The hardware is exclusive to x86. Further documentation on ioat(4), including API documentation and usage, can be found in the new manual page. Bring in a test tool, ioatcontrol(8), in tools/tools/ioat. The test tool is not hooked up to the build and is not intended for end users. Submitted by: jimharris, Carl Delsey <carl.r.delsey@intel.com> Reviewed by: jimharris (reviewed my changes) Approved by: markj (mentor) Relnotes: yes Sponsored by: Intel Sponsored by: EMC / Isilon Storage Division Differential Revision: https://reviews.freebsd.org/D3456
2015-08-24 19:32:03 +00:00
uint32_t channel_index;
ioat: Add support for Block Fill operations The IOAT hardware supports writing a 64-bit pattern to some destination buffer. The same limitations on buffer length apply as for copy operations. Throughput is a bit higher (probably because fill does not have to spend bandwidth reading from a source in memory). Support for testing Block Fill has been added to ioatcontrol(8) and the ioat_test device. ioatcontrol(8) accepts the '-f' flag, which tests Block Fill. (If the flag is omitted, the tool tests copy by default.) The '-V' flag, in conjunction with '-f', verifies that buffers are filled in the expected pattern. Tested on: Broadwell DE (Xeon D-1500) Sponsored by: EMC / Isilon Storage Division
2015-10-26 19:34:12 +00:00
enum ioat_test_kind testkind;
Improve flexibility of ioat_test / ioatcontrol(8) The test logic now preallocates memory before running the test. The buffer size is now configurable. Post-copy verification is configurable. The number of copies to chain into one transaction (one interrupt) is configurable. A 'duration' mode is added, which repeats the test until the duration has elapsed, reporting the B/s and transactions completed. ioatcontrol.8 has been updated to document the new arguments. Initial limits (on this particular Broadwell-DE) (and when the interrupts are working) seem to be: 256 interrupts/sec or ~6 GB/s, whichever limit is more restrictive. Unfortunately, it seems the interrupt-reset handling on Broadwell isn't working as intended. That will be fixed in a later commit. Sponsored by: EMC / Isilon Storage Division
2015-10-22 04:38:05 +00:00
/* HW max of 1MB */
uint32_t buffer_size;
uint32_t chain_depth;
uint32_t transactions;
/*
* If non-zero, duration is time in ms;
* If zero, bounded by 'transactions' above.
*/
uint32_t duration;
/* If true, check for miscompares after a copy. */
bool verify;
ioatcontrol(8): Add and document "raw" testing mode Allows DMA from/to arbitrary KVA or physical address. /dev/ioat_test must be enabled by root and is only R/W root, so this is approximately as dangerous as /dev/mem and /dev/kmem. Sponsored by: EMC / Isilon Storage Division
2015-10-29 04:16:16 +00:00
/* DMA directly to/from some memory address */
uint64_t raw_target;
void *raw_vtarget;
bool raw_write;
bool raw_is_virtual;
ioatcontrol(8): Add support for interrupt coalescing The new flag, -c <period>, sets the interrupt coalescing period in microseconds through the new ioat(4) API ioat_set_interrupt_coalesce(). Also add a -z flag to zero ioat statistics before tests, to make it easy to measure results. Sponsored by: EMC / Isilon Storage Division
2015-12-14 22:02:01 +00:00
bool zero_stats;
/* Configure coalesce period */
uint16_t coalesce_period;
Improve flexibility of ioat_test / ioatcontrol(8) The test logic now preallocates memory before running the test. The buffer size is now configurable. Post-copy verification is configurable. The number of copies to chain into one transaction (one interrupt) is configurable. A 'duration' mode is added, which repeats the test until the duration has elapsed, reporting the B/s and transactions completed. ioatcontrol.8 has been updated to document the new arguments. Initial limits (on this particular Broadwell-DE) (and when the interrupts are working) seem to be: 256 interrupts/sec or ~6 GB/s, whichever limit is more restrictive. Unfortunately, it seems the interrupt-reset handling on Broadwell isn't working as intended. That will be fixed in a later commit. Sponsored by: EMC / Isilon Storage Division
2015-10-22 04:38:05 +00:00
/* Internal usage -- not test inputs */
TAILQ_HEAD(, test_transaction) free_q;
TAILQ_HEAD(, test_transaction) pend_q;
volatile bool too_late;
};
Import ioat(4) driver I/OAT is also referred to as Crystal Beach DMA and is a Platform Storage Extension (PSE) on some Intel server platforms. This driver currently supports DMA descriptors only and is part of a larger effort to upstream an interconnect between multiple systems using the Non-Transparent Bridge (NTB) PSE. For now, this driver is only built on AMD64 platforms. It may be ported to work on i386 later, if that is desired. The hardware is exclusive to x86. Further documentation on ioat(4), including API documentation and usage, can be found in the new manual page. Bring in a test tool, ioatcontrol(8), in tools/tools/ioat. The test tool is not hooked up to the build and is not intended for end users. Submitted by: jimharris, Carl Delsey <carl.r.delsey@intel.com> Reviewed by: jimharris (reviewed my changes) Approved by: markj (mentor) Relnotes: yes Sponsored by: Intel Sponsored by: EMC / Isilon Storage Division Differential Revision: https://reviews.freebsd.org/D3456
2015-08-24 19:32:03 +00:00
#define IOAT_DMATEST _IOWR('i', 0, struct ioat_test)
#endif /* __IOAT_TEST_H__ */
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