164 lines
4.9 KiB
C
164 lines
4.9 KiB
C
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* $NetBSD: intr.h,v 1.6 2000/02/11 13:15:44 tsubai Exp $
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* $FreeBSD$
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*/
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#ifndef _MACPPC_INTR_H_
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#define _MACPPC_INTR_H_
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/* Interrupt priority `levels'. */
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#define IPL_NONE 9 /* nothing */
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#define IPL_SOFTCLOCK 8 /* timeouts */
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#define IPL_SOFTNET 7 /* protocol stacks */
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#define IPL_BIO 6 /* block I/O */
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#define IPL_NET 5 /* network */
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#define IPL_SOFTSERIAL 4 /* serial */
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#define IPL_TTY 3 /* terminal */
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#define IPL_IMP 3 /* memory allocation */
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#define IPL_AUDIO 2 /* audio */
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#define IPL_CLOCK 1 /* clock */
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#define IPL_HIGH 1 /* everything */
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#define IPL_SERIAL 0 /* serial */
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#define NIPL 10
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/* Interrupt sharing types. */
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#define IST_NONE 0 /* none */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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#ifndef LOCORE
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#if 0
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/*
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* Interrupt handler chains. intr_establish() inserts a handler into
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* the list. The handler is called with its (single) argument.
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*/
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struct intrhand {
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int (*ih_fun) __P((void *));
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void *ih_arg;
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u_long ih_count;
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struct intrhand *ih_next;
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int ih_level;
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int ih_irq;
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};
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#endif
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void setsoftclock __P((void));
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void clearsoftclock __P((void));
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void setsoftnet __P((void));
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void clearsoftnet __P((void));
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void do_pending_int __P((void));
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static __inline void softintr __P((int));
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extern u_int cpl, ipending, tickspending;
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extern int imask[];
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/* Following code should be implemented with lwarx/stwcx to avoid
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* the disable/enable. i need to read the manual once more.... */
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static __inline void
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softintr(ipl)
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int ipl;
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{
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int msrsave;
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__asm__ volatile("mfmsr %0" : "=r"(msrsave));
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__asm__ volatile("mtmsr %0" :: "r"(msrsave & ~PSL_EE));
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ipending |= 1 << ipl;
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__asm__ volatile("mtmsr %0" :: "r"(msrsave));
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}
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#define ICU_LEN 64
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/* Soft interrupt masks. */
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#define SIR_CLOCK 28
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#define SIR_NET 29
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#define SIR_SERIAL 30
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#define SPL_CLOCK 31
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#if 0
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/*
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* Hardware interrupt masks
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*/
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#define splbio() splraise(imask[IPL_BIO])
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#define splnet() splraise(imask[IPL_NET])
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#define spltty() splraise(imask[IPL_TTY])
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#define splaudio() splraise(imask[IPL_AUDIO])
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#define splclock() splraise(imask[IPL_CLOCK])
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#define splstatclock() splclock()
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#define splserial() splraise(imask[IPL_SERIAL])
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#define spllpt() spltty()
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/*
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* Software interrupt masks
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*
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* NOTE: splsoftclock() is used by hardclock() to lower the priority from
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* clock to softclock before it calls softclock().
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*/
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#define spllowersoftclock() spllower(imask[IPL_SOFTCLOCK])
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#define splsoftclock() splraise(imask[IPL_SOFTCLOCK])
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#define splsoftnet() splraise(imask[IPL_SOFTNET])
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#define splsoftserial() splraise(imask[IPL_SOFTSERIAL])
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/*
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* Miscellaneous
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*/
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#define splimp() splraise(imask[IPL_IMP])
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#define splhigh() splraise(imask[IPL_HIGH])
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#define spl0() spllower(0)
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#endif /* 0 */
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#define setsoftclock() softintr(SIR_CLOCK)
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#define setsoftnet() softintr(SIR_NET)
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#define setsoftserial() softintr(SIR_SERIAL)
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#define CNT_IRQ0 0
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#define CNT_CLOCK 64
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#define CNT_SOFTCLOCK 65
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#define CNT_SOFTNET 66
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#define CNT_SOFTSERIAL 67
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#endif /* !LOCORE */
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#endif /* !_MACPPC_INTR_H_ */
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