d/freebsd-nq
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
664802113f
freebsd-nq/sys/mips/include/pmc_mdep.h

81 lines
1.8 KiB
C
Raw Normal View History

FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64, mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:27:37 +00:00
/*-
* This file is in the public domain.
*
* from: src/sys/alpha/include/pmc_mdep.h,v 1.2 2005/06/09 19:45:06 jkoshy
* $FreeBSD$
*/
#ifndef _MACHINE_PMC_MDEP_H_
#define _MACHINE_PMC_MDEP_H_
Add software PMC support. New kernel events can be added at various location for sampling or counting. This will for example allow easy system profiling whatever the processor is with known tools like pmcstat(8). Simultaneous usage of software PMC and hardware PMC is possible, for example looking at the lock acquire failure, page fault while sampling on instructions. Sponsored by: NETASQ MFC after: 1 month
2012-03-28 20:58:30 +00:00
#define PMC_MDEP_CLASS_INDEX_MIPS 1
Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor. Add macros for properly accessing coprocessor 0 registers that support performance counters. Reviewed by: jkoshy rpaulo fabien imp MFC after: 1 month
2010-03-03 15:05:58 +00:00
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64, mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:27:37 +00:00
union pmc_md_op_pmcallocate {
uint64_t __pad[4];
};
/* Logging */
Rework MIPS PMC code: - Replace MIPS24K-specific code with more generic framework that will make adding new CPU support easier - Add MIPS24K support for new framework - Limit backtrace depth to 1 for stability reasons and add option HWPMC_MIPS_BACKTRACE to override this limitation
2012-03-22 18:01:23 +00:00
#if defined(__mips_n64)
#define PMCLOG_READADDR PMCLOG_READ64
#define PMCLOG_EMITADDR PMCLOG_EMIT64
#else
Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor. Add macros for properly accessing coprocessor 0 registers that support performance counters. Reviewed by: jkoshy rpaulo fabien imp MFC after: 1 month
2010-03-03 15:05:58 +00:00
#define PMCLOG_READADDR PMCLOG_READ32
#define PMCLOG_EMITADDR PMCLOG_EMIT32
Rework MIPS PMC code: - Replace MIPS24K-specific code with more generic framework that will make adding new CPU support easier - Add MIPS24K support for new framework - Limit backtrace depth to 1 for stability reasons and add option HWPMC_MIPS_BACKTRACE to override this limitation
2012-03-22 18:01:23 +00:00
#endif
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64, mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:27:37 +00:00
#if _KERNEL
Rework MIPS PMC code: - Replace MIPS24K-specific code with more generic framework that will make adding new CPU support easier - Add MIPS24K support for new framework - Limit backtrace depth to 1 for stability reasons and add option HWPMC_MIPS_BACKTRACE to override this limitation
2012-03-22 18:01:23 +00:00
/*
* MIPS event codes are encoded with a select bit. The
* select bit is used when writing to CP0 so that we
* can select either counter 0/2 or 1/3. The cycle
* and instruction counters are special in that they
* can be counted on either 0/2 or 1/3.
*/
#define MIPS_CTR_ALL 255 /* Count events in any counter. */
#define MIPS_CTR_0 0 /* Counter 0 Event */
#define MIPS_CTR_1 1 /* Counter 1 Event */
struct mips_event_code_map {
uint32_t pe_ev; /* enum value */
uint8_t pe_counter; /* Which counter this can be counted in. */
uint8_t pe_code; /* numeric code */
};
struct mips_pmc_spec {
uint32_t ps_cpuclass;
uint32_t ps_cputype;
uint32_t ps_capabilities;
int ps_counter_width;
};
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64, mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:27:37 +00:00
union pmc_md_pmc {
Rework MIPS PMC code: - Replace MIPS24K-specific code with more generic framework that will make adding new CPU support easier - Add MIPS24K support for new framework - Limit backtrace depth to 1 for stability reasons and add option HWPMC_MIPS_BACKTRACE to override this limitation
2012-03-22 18:01:23 +00:00
uint32_t pm_mips_evsel;
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64, mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:27:37 +00:00
};
Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor. Add macros for properly accessing coprocessor 0 registers that support performance counters. Reviewed by: jkoshy rpaulo fabien imp MFC after: 1 month
2010-03-03 15:05:58 +00:00
#define PMC_TRAPFRAME_TO_PC(TF) ((TF)->pc)
Rework MIPS PMC code: - Replace MIPS24K-specific code with more generic framework that will make adding new CPU support easier - Add MIPS24K support for new framework - Limit backtrace depth to 1 for stability reasons and add option HWPMC_MIPS_BACKTRACE to override this limitation
2012-03-22 18:01:23 +00:00
extern const struct mips_event_code_map mips_event_codes[];
extern const int mips_event_codes_size;
extern int mips_npmcs;
extern struct mips_pmc_spec mips_pmc_spec;
Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor. Add macros for properly accessing coprocessor 0 registers that support performance counters. Reviewed by: jkoshy rpaulo fabien imp MFC after: 1 month
2010-03-03 15:05:58 +00:00
/*
* Prototypes
*/
Rework MIPS PMC code: - Replace MIPS24K-specific code with more generic framework that will make adding new CPU support easier - Add MIPS24K support for new framework - Limit backtrace depth to 1 for stability reasons and add option HWPMC_MIPS_BACKTRACE to override this limitation
2012-03-22 18:01:23 +00:00
struct pmc_mdep *pmc_mips_initialize(void);
void pmc_mips_finalize(struct pmc_mdep *_md);
/*
* CPU-specific functions
*/
uint32_t mips_get_perfctl(int cpu, int ri, uint32_t event, uint32_t caps);
uint64_t mips_pmcn_read(unsigned int pmc);
uint64_t mips_pmcn_write(unsigned int pmc, uint64_t v);
Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor. Add macros for properly accessing coprocessor 0 registers that support performance counters. Reviewed by: jkoshy rpaulo fabien imp MFC after: 1 month
2010-03-03 15:05:58 +00:00
#endif /* _KERNEL */
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64, mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:27:37 +00:00
#endif /* !_MACHINE_PMC_MDEP_H_ */
Reference in New Issue Copy Permalink