2016-05-18 04:35:58 +00:00
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/*-
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2017-01-27 23:08:06 +00:00
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* Copyright (c) 2014-2017, Matthew Macy (mmacy@nextbsd.org)
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2016-05-18 04:35:58 +00:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Neither the name of Matthew Macy nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __IFLIB_H_
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#define __IFLIB_H_
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#include <sys/kobj.h>
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#include <sys/bus.h>
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#include <sys/cpuset.h>
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#include <machine/bus.h>
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#include <sys/bus_dma.h>
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#include <sys/nv.h>
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2016-08-12 21:29:44 +00:00
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#include <sys/gtaskqueue.h>
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2016-05-18 04:35:58 +00:00
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2017-03-13 22:53:06 +00:00
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/*
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* The value type for indexing, limits max descriptors
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* to 65535 can be conditionally redefined to uint32_t
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* in the future if the need arises.
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*/
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typedef uint16_t qidx_t;
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#define QIDX_INVALID 0xFFFF
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2016-05-18 04:35:58 +00:00
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/*
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* Most cards can handle much larger TSO requests
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* but the FreeBSD TCP stack will break on larger
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* values
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*/
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#define FREEBSD_TSO_SIZE_MAX 65518
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struct iflib_ctx;
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typedef struct iflib_ctx *if_ctx_t;
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struct if_shared_ctx;
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typedef struct if_shared_ctx *if_shared_ctx_t;
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struct if_int_delay_info;
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typedef struct if_int_delay_info *if_int_delay_info_t;
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/*
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* File organization:
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* - public structures
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* - iflib accessors
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* - iflib utility functions
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* - iflib core functions
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*/
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typedef struct if_rxd_frag {
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uint8_t irf_flid;
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2017-03-13 22:53:06 +00:00
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qidx_t irf_idx;
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2016-08-12 21:29:44 +00:00
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uint16_t irf_len;
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2016-05-18 04:35:58 +00:00
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} *if_rxd_frag_t;
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typedef struct if_rxd_info {
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/* set by iflib */
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uint16_t iri_qsidx; /* qset index */
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uint16_t iri_vtag; /* vlan tag - if flag set */
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2016-08-12 21:29:44 +00:00
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/* XXX redundant with the new irf_len field */
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2016-05-18 04:35:58 +00:00
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uint16_t iri_len; /* packet length */
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2017-03-13 22:53:06 +00:00
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qidx_t iri_cidx; /* consumer index of cq */
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2016-05-18 04:35:58 +00:00
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struct ifnet *iri_ifp; /* some drivers >1 interface per softc */
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/* updated by driver */
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2017-03-13 22:53:06 +00:00
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if_rxd_frag_t iri_frags;
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2016-05-18 04:35:58 +00:00
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uint32_t iri_flowid; /* RSS hash for packet */
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uint32_t iri_csum_flags; /* m_pkthdr csum flags */
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2017-03-13 22:53:06 +00:00
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2016-05-18 04:35:58 +00:00
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uint32_t iri_csum_data; /* m_pkthdr csum data */
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2017-03-13 22:53:06 +00:00
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uint8_t iri_flags; /* mbuf flags for packet */
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2016-05-18 04:35:58 +00:00
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uint8_t iri_nfrags; /* number of fragments in packet */
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uint8_t iri_rsstype; /* RSS hash type */
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uint8_t iri_pad; /* any padding in the received data */
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} *if_rxd_info_t;
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2017-03-13 22:53:06 +00:00
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typedef struct if_rxd_update {
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uint64_t *iru_paddrs;
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caddr_t *iru_vaddrs;
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qidx_t *iru_idxs;
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qidx_t iru_pidx;
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uint16_t iru_qsidx;
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uint16_t iru_count;
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uint16_t iru_buf_size;
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uint8_t iru_flidx;
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} *if_rxd_update_t;
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2016-05-18 04:35:58 +00:00
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#define IPI_TX_INTR 0x1 /* send an interrupt when this packet is sent */
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#define IPI_TX_IPV4 0x2 /* ethertype IPv4 */
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#define IPI_TX_IPV6 0x4 /* ethertype IPv6 */
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typedef struct if_pkt_info {
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2017-03-13 22:53:06 +00:00
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bus_dma_segment_t *ipi_segs; /* physical addresses */
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uint32_t ipi_len; /* packet length */
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uint16_t ipi_qsidx; /* queue set index */
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qidx_t ipi_nsegs; /* number of segments */
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qidx_t ipi_ndescs; /* number of descriptors used by encap */
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uint16_t ipi_flags; /* iflib per-packet flags */
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qidx_t ipi_pidx; /* start pidx for encap */
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qidx_t ipi_new_pidx; /* next available pidx post-encap */
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2016-05-18 04:35:58 +00:00
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/* offload handling */
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2017-03-13 22:53:06 +00:00
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uint8_t ipi_ehdrlen; /* ether header length */
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uint8_t ipi_ip_hlen; /* ip header length */
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uint8_t ipi_tcp_hlen; /* tcp header length */
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uint8_t ipi_ipproto; /* ip protocol */
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uint32_t ipi_csum_flags; /* packet checksum flags */
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uint16_t ipi_tso_segsz; /* tso segment size */
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uint16_t ipi_vtag; /* VLAN tag */
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uint16_t ipi_etype; /* ether header type */
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uint8_t ipi_tcp_hflags; /* tcp header flags */
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uint8_t ipi_mflags; /* packet mbuf flags */
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uint32_t ipi_tcp_seq; /* tcp seqno */
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uint32_t ipi_tcp_sum; /* tcp csum */
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2016-05-18 04:35:58 +00:00
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} *if_pkt_info_t;
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typedef struct if_irq {
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struct resource *ii_res;
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int ii_rid;
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void *ii_tag;
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} *if_irq_t;
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struct if_int_delay_info {
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if_ctx_t iidi_ctx; /* Back-pointer to the iflib ctx (softc) */
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int iidi_offset; /* Register offset to read/write */
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int iidi_value; /* Current value in usecs */
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struct sysctl_oid *iidi_oidp;
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struct sysctl_req *iidi_req;
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};
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typedef enum {
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IFLIB_INTR_LEGACY,
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IFLIB_INTR_MSI,
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IFLIB_INTR_MSIX
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} iflib_intr_mode_t;
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/*
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* This really belongs in pciio.h or some place more general
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* but this is the only consumer for now.
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*/
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typedef struct pci_vendor_info {
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uint32_t pvi_vendor_id;
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uint32_t pvi_device_id;
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uint32_t pvi_subvendor_id;
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uint32_t pvi_subdevice_id;
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uint32_t pvi_rev_id;
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uint32_t pvi_class_mask;
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caddr_t pvi_name;
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} pci_vendor_info_t;
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#define PVID(vendor, devid, name) {vendor, devid, 0, 0, 0, 0, name}
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#define PVID_OEM(vendor, devid, svid, sdevid, revid, name) {vendor, devid, svid, sdevid, revid, 0, name}
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#define PVID_END {0, 0, 0, 0, 0, 0, NULL}
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typedef struct if_txrx {
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int (*ift_txd_encap) (void *, if_pkt_info_t);
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2017-03-13 22:53:06 +00:00
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void (*ift_txd_flush) (void *, uint16_t, qidx_t pidx);
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int (*ift_txd_credits_update) (void *, uint16_t qsidx, bool clear);
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2016-05-18 04:35:58 +00:00
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2017-03-13 22:53:06 +00:00
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int (*ift_rxd_available) (void *, uint16_t qsidx, qidx_t pidx, qidx_t budget);
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2016-05-18 04:35:58 +00:00
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int (*ift_rxd_pkt_get) (void *, if_rxd_info_t ri);
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2017-03-13 22:53:06 +00:00
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void (*ift_rxd_refill) (void * , if_rxd_update_t iru);
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void (*ift_rxd_flush) (void *, uint16_t qsidx, uint8_t flidx, qidx_t pidx);
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2016-05-18 04:35:58 +00:00
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int (*ift_legacy_intr) (void *);
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} *if_txrx_t;
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typedef struct if_softc_ctx {
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int isc_vectors;
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int isc_nrxqsets;
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int isc_ntxqsets;
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int isc_msix_bar; /* can be model specific - initialize in attach_pre */
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int isc_tx_nsegments; /* can be model specific - initialize in attach_pre */
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2016-08-12 21:29:44 +00:00
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int isc_ntxd[8];
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int isc_nrxd[8];
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uint32_t isc_txqsizes[8];
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uint32_t isc_rxqsizes[8];
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2017-03-13 22:53:06 +00:00
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/* is there such thing as a descriptor that is more than 248 bytes ? */
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uint8_t isc_txd_size[8];
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uint8_t isc_rxd_size[8];
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2016-08-12 21:29:44 +00:00
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int isc_max_txqsets;
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int isc_max_rxqsets;
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2016-05-18 04:35:58 +00:00
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int isc_tx_tso_segments_max;
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int isc_tx_tso_size_max;
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int isc_tx_tso_segsize_max;
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2017-01-02 00:56:33 +00:00
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int isc_tx_csum_flags;
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int isc_capenable;
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2016-05-18 04:35:58 +00:00
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int isc_rss_table_size;
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int isc_rss_table_mask;
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2016-08-12 21:29:44 +00:00
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int isc_nrxqsets_max;
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int isc_ntxqsets_max;
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2016-05-18 04:35:58 +00:00
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iflib_intr_mode_t isc_intr;
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uint16_t isc_max_frame_size; /* set at init time by driver */
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2017-04-07 00:33:03 +00:00
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uint32_t isc_pause_frames; /* set by driver for iflib_timer to detect */
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2016-05-18 04:35:58 +00:00
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pci_vendor_info_t isc_vendor_info; /* set by iflib prior to attach_pre */
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2017-04-04 21:03:34 +00:00
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int isc_disable_msix;
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2017-01-02 00:56:33 +00:00
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if_txrx_t isc_txrx;
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2016-05-18 04:35:58 +00:00
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} *if_softc_ctx_t;
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/*
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* Initialization values for device
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*/
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struct if_shared_ctx {
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int isc_magic;
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driver_t *isc_driver;
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bus_size_t isc_q_align;
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bus_size_t isc_tx_maxsize;
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bus_size_t isc_tx_maxsegsize;
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bus_size_t isc_rx_maxsize;
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bus_size_t isc_rx_maxsegsize;
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int isc_rx_nsegments;
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int isc_admin_intrcnt; /* # of admin/link interrupts */
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/* fields necessary for probe */
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pci_vendor_info_t *isc_vendor_info;
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char *isc_driver_version;
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/* optional function to transform the read values to match the table*/
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void (*isc_parse_devinfo) (uint16_t *device_id, uint16_t *subvendor_id,
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uint16_t *subdevice_id, uint16_t *rev_id);
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2016-08-12 21:29:44 +00:00
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int isc_nrxd_min[8];
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int isc_nrxd_default[8];
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int isc_nrxd_max[8];
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int isc_ntxd_min[8];
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int isc_ntxd_default[8];
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int isc_ntxd_max[8];
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2017-03-13 22:53:06 +00:00
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/* actively used during operation */
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int isc_nfl __aligned(CACHE_LINE_SIZE);
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int isc_ntxqs; /* # of tx queues per tx qset - usually 1 */
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int isc_nrxqs; /* # of rx queues per rx qset - intel 1, chelsio 2, broadcom 3 */
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int isc_rx_process_limit;
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int isc_tx_reclaim_thresh;
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int isc_flags;
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2016-05-18 04:35:58 +00:00
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};
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typedef struct iflib_dma_info {
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bus_addr_t idi_paddr;
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caddr_t idi_vaddr;
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bus_dma_tag_t idi_tag;
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bus_dmamap_t idi_map;
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uint32_t idi_size;
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} *iflib_dma_info_t;
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#define IFLIB_MAGIC 0xCAFEF00D
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typedef enum {
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IFLIB_INTR_RX,
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2017-03-13 22:53:06 +00:00
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IFLIB_INTR_TX,
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IFLIB_INTR_RXTX,
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2016-05-18 04:35:58 +00:00
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IFLIB_INTR_ADMIN,
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IFLIB_INTR_IOV,
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} iflib_intr_type_t;
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#ifndef ETH_ADDR_LEN
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#define ETH_ADDR_LEN 6
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#endif
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/*
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2016-08-12 21:29:44 +00:00
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* Interface has a separate command queue for RX
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2016-05-18 04:35:58 +00:00
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*/
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2017-01-02 00:56:33 +00:00
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#define IFLIB_HAS_RXCQ 0x01
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2016-05-18 04:35:58 +00:00
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/*
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* Driver has already allocated vectors
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*/
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2017-01-02 00:56:33 +00:00
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#define IFLIB_SKIP_MSIX 0x02
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2016-05-18 04:35:58 +00:00
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/*
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* Interface is a virtual function
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*/
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2017-01-02 00:56:33 +00:00
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#define IFLIB_IS_VF 0x04
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2016-08-12 21:29:44 +00:00
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/*
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* Interface has a separate command queue for TX
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*/
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2017-01-02 00:56:33 +00:00
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#define IFLIB_HAS_TXCQ 0x08
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/*
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* Interface does checksum in place
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*/
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#define IFLIB_NEED_SCRATCH 0x10
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/*
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* Interface doesn't expect in_pseudo for th_sum
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*/
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#define IFLIB_TSO_INIT_IP 0x20
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2017-03-13 22:53:06 +00:00
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/*
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* Interface doesn't align IP header
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*/
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#define IFLIB_DO_RX_FIXUP 0x40
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2017-01-02 00:56:33 +00:00
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2016-05-18 04:35:58 +00:00
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/*
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* field accessors
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*/
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void *iflib_get_softc(if_ctx_t ctx);
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device_t iflib_get_dev(if_ctx_t ctx);
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if_t iflib_get_ifp(if_ctx_t ctx);
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struct ifmedia *iflib_get_media(if_ctx_t ctx);
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if_softc_ctx_t iflib_get_softc_ctx(if_ctx_t ctx);
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if_shared_ctx_t iflib_get_sctx(if_ctx_t ctx);
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void iflib_set_mac(if_ctx_t ctx, uint8_t mac[ETHER_ADDR_LEN]);
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/*
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* If the driver can plug cleanly in to newbus use these
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*/
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int iflib_device_probe(device_t);
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int iflib_device_attach(device_t);
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int iflib_device_detach(device_t);
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int iflib_device_suspend(device_t);
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int iflib_device_resume(device_t);
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int iflib_device_shutdown(device_t);
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int iflib_device_iov_init(device_t, uint16_t, const nvlist_t *);
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void iflib_device_iov_uninit(device_t);
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int iflib_device_iov_add_vf(device_t, uint16_t, const nvlist_t *);
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/*
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* If the driver can't plug cleanly in to newbus
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* use these
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*/
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int iflib_device_register(device_t dev, void *softc, if_shared_ctx_t sctx, if_ctx_t *ctxp);
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int iflib_device_deregister(if_ctx_t);
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int iflib_irq_alloc(if_ctx_t, if_irq_t, int, driver_filter_t, void *filter_arg, driver_intr_t, void *arg, char *name);
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int iflib_irq_alloc_generic(if_ctx_t ctx, if_irq_t irq, int rid,
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iflib_intr_type_t type, driver_filter_t *filter,
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void *filter_arg, int qid, char *name);
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void iflib_softirq_alloc_generic(if_ctx_t ctx, int rid, iflib_intr_type_t type, void *arg, int qid, char *name);
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void iflib_irq_free(if_ctx_t ctx, if_irq_t irq);
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void iflib_io_tqg_attach(struct grouptask *gt, void *uniq, int cpu, char *name);
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void iflib_config_gtask_init(if_ctx_t ctx, struct grouptask *gtask,
|
2016-08-12 21:29:44 +00:00
|
|
|
gtask_fn_t *fn, char *name);
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void iflib_config_gtask_deinit(struct grouptask *gtask);
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|
2016-05-18 04:35:58 +00:00
|
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void iflib_tx_intr_deferred(if_ctx_t ctx, int txqid);
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void iflib_rx_intr_deferred(if_ctx_t ctx, int rxqid);
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void iflib_admin_intr_deferred(if_ctx_t ctx);
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void iflib_iov_intr_deferred(if_ctx_t ctx);
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|
|
2016-08-12 21:29:44 +00:00
|
|
|
void iflib_link_state_change(if_ctx_t ctx, int linkstate, uint64_t baudrate);
|
2016-05-18 04:35:58 +00:00
|
|
|
|
|
|
|
int iflib_dma_alloc(if_ctx_t ctx, int size, iflib_dma_info_t dma, int mapflags);
|
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|
|
void iflib_dma_free(iflib_dma_info_t dma);
|
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|
int iflib_dma_alloc_multi(if_ctx_t ctx, int *sizes, iflib_dma_info_t *dmalist, int mapflags, int count);
|
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|
void iflib_dma_free_multi(iflib_dma_info_t *dmalist, int count);
|
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|
struct mtx *iflib_ctx_lock_get(if_ctx_t);
|
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|
struct mtx *iflib_qset_lock_get(if_ctx_t, uint16_t);
|
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|
void iflib_led_create(if_ctx_t ctx);
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|
void iflib_add_int_delay_sysctl(if_ctx_t, const char *, const char *,
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|
if_int_delay_info_t, int, int);
|
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|
#endif /* __IFLIB_H_ */
|