2011-05-13 04:54:01 +00:00
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/*-
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2017-11-27 15:03:07 +00:00
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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2011-05-13 04:54:01 +00:00
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _VMM_LAPIC_H_
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#define _VMM_LAPIC_H_
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struct vm;
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2019-08-01 02:16:48 +00:00
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bool lapic_msr(u_int num);
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2013-12-10 22:56:51 +00:00
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int lapic_rdmsr(struct vm *vm, int cpu, u_int msr, uint64_t *rval,
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bool *retu);
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int lapic_wrmsr(struct vm *vm, int cpu, u_int msr, uint64_t wval,
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bool *retu);
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2012-09-21 03:09:23 +00:00
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2012-11-28 00:02:17 +00:00
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int lapic_mmio_read(void *vm, int cpu, uint64_t gpa,
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uint64_t *rval, int size, void *arg);
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int lapic_mmio_write(void *vm, int cpu, uint64_t gpa,
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uint64_t wval, int size, void *arg);
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2012-09-25 22:31:35 +00:00
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2011-05-13 04:54:01 +00:00
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/*
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* Signals to the LAPIC that an interrupt at 'vector' needs to be generated
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* to the 'cpu', the state is recorded in IRR.
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*/
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2013-11-27 22:18:08 +00:00
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int lapic_set_intr(struct vm *vm, int cpu, int vector, bool trig);
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#define LAPIC_TRIG_LEVEL true
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#define LAPIC_TRIG_EDGE false
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static __inline int
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lapic_intr_level(struct vm *vm, int cpu, int vector)
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{
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return (lapic_set_intr(vm, cpu, vector, LAPIC_TRIG_LEVEL));
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}
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static __inline int
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lapic_intr_edge(struct vm *vm, int cpu, int vector)
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{
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return (lapic_set_intr(vm, cpu, vector, LAPIC_TRIG_EDGE));
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}
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2011-05-13 04:54:01 +00:00
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2013-12-23 19:29:07 +00:00
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/*
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* Triggers the LAPIC local interrupt (LVT) 'vector' on 'cpu'. 'cpu' can
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* be set to -1 to trigger the interrupt on all CPUs.
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*/
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int lapic_set_local_intr(struct vm *vm, int cpu, int vector);
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2013-12-16 19:59:31 +00:00
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int lapic_intr_msi(struct vm *vm, uint64_t addr, uint64_t msg);
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2013-12-23 19:29:07 +00:00
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2011-05-13 04:54:01 +00:00
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#endif
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