2016-04-06 23:11:03 +00:00
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/*-
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* Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Allwinner USB clocks
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/ofw/ofw_subr.h>
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#include <dev/extres/clk/clk_gate.h>
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#include <dev/extres/hwreset/hwreset.h>
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#include "clkdev_if.h"
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#include "hwreset_if.h"
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#define A10_SCLK_GATING_USBPHY (1 << 8)
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#define A10_SCLK_GATING_OHCI1 (1 << 7)
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#define A10_SCLK_GATING_OHCI0 (1 << 6)
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#define USBPHY2_RST (1 << 2)
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#define USBPHY1_RST (1 << 1)
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#define USBPHY0_RST (1 << 0)
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enum aw_usbclk_type {
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AW_A10_USBCLK = 1,
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2016-07-08 23:38:25 +00:00
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AW_A13_USBCLK,
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2016-04-06 23:11:03 +00:00
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AW_A31_USBCLK,
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2016-05-05 09:41:57 +00:00
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AW_A83T_USBCLK,
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2016-05-13 18:20:54 +00:00
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AW_H3_USBCLK,
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2016-04-06 23:11:03 +00:00
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};
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static struct ofw_compat_data compat_data[] = {
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{ "allwinner,sun4i-a10-usb-clk", AW_A10_USBCLK },
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2016-07-08 23:38:25 +00:00
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{ "allwinner,sun5i-a13-usb-clk", AW_A13_USBCLK },
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2016-04-06 23:11:03 +00:00
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{ "allwinner,sun6i-a31-usb-clk", AW_A31_USBCLK },
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2016-05-05 09:41:57 +00:00
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{ "allwinner,sun8i-a83t-usb-clk", AW_A83T_USBCLK },
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2016-05-13 18:20:54 +00:00
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{ "allwinner,sun8i-h3-usb-clk", AW_H3_USBCLK },
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2016-04-06 23:11:03 +00:00
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{ NULL, 0 }
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};
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/* Clock indices for A10, as there is no clock-indices property in the DT */
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static uint32_t aw_usbclk_indices_a10[] = { 6, 7, 8 };
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2016-05-13 18:20:54 +00:00
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/* Clock indices for H3, as there is no clock-indices property in the DT */
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static uint32_t aw_usbclk_indices_h3[] = { 8, 9, 10, 11, 16, 17, 18, 19 };
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2016-04-06 23:11:03 +00:00
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struct aw_usbclk_softc {
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bus_addr_t reg;
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};
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static int
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aw_usbclk_hwreset_assert(device_t dev, intptr_t id, bool value)
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{
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struct aw_usbclk_softc *sc;
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uint32_t mask;
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device_t pdev;
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int error;
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sc = device_get_softc(dev);
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pdev = device_get_parent(dev);
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mask = USBPHY0_RST << id;
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CLKDEV_DEVICE_LOCK(pdev);
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error = CLKDEV_MODIFY_4(pdev, sc->reg, mask, value ? 0 : mask);
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CLKDEV_DEVICE_UNLOCK(pdev);
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return (error);
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}
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static int
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aw_usbclk_hwreset_is_asserted(device_t dev, intptr_t id, bool *value)
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{
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struct aw_usbclk_softc *sc;
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uint32_t mask, val;
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device_t pdev;
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int error;
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sc = device_get_softc(dev);
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pdev = device_get_parent(dev);
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mask = USBPHY0_RST << id;
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CLKDEV_DEVICE_LOCK(pdev);
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error = CLKDEV_READ_4(pdev, sc->reg, &val);
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CLKDEV_DEVICE_UNLOCK(pdev);
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if (error)
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return (error);
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*value = (val & mask) != 0 ? false : true;
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return (0);
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}
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static int
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aw_usbclk_create(device_t dev, bus_addr_t paddr, struct clkdom *clkdom,
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const char *pclkname, const char *clkname, int index)
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{
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const char *parent_names[1] = { pclkname };
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struct clk_gate_def def;
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memset(&def, 0, sizeof(def));
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def.clkdef.id = index;
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def.clkdef.name = clkname;
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def.clkdef.parent_names = parent_names;
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def.clkdef.parent_cnt = 1;
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def.offset = paddr;
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def.shift = index;
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def.mask = 1;
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def.on_value = 1;
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def.off_value = 0;
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return (clknode_gate_register(clkdom, &def));
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}
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static int
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aw_usbclk_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Allwinner USB Clocks");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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aw_usbclk_attach(device_t dev)
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{
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struct aw_usbclk_softc *sc;
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struct clkdom *clkdom;
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const char **names;
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2016-05-05 09:41:57 +00:00
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const char *pname;
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2016-04-06 23:11:03 +00:00
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int index, nout, error;
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enum aw_usbclk_type type;
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uint32_t *indices;
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2016-05-05 09:41:57 +00:00
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clk_t clk_parent, clk_parent_pll;
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2016-04-06 23:11:03 +00:00
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bus_size_t psize;
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phandle_t node;
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sc = device_get_softc(dev);
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node = ofw_bus_get_node(dev);
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indices = NULL;
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type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
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if (ofw_reg_to_paddr(node, 0, &sc->reg, &psize, NULL) != 0) {
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device_printf(dev, "cannot parse 'reg' property\n");
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return (ENXIO);
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}
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clkdom = clkdom_create(dev);
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nout = clk_parse_ofw_out_names(dev, node, &names, &indices);
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if (nout == 0) {
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device_printf(dev, "no clock outputs found\n");
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error = ENOENT;
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goto fail;
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}
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if (indices == NULL && type == AW_A10_USBCLK)
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indices = aw_usbclk_indices_a10;
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2016-05-13 18:20:54 +00:00
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else if (indices == NULL && type == AW_H3_USBCLK)
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indices = aw_usbclk_indices_h3;
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2016-04-06 23:11:03 +00:00
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2016-07-10 18:28:15 +00:00
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error = clk_get_by_ofw_index(dev, 0, 0, &clk_parent);
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2016-04-06 23:11:03 +00:00
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if (error != 0) {
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device_printf(dev, "cannot parse clock parent\n");
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return (ENXIO);
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}
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2016-05-05 09:41:57 +00:00
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if (type == AW_A83T_USBCLK) {
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2016-07-10 18:28:15 +00:00
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error = clk_get_by_ofw_index(dev, 0, 1, &clk_parent_pll);
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2016-05-05 09:41:57 +00:00
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if (error != 0) {
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device_printf(dev, "cannot parse pll clock parent\n");
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return (ENXIO);
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}
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}
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2016-04-06 23:11:03 +00:00
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for (index = 0; index < nout; index++) {
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2016-05-05 09:41:57 +00:00
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if (strcmp(names[index], "usb_hsic_pll") == 0)
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pname = clk_get_name(clk_parent_pll);
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else
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pname = clk_get_name(clk_parent);
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error = aw_usbclk_create(dev, sc->reg, clkdom, pname,
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names[index], indices != NULL ? indices[index] : index);
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2016-04-06 23:11:03 +00:00
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if (error)
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goto fail;
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}
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if (clkdom_finit(clkdom) != 0) {
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device_printf(dev, "cannot finalize clkdom initialization\n");
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error = ENXIO;
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goto fail;
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}
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if (bootverbose)
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clkdom_dump(clkdom);
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hwreset_register_ofw_provider(dev);
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return (0);
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fail:
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return (error);
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}
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static device_method_t aw_usbclk_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, aw_usbclk_probe),
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DEVMETHOD(device_attach, aw_usbclk_attach),
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/* Reset interface */
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DEVMETHOD(hwreset_assert, aw_usbclk_hwreset_assert),
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DEVMETHOD(hwreset_is_asserted, aw_usbclk_hwreset_is_asserted),
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DEVMETHOD_END
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};
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static driver_t aw_usbclk_driver = {
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"aw_usbclk",
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aw_usbclk_methods,
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sizeof(struct aw_usbclk_softc)
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};
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static devclass_t aw_usbclk_devclass;
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EARLY_DRIVER_MODULE(aw_usbclk, simplebus, aw_usbclk_driver,
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aw_usbclk_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
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